[deliverable/linux.git] / arch / powerpc / mm / stab.c

/*
 * PowerPC64 Segment Translation Support.
 *
 * Dave Engebretsen and Mike Corrigan {engebret|mikejc}@us.ibm.com
 *    Copyright (c) 2001 Dave Engebretsen
 *
 * Copyright (C) 2002 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 */

#include <linux/memblock.h>

#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/mmu_context.h>
#include <asm/paca.h>
#include <asm/cputable.h>
#include <asm/prom.h>
#include <asm/abs_addr.h>
#include <asm/firmware.h>
#include <asm/iseries/hv_call.h>

struct stab_entry {
	unsigned long esid_data;
	unsigned long vsid_data;
};

#define NR_STAB_CACHE_ENTRIES 8
static DEFINE_PER_CPU(long, stab_cache_ptr);
static DEFINE_PER_CPU(long [NR_STAB_CACHE_ENTRIES], stab_cache);

/*
 * Create a segment table entry for the given esid/vsid pair.
 */
static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
{
	unsigned long esid_data, vsid_data;
	unsigned long entry, group, old_esid, castout_entry, i;
	unsigned int global_entry;
	struct stab_entry *ste, *castout_ste;
	unsigned long kernel_segment = (esid << SID_SHIFT) >= PAGE_OFFSET;

	vsid_data = vsid << STE_VSID_SHIFT;
	esid_data = esid << SID_SHIFT | STE_ESID_KP | STE_ESID_V;
	if (! kernel_segment)
		esid_data |= STE_ESID_KS;

	/* Search the primary group first. */
	global_entry = (esid & 0x1f) << 3;
	ste = (struct stab_entry *)(stab | ((esid & 0x1f) << 7));

	/* Find an empty entry, if one exists. */
	for (group = 0; group < 2; group++) {
		for (entry = 0; entry < 8; entry++, ste++) {
			if (!(ste->esid_data & STE_ESID_V)) {
				ste->vsid_data = vsid_data;
				eieio();
				ste->esid_data = esid_data;
				return (global_entry | entry);
			}
		}
		/* Now search the secondary group. */
		global_entry = ((~esid) & 0x1f) << 3;
		ste = (struct stab_entry *)(stab | (((~esid) & 0x1f) << 7));
	}

	/*
	 * Could not find empty entry, pick one with a round robin selection.
	 * Search all entries in the two groups.
	 */
	castout_entry = get_paca()->stab_rr;
	for (i = 0; i < 16; i++) {
		if (castout_entry < 8) {
			global_entry = (esid & 0x1f) << 3;
			ste = (struct stab_entry *)(stab | ((esid & 0x1f) << 7));
			castout_ste = ste + castout_entry;
		} else {
			global_entry = ((~esid) & 0x1f) << 3;
			ste = (struct stab_entry *)(stab | (((~esid) & 0x1f) << 7));
			castout_ste = ste + (castout_entry - 8);
		}

		/* Dont cast out the first kernel segment */
		if ((castout_ste->esid_data & ESID_MASK) != PAGE_OFFSET)
			break;

		castout_entry = (castout_entry + 1) & 0xf;
	}

	get_paca()->stab_rr = (castout_entry + 1) & 0xf;

	/* Modify the old entry to the new value. */

	/* Force previous translations to complete. DRENG */
	asm volatile("isync" : : : "memory");

	old_esid = castout_ste->esid_data >> SID_SHIFT;
	castout_ste->esid_data = 0;		/* Invalidate old entry */

	asm volatile("sync" : : : "memory");    /* Order update */

	castout_ste->vsid_data = vsid_data;
	eieio();				/* Order update */
	castout_ste->esid_data = esid_data;

	asm volatile("slbie  %0" : : "r" (old_esid << SID_SHIFT));
	/* Ensure completion of slbie */
	asm volatile("sync" : : : "memory");

	return (global_entry | (castout_entry & 0x7));
}

/*
 * Allocate a segment table entry for the given ea and mm
 */
static int __ste_allocate(unsigned long ea, struct mm_struct *mm)
{
	unsigned long vsid;
	unsigned char stab_entry;
	unsigned long offset;

	/* Kernel or user address? */
	if (is_kernel_addr(ea)) {
		vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
	} else {
		if ((ea >= TASK_SIZE_USER64) || (! mm))
			return 1;

		vsid = get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M);
	}

	stab_entry = make_ste(get_paca()->stab_addr, GET_ESID(ea), vsid);

	if (!is_kernel_addr(ea)) {
		offset = __get_cpu_var(stab_cache_ptr);
		if (offset < NR_STAB_CACHE_ENTRIES)
			__get_cpu_var(stab_cache[offset++]) = stab_entry;
		else
			offset = NR_STAB_CACHE_ENTRIES+1;
		__get_cpu_var(stab_cache_ptr) = offset;

		/* Order update */
		asm volatile("sync":::"memory");
	}

	return 0;
}

int ste_allocate(unsigned long ea)
{
	return __ste_allocate(ea, current->mm);
}

/*
 * Do the segment table work for a context switch: flush all user
 * entries from the table, then preload some probably useful entries
 * for the new task
 */
void switch_stab(struct task_struct *tsk, struct mm_struct *mm)
{
	struct stab_entry *stab = (struct stab_entry *) get_paca()->stab_addr;
	struct stab_entry *ste;
	unsigned long offset;
	unsigned long pc = KSTK_EIP(tsk);
	unsigned long stack = KSTK_ESP(tsk);
	unsigned long unmapped_base;

	/* Force previous translations to complete. DRENG */
	asm volatile("isync" : : : "memory");

	/*
	 * We need interrupts hard-disabled here, not just soft-disabled,
	 * so that a PMU interrupt can't occur, which might try to access
	 * user memory (to get a stack trace) and possible cause an STAB miss
	 * which would update the stab_cache/stab_cache_ptr per-cpu variables.
	 */
	hard_irq_disable();

	offset = __get_cpu_var(stab_cache_ptr);
	if (offset <= NR_STAB_CACHE_ENTRIES) {
		int i;

		for (i = 0; i < offset; i++) {
			ste = stab + __get_cpu_var(stab_cache[i]);
			ste->esid_data = 0; /* invalidate entry */
		}
	} else {
		unsigned long entry;

		/* Invalidate all entries. */
		ste = stab;

		/* Never flush the first entry. */
		ste += 1;
		for (entry = 1;
		     entry < (HW_PAGE_SIZE / sizeof(struct stab_entry));
		     entry++, ste++) {
			unsigned long ea;
			ea = ste->esid_data & ESID_MASK;
			if (!is_kernel_addr(ea)) {
				ste->esid_data = 0;
			}
		}
	}

	asm volatile("sync; slbia; sync":::"memory");

	__get_cpu_var(stab_cache_ptr) = 0;

	/* Now preload some entries for the new task */
	if (test_tsk_thread_flag(tsk, TIF_32BIT))
		unmapped_base = TASK_UNMAPPED_BASE_USER32;
	else
		unmapped_base = TASK_UNMAPPED_BASE_USER64;

	__ste_allocate(pc, mm);

	if (GET_ESID(pc) == GET_ESID(stack))
		return;

	__ste_allocate(stack, mm);

	if ((GET_ESID(pc) == GET_ESID(unmapped_base))
	    || (GET_ESID(stack) == GET_ESID(unmapped_base)))
		return;

	__ste_allocate(unmapped_base, mm);

	/* Order update */
	asm volatile("sync" : : : "memory");
}

/*
 * Allocate segment tables for secondary CPUs.  These must all go in
 * the first (bolted) segment, so that do_stab_bolted won't get a
 * recursive segment miss on the segment table itself.
 */
void __init stabs_alloc(void)
{
	int cpu;

	if (cpu_has_feature(CPU_FTR_SLB))
		return;

	for_each_possible_cpu(cpu) {
		unsigned long newstab;

		if (cpu == 0)
			continue; /* stab for CPU 0 is statically allocated */

		newstab = memblock_alloc_base(HW_PAGE_SIZE, HW_PAGE_SIZE,
					 1<<SID_SHIFT);
		newstab = (unsigned long)__va(newstab);

		memset((void *)newstab, 0, HW_PAGE_SIZE);

		paca[cpu].stab_addr = newstab;
		paca[cpu].stab_real = virt_to_abs(newstab);
		printk(KERN_INFO "Segment table for CPU %d at 0x%llx "
		       "virtual, 0x%llx absolute\n",
		       cpu, paca[cpu].stab_addr, paca[cpu].stab_real);
	}
}

/*
 * Build an entry for the base kernel segment and put it into
 * the segment table or SLB.  All other segment table or SLB
 * entries are faulted in.
 */
void stab_initialize(unsigned long stab)
{
	unsigned long vsid = get_kernel_vsid(PAGE_OFFSET, MMU_SEGSIZE_256M);
	unsigned long stabreal;

	asm volatile("isync; slbia; isync":::"memory");
	make_ste(stab, GET_ESID(PAGE_OFFSET), vsid);

	/* Order update */
	asm volatile("sync":::"memory");

	/* Set ASR */
	stabreal = get_paca()->stab_real | 0x1ul;

#ifdef CONFIG_PPC_ISERIES
	if (firmware_has_feature(FW_FEATURE_ISERIES)) {
		HvCall1(HvCallBaseSetASR, stabreal);
		return;
	}
#endif /* CONFIG_PPC_ISERIES */

	mtspr(SPRN_ASR, stabreal);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* PowerPC64 Segment Translation Support.
	3	*
	4	* Dave Engebretsen and Mike Corrigan {engebret\|mikejc}@us.ibm.com
	5	* Copyright (c) 2001 Dave Engebretsen
	6	*
	7	* Copyright (C) 2002 Anton Blanchard <anton@au.ibm.com>, IBM
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
95f72d1e	15	#include <linux/memblock.h>
d9b2b2a2	16
1da177e4 LT	17	#include <asm/pgtable.h>
	18	#include <asm/mmu.h>
	19	#include <asm/mmu_context.h>
	20	#include <asm/paca.h>
	21	#include <asm/cputable.h>
d9b2b2a2	22	#include <asm/prom.h>
533f0817	23	#include <asm/abs_addr.h>
799d6046	24	#include <asm/firmware.h>
f9b6c1de	25	#include <asm/iseries/hv_call.h>
1da177e4	26
1f8d419e DG	27	struct stab_entry {
	28	unsigned long esid_data;
	29	unsigned long vsid_data;
	30	};
	31
1da177e4	32	#define NR_STAB_CACHE_ENTRIES 8
09de9ff8	33	static DEFINE_PER_CPU(long, stab_cache_ptr);
204fba4a	34	static DEFINE_PER_CPU(long [NR_STAB_CACHE_ENTRIES], stab_cache);
1da177e4 LT	35
	36	/*
	37	* Create a segment table entry for the given esid/vsid pair.
	38	*/
	39	static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
	40	{
	41	unsigned long esid_data, vsid_data;
	42	unsigned long entry, group, old_esid, castout_entry, i;
	43	unsigned int global_entry;
	44	struct stab_entry ste, castout_ste;
b5666f70	45	unsigned long kernel_segment = (esid << SID_SHIFT) >= PAGE_OFFSET;
1da177e4 LT	46
	47	vsid_data = vsid << STE_VSID_SHIFT;
	48	esid_data = esid << SID_SHIFT \| STE_ESID_KP \| STE_ESID_V;
	49	if (! kernel_segment)
	50	esid_data \|= STE_ESID_KS;
	51
	52	/* Search the primary group first. */
	53	global_entry = (esid & 0x1f) << 3;
	54	ste = (struct stab_entry *)(stab \| ((esid & 0x1f) << 7));
	55
	56	/* Find an empty entry, if one exists. */
	57	for (group = 0; group < 2; group++) {
	58	for (entry = 0; entry < 8; entry++, ste++) {
	59	if (!(ste->esid_data & STE_ESID_V)) {
	60	ste->vsid_data = vsid_data;
74a0ba61	61	eieio();
1da177e4 LT	62	ste->esid_data = esid_data;
	63	return (global_entry \| entry);
	64	}
	65	}
	66	/* Now search the secondary group. */
	67	global_entry = ((~esid) & 0x1f) << 3;
	68	ste = (struct stab_entry *)(stab \| (((~esid) & 0x1f) << 7));
	69	}
	70
	71	/*
	72	* Could not find empty entry, pick one with a round robin selection.
	73	* Search all entries in the two groups.
	74	*/
	75	castout_entry = get_paca()->stab_rr;
	76	for (i = 0; i < 16; i++) {
	77	if (castout_entry < 8) {
	78	global_entry = (esid & 0x1f) << 3;
	79	ste = (struct stab_entry *)(stab \| ((esid & 0x1f) << 7));
	80	castout_ste = ste + castout_entry;
	81	} else {
	82	global_entry = ((~esid) & 0x1f) << 3;
	83	ste = (struct stab_entry *)(stab \| (((~esid) & 0x1f) << 7));
	84	castout_ste = ste + (castout_entry - 8);
	85	}
	86
	87	/* Dont cast out the first kernel segment */
b5666f70	88	if ((castout_ste->esid_data & ESID_MASK) != PAGE_OFFSET)
1da177e4 LT	89	break;
	90
	91	castout_entry = (castout_entry + 1) & 0xf;
	92	}
	93
	94	get_paca()->stab_rr = (castout_entry + 1) & 0xf;
	95
	96	/* Modify the old entry to the new value. */
	97
	98	/* Force previous translations to complete. DRENG */
	99	asm volatile("isync" : : : "memory");
	100
	101	old_esid = castout_ste->esid_data >> SID_SHIFT;
	102	castout_ste->esid_data = 0; /* Invalidate old entry */
	103
	104	asm volatile("sync" : : : "memory"); /* Order update */
	105
	106	castout_ste->vsid_data = vsid_data;
74a0ba61	107	eieio(); /* Order update */
1da177e4 LT	108	castout_ste->esid_data = esid_data;
	109
	110	asm volatile("slbie %0" : : "r" (old_esid << SID_SHIFT));
	111	/* Ensure completion of slbie */
	112	asm volatile("sync" : : : "memory");
	113
	114	return (global_entry \| (castout_entry & 0x7));
	115	}
	116
	117	/*
	118	* Allocate a segment table entry for the given ea and mm
	119	*/
	120	static int __ste_allocate(unsigned long ea, struct mm_struct *mm)
	121	{
	122	unsigned long vsid;
	123	unsigned char stab_entry;
	124	unsigned long offset;
	125
	126	/* Kernel or user address? */
51fae6de	127	if (is_kernel_addr(ea)) {
1189be65	128	vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
1da177e4 LT	129	} else {
	130	if ((ea >= TASK_SIZE_USER64) \|\| (! mm))
	131	return 1;
	132
1189be65	133	vsid = get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M);
1da177e4 LT	134	}
	135
	136	stab_entry = make_ste(get_paca()->stab_addr, GET_ESID(ea), vsid);
	137
51fae6de	138	if (!is_kernel_addr(ea)) {
1da177e4 LT	139	offset = __get_cpu_var(stab_cache_ptr);
	140	if (offset < NR_STAB_CACHE_ENTRIES)
	141	__get_cpu_var(stab_cache[offset++]) = stab_entry;
	142	else
	143	offset = NR_STAB_CACHE_ENTRIES+1;
	144	__get_cpu_var(stab_cache_ptr) = offset;
	145
	146	/* Order update */
	147	asm volatile("sync":::"memory");
	148	}
	149
	150	return 0;
	151	}
	152
	153	int ste_allocate(unsigned long ea)
	154	{
	155	return __ste_allocate(ea, current->mm);
	156	}
	157
	158	/*
	159	* Do the segment table work for a context switch: flush all user
	160	* entries from the table, then preload some probably useful entries
	161	* for the new task
	162	*/
	163	void switch_stab(struct task_struct tsk, struct mm_struct mm)
	164	{
	165	struct stab_entry stab = (struct stab_entry ) get_paca()->stab_addr;
	166	struct stab_entry *ste;
9c1e1052	167	unsigned long offset;
1da177e4 LT	168	unsigned long pc = KSTK_EIP(tsk);
	169	unsigned long stack = KSTK_ESP(tsk);
	170	unsigned long unmapped_base;
	171
	172	/* Force previous translations to complete. DRENG */
	173	asm volatile("isync" : : : "memory");
	174
9c1e1052 PM	175	/*
	176	* We need interrupts hard-disabled here, not just soft-disabled,
	177	* so that a PMU interrupt can't occur, which might try to access
	178	* user memory (to get a stack trace) and possible cause an STAB miss
	179	* which would update the stab_cache/stab_cache_ptr per-cpu variables.
	180	*/
	181	hard_irq_disable();
	182
	183	offset = __get_cpu_var(stab_cache_ptr);
1da177e4 LT	184	if (offset <= NR_STAB_CACHE_ENTRIES) {
	185	int i;
	186
	187	for (i = 0; i < offset; i++) {
	188	ste = stab + __get_cpu_var(stab_cache[i]);
	189	ste->esid_data = 0; /* invalidate entry */
	190	}
	191	} else {
	192	unsigned long entry;
	193
	194	/* Invalidate all entries. */
	195	ste = stab;
	196
	197	/* Never flush the first entry. */
	198	ste += 1;
	199	for (entry = 1;
3c726f8d	200	entry < (HW_PAGE_SIZE / sizeof(struct stab_entry));
1da177e4 LT	201	entry++, ste++) {
	202	unsigned long ea;
	203	ea = ste->esid_data & ESID_MASK;
51fae6de	204	if (!is_kernel_addr(ea)) {
1da177e4 LT	205	ste->esid_data = 0;
	206	}
	207	}
	208	}
	209
	210	asm volatile("sync; slbia; sync":::"memory");
	211
	212	__get_cpu_var(stab_cache_ptr) = 0;
	213
	214	/* Now preload some entries for the new task */
	215	if (test_tsk_thread_flag(tsk, TIF_32BIT))
	216	unmapped_base = TASK_UNMAPPED_BASE_USER32;
	217	else
	218	unmapped_base = TASK_UNMAPPED_BASE_USER64;
	219
	220	__ste_allocate(pc, mm);
	221
	222	if (GET_ESID(pc) == GET_ESID(stack))
	223	return;
	224
	225	__ste_allocate(stack, mm);
	226
	227	if ((GET_ESID(pc) == GET_ESID(unmapped_base))
	228	\|\| (GET_ESID(stack) == GET_ESID(unmapped_base)))
	229	return;
	230
	231	__ste_allocate(unmapped_base, mm);
	232
	233	/* Order update */
	234	asm volatile("sync" : : : "memory");
	235	}
	236
533f0817 DG	237	/*
	238	* Allocate segment tables for secondary CPUs. These must all go in
	239	* the first (bolted) segment, so that do_stab_bolted won't get a
	240	* recursive segment miss on the segment table itself.
	241	*/
0108d3fe	242	void __init stabs_alloc(void)
533f0817 DG	243	{
	244	int cpu;
	245
	246	if (cpu_has_feature(CPU_FTR_SLB))
	247	return;
	248
0e551954	249	for_each_possible_cpu(cpu) {
533f0817 DG	250	unsigned long newstab;
	251
	252	if (cpu == 0)
	253	continue; /* stab for CPU 0 is statically allocated */
	254
95f72d1e	255	newstab = memblock_alloc_base(HW_PAGE_SIZE, HW_PAGE_SIZE,
3c726f8d	256	1<<SID_SHIFT);
b5666f70	257	newstab = (unsigned long)__va(newstab);
533f0817	258
3c726f8d	259	memset((void *)newstab, 0, HW_PAGE_SIZE);
533f0817 DG	260
	261	paca[cpu].stab_addr = newstab;
	262	paca[cpu].stab_real = virt_to_abs(newstab);
fe333321 IM	263	printk(KERN_INFO "Segment table for CPU %d at 0x%llx "
fe333321 IM	264	"virtual, 0x%llx absolute\n",
3c726f8d	265	cpu, paca[cpu].stab_addr, paca[cpu].stab_real);
533f0817 DG	266	}
	267	}
	268
1da177e4 LT	269	/*
	270	* Build an entry for the base kernel segment and put it into
	271	* the segment table or SLB. All other segment table or SLB
	272	* entries are faulted in.
	273	*/
	274	void stab_initialize(unsigned long stab)
	275	{
1189be65	276	unsigned long vsid = get_kernel_vsid(PAGE_OFFSET, MMU_SEGSIZE_256M);
799d6046	277	unsigned long stabreal;
1da177e4	278
3c726f8d	279	asm volatile("isync; slbia; isync":::"memory");
b5666f70	280	make_ste(stab, GET_ESID(PAGE_OFFSET), vsid);
1da177e4	281
3c726f8d BH	282	/* Order update */
3c726f8d BH	283	asm volatile("sync":::"memory");
799d6046 PM	284
	285	/* Set ASR */
	286	stabreal = get_paca()->stab_real \| 0x1ul;
	287
	288	#ifdef CONFIG_PPC_ISERIES
	289	if (firmware_has_feature(FW_FEATURE_ISERIES)) {
	290	HvCall1(HvCallBaseSetASR, stabreal);
	291	return;
	292	}
	293	#endif /* CONFIG_PPC_ISERIES */
ca507eaf	294
799d6046	295	mtspr(SPRN_ASR, stabreal);
1da177e4	296	}