powerpc/mm: Add SMP support to no-hash TLB handling
[deliverable/linux.git] / arch / powerpc / mm / tlb_hash32.c
CommitLineData
14cf11af
PM
1/*
2 * This file contains the routines for TLB flushing.
3 * On machines where the MMU uses a hash table to store virtual to
4 * physical translations, these routines flush entries from the
5 * hash table also.
6 * -- paulus
7 *
8 * Derived from arch/ppc/mm/init.c:
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
12 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
13 * Copyright (C) 1996 Paul Mackerras
14cf11af
PM
14 *
15 * Derived from "arch/i386/mm/init.c"
16 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
22 *
23 */
24
14cf11af
PM
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/init.h>
28#include <linux/highmem.h>
97d22d26
MK
29#include <linux/pagemap.h>
30
14cf11af
PM
31#include <asm/tlbflush.h>
32#include <asm/tlb.h>
33
34#include "mmu_decl.h"
35
36/*
37 * Called when unmapping pages to flush entries from the TLB/hash table.
38 */
39void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long addr)
40{
41 unsigned long ptephys;
42
43 if (Hash != 0) {
44 ptephys = __pa(ptep) & PAGE_MASK;
6218a761 45 flush_hash_pages(mm->context.id, addr, ptephys, 1);
14cf11af
PM
46 }
47}
4ee7084e 48EXPORT_SYMBOL(flush_hash_entry);
14cf11af
PM
49
50/*
51 * Called by ptep_set_access_flags, must flush on CPUs for which the
52 * DSI handler can't just "fixup" the TLB on a write fault
53 */
54void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr)
55{
56 if (Hash != 0)
57 return;
58 _tlbie(addr);
59}
60
61/*
62 * Called at the end of a mmu_gather operation to make sure the
63 * TLB flush is completely done.
64 */
65void tlb_flush(struct mmu_gather *tlb)
66{
67 if (Hash == 0) {
68 /*
69 * 603 needs to flush the whole TLB here since
70 * it doesn't use a hash table.
71 */
72 _tlbia();
73 }
74}
75
76/*
77 * TLB flushing:
78 *
79 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
80 * - flush_tlb_page(vma, vmaddr) flushes one page
81 * - flush_tlb_range(vma, start, end) flushes a range of pages
82 * - flush_tlb_kernel_range(start, end) flushes kernel pages
83 *
84 * since the hardware hash table functions as an extension of the
85 * tlb as far as the linux tables are concerned, flush it too.
86 * -- Cort
87 */
88
89/*
90 * 750 SMP is a Bad Idea because the 750 doesn't broadcast all
91 * the cache operations on the bus. Hence we need to use an IPI
92 * to get the other CPU(s) to invalidate their TLBs.
93 */
94#ifdef CONFIG_SMP_750
95#define FINISH_FLUSH smp_send_tlb_invalidate(0)
96#else
97#define FINISH_FLUSH do { } while (0)
98#endif
99
100static void flush_range(struct mm_struct *mm, unsigned long start,
101 unsigned long end)
102{
103 pmd_t *pmd;
104 unsigned long pmd_end;
105 int count;
6218a761 106 unsigned int ctx = mm->context.id;
14cf11af
PM
107
108 if (Hash == 0) {
109 _tlbia();
110 return;
111 }
112 start &= PAGE_MASK;
113 if (start >= end)
114 return;
115 end = (end - 1) | ~PAGE_MASK;
f1a1eb29 116 pmd = pmd_offset(pud_offset(pgd_offset(mm, start), start), start);
14cf11af
PM
117 for (;;) {
118 pmd_end = ((start + PGDIR_SIZE) & PGDIR_MASK) - 1;
119 if (pmd_end > end)
120 pmd_end = end;
121 if (!pmd_none(*pmd)) {
122 count = ((pmd_end - start) >> PAGE_SHIFT) + 1;
123 flush_hash_pages(ctx, start, pmd_val(*pmd), count);
124 }
125 if (pmd_end == end)
126 break;
127 start = pmd_end + 1;
128 ++pmd;
129 }
130}
131
132/*
133 * Flush kernel TLB entries in the given range
134 */
135void flush_tlb_kernel_range(unsigned long start, unsigned long end)
136{
137 flush_range(&init_mm, start, end);
138 FINISH_FLUSH;
139}
f048aace 140EXPORT_SYMBOL(flush_tlb_kernel_range);
14cf11af
PM
141
142/*
143 * Flush all the (user) entries for the address space described by mm.
144 */
145void flush_tlb_mm(struct mm_struct *mm)
146{
147 struct vm_area_struct *mp;
148
149 if (Hash == 0) {
150 _tlbia();
151 return;
152 }
153
01edcd89
HD
154 /*
155 * It is safe to go down the mm's list of vmas when called
156 * from dup_mmap, holding mmap_sem. It would also be safe from
157 * unmap_region or exit_mmap, but not from vmtruncate on SMP -
158 * but it seems dup_mmap is the only SMP case which gets here.
159 */
14cf11af
PM
160 for (mp = mm->mmap; mp != NULL; mp = mp->vm_next)
161 flush_range(mp->vm_mm, mp->vm_start, mp->vm_end);
162 FINISH_FLUSH;
163}
f048aace 164EXPORT_SYMBOL(flush_tlb_mm);
14cf11af
PM
165
166void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
167{
168 struct mm_struct *mm;
169 pmd_t *pmd;
170
171 if (Hash == 0) {
172 _tlbie(vmaddr);
173 return;
174 }
175 mm = (vmaddr < TASK_SIZE)? vma->vm_mm: &init_mm;
f1a1eb29 176 pmd = pmd_offset(pud_offset(pgd_offset(mm, vmaddr), vmaddr), vmaddr);
14cf11af 177 if (!pmd_none(*pmd))
6218a761 178 flush_hash_pages(mm->context.id, vmaddr, pmd_val(*pmd), 1);
14cf11af
PM
179 FINISH_FLUSH;
180}
f048aace 181EXPORT_SYMBOL(flush_tlb_page);
14cf11af
PM
182
183/*
184 * For each address in the range, find the pte for the address
185 * and check _PAGE_HASHPTE bit; if it is set, find and destroy
186 * the corresponding HPTE.
187 */
188void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
189 unsigned long end)
190{
191 flush_range(vma->vm_mm, start, end);
192 FINISH_FLUSH;
193}
f048aace 194EXPORT_SYMBOL(flush_tlb_range);
This page took 0.295256 seconds and 5 git commands to generate.