Commit | Line | Data |
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6065170c GL |
1 | /* |
2 | * | |
3 | * Utility functions for the Freescale MPC52xx. | |
4 | * | |
5 | * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com> | |
6 | * | |
7 | * This file is licensed under the terms of the GNU General Public License | |
8 | * version 2. This program is licensed "as is" without any warranty of any | |
9 | * kind, whether express or implied. | |
10 | * | |
11 | */ | |
12 | ||
13 | #undef DEBUG | |
14 | ||
15 | #include <linux/kernel.h> | |
c8004a28 | 16 | #include <linux/spinlock.h> |
9fe2e796 | 17 | #include <linux/of_platform.h> |
6065170c GL |
18 | #include <asm/io.h> |
19 | #include <asm/prom.h> | |
6065170c GL |
20 | #include <asm/mpc52xx.h> |
21 | ||
66ffbe49 GL |
22 | /* MPC5200 device tree match tables */ |
23 | static struct of_device_id mpc52xx_xlb_ids[] __initdata = { | |
24 | { .compatible = "fsl,mpc5200-xlb", }, | |
25 | { .compatible = "mpc5200-xlb", }, | |
26 | {} | |
27 | }; | |
28 | static struct of_device_id mpc52xx_bus_ids[] __initdata = { | |
29 | { .compatible = "fsl,mpc5200-immr", }, | |
30 | { .compatible = "fsl,mpc5200b-immr", }, | |
aafbf16b | 31 | { .compatible = "simple-bus", }, |
66ffbe49 GL |
32 | |
33 | /* depreciated matches; shouldn't be used in new device trees */ | |
aafbf16b | 34 | { .compatible = "fsl,lpb", }, |
66ffbe49 GL |
35 | { .type = "builtin", .compatible = "mpc5200", }, /* efika */ |
36 | { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */ | |
37 | {} | |
38 | }; | |
39 | ||
86b92cdd MB |
40 | /* |
41 | * This variable is mapped in mpc52xx_map_wdt() and used in mpc52xx_restart(). | |
42 | * Permanent mapping is required because mpc52xx_restart() can be called | |
43 | * from interrupt context while node mapping (which calls ioremap()) | |
44 | * cannot be used at such point. | |
45 | */ | |
2701a1ad | 46 | static DEFINE_SPINLOCK(mpc52xx_lock); |
c8004a28 GL |
47 | static struct mpc52xx_gpt __iomem *mpc52xx_wdt; |
48 | static struct mpc52xx_cdm __iomem *mpc52xx_cdm; | |
6065170c | 49 | |
6065170c GL |
50 | /** |
51 | * mpc52xx_find_ipb_freq - Find the IPB bus frequency for a device | |
52 | * @node: device node | |
53 | * | |
54 | * Returns IPB bus frequency, or 0 if the bus frequency cannot be found. | |
55 | */ | |
56 | unsigned int | |
57 | mpc52xx_find_ipb_freq(struct device_node *node) | |
58 | { | |
59 | struct device_node *np; | |
60 | const unsigned int *p_ipb_freq = NULL; | |
61 | ||
62 | of_node_get(node); | |
63 | while (node) { | |
e2eb6392 | 64 | p_ipb_freq = of_get_property(node, "bus-frequency", NULL); |
6065170c GL |
65 | if (p_ipb_freq) |
66 | break; | |
67 | ||
68 | np = of_get_parent(node); | |
69 | of_node_put(node); | |
70 | node = np; | |
71 | } | |
72 | if (node) | |
73 | of_node_put(node); | |
74 | ||
75 | return p_ipb_freq ? *p_ipb_freq : 0; | |
76 | } | |
d8594d63 | 77 | EXPORT_SYMBOL(mpc52xx_find_ipb_freq); |
6065170c GL |
78 | |
79 | ||
4de3b992 GL |
80 | /* |
81 | * Configure the XLB arbiter settings to match what Linux expects. | |
82 | */ | |
6065170c | 83 | void __init |
4de3b992 | 84 | mpc5200_setup_xlb_arbiter(void) |
6065170c | 85 | { |
75ca399e | 86 | struct device_node *np; |
6065170c GL |
87 | struct mpc52xx_xlb __iomem *xlb; |
88 | ||
66ffbe49 | 89 | np = of_find_matching_node(NULL, mpc52xx_xlb_ids); |
75ca399e GL |
90 | xlb = of_iomap(np, 0); |
91 | of_node_put(np); | |
4de3b992 | 92 | if (!xlb) { |
6065170c | 93 | printk(KERN_ERR __FILE__ ": " |
f43c32ef | 94 | "Error mapping XLB in mpc52xx_setup_cpu(). " |
6065170c | 95 | "Expect some abnormal behavior\n"); |
4de3b992 | 96 | return; |
6065170c GL |
97 | } |
98 | ||
6065170c GL |
99 | /* Configure the XLB Arbiter priorities */ |
100 | out_be32(&xlb->master_pri_enable, 0xff); | |
101 | out_be32(&xlb->master_priority, 0x11111111); | |
102 | ||
96290957 WS |
103 | /* |
104 | * Disable XLB pipelining | |
4de3b992 GL |
105 | * (cfr errate 292. We could do this only just before ATA PIO |
106 | * transaction and re-enable it afterwards ...) | |
96290957 | 107 | * Not needed on MPC5200B. |
4de3b992 | 108 | */ |
96290957 WS |
109 | if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR) |
110 | out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); | |
6065170c | 111 | |
4de3b992 | 112 | iounmap(xlb); |
6065170c GL |
113 | } |
114 | ||
66ffbe49 GL |
115 | /** |
116 | * mpc52xx_declare_of_platform_devices: register internal devices and children | |
117 | * of the localplus bus to the of_platform | |
118 | * bus. | |
119 | */ | |
5c334eed | 120 | void __init |
6065170c GL |
121 | mpc52xx_declare_of_platform_devices(void) |
122 | { | |
123 | /* Find every child of the SOC node and add it to of_platform */ | |
a6f024bb | 124 | if (of_platform_bus_probe(NULL, mpc52xx_bus_ids, NULL)) |
5c334eed SM |
125 | printk(KERN_ERR __FILE__ ": " |
126 | "Error while probing of_platform bus\n"); | |
6065170c GL |
127 | } |
128 | ||
66ffbe49 | 129 | /* |
c8004a28 | 130 | * match tables used by mpc52xx_map_common_devices() |
66ffbe49 GL |
131 | */ |
132 | static struct of_device_id mpc52xx_gpt_ids[] __initdata = { | |
133 | { .compatible = "fsl,mpc5200-gpt", }, | |
134 | { .compatible = "mpc5200-gpt", }, /* old */ | |
135 | {} | |
136 | }; | |
c8004a28 GL |
137 | static struct of_device_id mpc52xx_cdm_ids[] __initdata = { |
138 | { .compatible = "fsl,mpc5200-cdm", }, | |
139 | { .compatible = "mpc5200-cdm", }, /* old */ | |
140 | {} | |
141 | }; | |
66ffbe49 | 142 | |
c8004a28 GL |
143 | /** |
144 | * mpc52xx_map_common_devices: iomap devices required by common code | |
145 | */ | |
86b92cdd | 146 | void __init |
c8004a28 | 147 | mpc52xx_map_common_devices(void) |
86b92cdd | 148 | { |
86b92cdd | 149 | struct device_node *np; |
c8004a28 | 150 | |
86b92cdd MB |
151 | /* mpc52xx_wdt is mapped here and used in mpc52xx_restart, |
152 | * possibly from a interrupt context. wdt is only implement | |
153 | * on a gpt0, so check has-wdt property before mapping. | |
154 | */ | |
66ffbe49 GL |
155 | for_each_matching_node(np, mpc52xx_gpt_ids) { |
156 | if (of_get_property(np, "fsl,has-wdt", NULL) || | |
157 | of_get_property(np, "has-wdt", NULL)) { | |
75ca399e GL |
158 | mpc52xx_wdt = of_iomap(np, 0); |
159 | of_node_put(np); | |
c8004a28 | 160 | break; |
86b92cdd MB |
161 | } |
162 | } | |
c8004a28 GL |
163 | |
164 | /* Clock Distribution Module, used by PSC clock setting function */ | |
165 | np = of_find_matching_node(NULL, mpc52xx_cdm_ids); | |
166 | mpc52xx_cdm = of_iomap(np, 0); | |
167 | of_node_put(np); | |
86b92cdd MB |
168 | } |
169 | ||
c8004a28 GL |
170 | /** |
171 | * mpc52xx_set_psc_clkdiv: Set clock divider in the CDM for PSC ports | |
172 | * | |
173 | * @psc_id: id of psc port; must be 1,2,3 or 6 | |
174 | * @clkdiv: clock divider value to put into CDM PSC register. | |
175 | */ | |
176 | int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv) | |
177 | { | |
178 | unsigned long flags; | |
179 | u16 __iomem *reg; | |
180 | u32 val; | |
181 | u32 mask; | |
182 | u32 mclken_div; | |
183 | ||
184 | if (!mpc52xx_cdm) | |
185 | return -ENODEV; | |
186 | ||
187 | mclken_div = 0x8000 | (clkdiv & 0x1FF); | |
188 | switch (psc_id) { | |
189 | case 1: reg = &mpc52xx_cdm->mclken_div_psc1; mask = 0x20; break; | |
190 | case 2: reg = &mpc52xx_cdm->mclken_div_psc2; mask = 0x40; break; | |
191 | case 3: reg = &mpc52xx_cdm->mclken_div_psc3; mask = 0x80; break; | |
192 | case 6: reg = &mpc52xx_cdm->mclken_div_psc6; mask = 0x10; break; | |
193 | default: | |
194 | return -ENODEV; | |
195 | } | |
196 | ||
197 | /* Set the rate and enable the clock */ | |
198 | spin_lock_irqsave(&mpc52xx_lock, flags); | |
199 | out_be16(reg, mclken_div); | |
200 | val = in_be32(&mpc52xx_cdm->clk_enables); | |
201 | out_be32(&mpc52xx_cdm->clk_enables, val | mask); | |
202 | spin_unlock_irqrestore(&mpc52xx_lock, flags); | |
203 | ||
204 | return 0; | |
205 | } | |
4187377b | 206 | EXPORT_SYMBOL(mpc52xx_set_psc_clkdiv); |
c8004a28 GL |
207 | |
208 | /** | |
209 | * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer | |
210 | */ | |
86b92cdd MB |
211 | void |
212 | mpc52xx_restart(char *cmd) | |
213 | { | |
214 | local_irq_disable(); | |
215 | ||
216 | /* Turn on the watchdog and wait for it to expire. | |
217 | * It effectively does a reset. */ | |
218 | if (mpc52xx_wdt) { | |
219 | out_be32(&mpc52xx_wdt->mode, 0x00000000); | |
220 | out_be32(&mpc52xx_wdt->count, 0x000000ff); | |
221 | out_be32(&mpc52xx_wdt->mode, 0x00009004); | |
222 | } else | |
f43c32ef WS |
223 | printk(KERN_ERR __FILE__ ": " |
224 | "mpc52xx_restart: Can't access wdt. " | |
86b92cdd MB |
225 | "Restart impossible, system halted.\n"); |
226 | ||
227 | while (1); | |
228 | } |