Commit | Line | Data |
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91bd6109 | 1 | /* |
e00c5498 | 2 | * MPC8272 ADS board support |
91bd6109 | 3 | * |
e00c5498 SW |
4 | * Copyright 2007 Freescale Semiconductor, Inc. |
5 | * Author: Scott Wood <scottwood@freescale.com> | |
91bd6109 | 6 | * |
e00c5498 | 7 | * Based on code by Vitaly Bordug <vbordug@ru.mvista.com> |
91bd6109 VB |
8 | * Copyright (c) 2006 MontaVista Software, Inc. |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | */ | |
15 | ||
91bd6109 | 16 | #include <linux/init.h> |
91bd6109 | 17 | #include <linux/interrupt.h> |
91bd6109 | 18 | #include <linux/fsl_devices.h> |
26a2056e RH |
19 | #include <linux/of_address.h> |
20 | #include <linux/of_fdt.h> | |
e00c5498 SW |
21 | #include <linux/of_platform.h> |
22 | #include <linux/io.h> | |
91bd6109 | 23 | |
91bd6109 VB |
24 | #include <asm/cpm2.h> |
25 | #include <asm/udbg.h> | |
e00c5498 SW |
26 | #include <asm/machdep.h> |
27 | #include <asm/time.h> | |
28 | ||
29 | #include <platforms/82xx/pq2.h> | |
91bd6109 VB |
30 | |
31 | #include <sysdev/fsl_soc.h> | |
14305601 | 32 | #include <sysdev/cpm2_pic.h> |
91bd6109 | 33 | |
e00c5498 | 34 | #include "pq2.h" |
91bd6109 | 35 | |
2d2294ae | 36 | static void __init mpc8272_ads_pic_init(void) |
91bd6109 | 37 | { |
e00c5498 SW |
38 | struct device_node *np = of_find_compatible_node(NULL, NULL, |
39 | "fsl,cpm2-pic"); | |
40 | if (!np) { | |
41 | printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n"); | |
91bd6109 VB |
42 | return; |
43 | } | |
e00c5498 | 44 | |
91bd6109 VB |
45 | cpm2_pic_init(np); |
46 | of_node_put(np); | |
47 | ||
91bd6109 | 48 | /* Initialize stuff for the 82xx CPLD IC and install demux */ |
e00c5498 | 49 | pq2ads_pci_init_irq(); |
91bd6109 VB |
50 | } |
51 | ||
e00c5498 SW |
52 | struct cpm_pin { |
53 | int port, pin, flags; | |
54 | }; | |
91bd6109 | 55 | |
e00c5498 SW |
56 | static struct cpm_pin mpc8272_ads_pins[] = { |
57 | /* SCC1 */ | |
58 | {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
59 | {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
60 | ||
61 | /* SCC4 */ | |
62 | {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
63 | {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
64 | ||
65 | /* FCC1 */ | |
66 | {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
67 | {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
68 | {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
69 | {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
70 | {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
71 | {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
72 | {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
73 | {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
74 | {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
75 | {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
76 | {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
77 | {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
78 | {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
79 | {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | |
80 | {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
81 | {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
82 | ||
83 | /* FCC2 */ | |
84 | {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
85 | {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
86 | {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
87 | {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
88 | {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
89 | {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
90 | {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
91 | {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
92 | {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
93 | {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
94 | {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
95 | {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
96 | {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
97 | {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
98 | {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
99 | {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
a5d28c8e JF |
100 | |
101 | /* I2C */ | |
102 | {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, | |
103 | {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, | |
818fcac5 AV |
104 | |
105 | /* USB */ | |
106 | {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
107 | {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
108 | {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
109 | {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
110 | {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
111 | {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
112 | {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
e00c5498 | 113 | }; |
91bd6109 | 114 | |
e00c5498 | 115 | static void __init init_ioports(void) |
91bd6109 | 116 | { |
e00c5498 | 117 | int i; |
91bd6109 | 118 | |
e00c5498 SW |
119 | for (i = 0; i < ARRAY_SIZE(mpc8272_ads_pins); i++) { |
120 | struct cpm_pin *pin = &mpc8272_ads_pins[i]; | |
121 | cpm2_set_pin(pin->port, pin->pin, pin->flags); | |
91bd6109 | 122 | } |
91bd6109 | 123 | |
e00c5498 SW |
124 | cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX); |
125 | cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX); | |
818fcac5 AV |
126 | cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_RX); |
127 | cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX); | |
e00c5498 SW |
128 | cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX); |
129 | cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX); | |
130 | cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX); | |
131 | cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX); | |
132 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX); | |
133 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK16, CPM_CLK_TX); | |
91bd6109 VB |
134 | } |
135 | ||
e00c5498 | 136 | static void __init mpc8272_ads_setup_arch(void) |
91bd6109 | 137 | { |
e00c5498 SW |
138 | struct device_node *np; |
139 | __be32 __iomem *bcsr; | |
91bd6109 | 140 | |
e00c5498 SW |
141 | if (ppc_md.progress) |
142 | ppc_md.progress("mpc8272_ads_setup_arch()", 0); | |
91bd6109 | 143 | |
e00c5498 | 144 | cpm2_reset(); |
91bd6109 | 145 | |
e00c5498 | 146 | np = of_find_compatible_node(NULL, NULL, "fsl,mpc8272ads-bcsr"); |
91bd6109 | 147 | if (!np) { |
e00c5498 | 148 | printk(KERN_ERR "No bcsr in device tree\n"); |
91bd6109 VB |
149 | return; |
150 | } | |
e00c5498 SW |
151 | |
152 | bcsr = of_iomap(np, 0); | |
75e89b02 | 153 | of_node_put(np); |
e00c5498 SW |
154 | if (!bcsr) { |
155 | printk(KERN_ERR "Cannot map BCSR registers\n"); | |
91bd6109 VB |
156 | return; |
157 | } | |
91bd6109 | 158 | |
a70e88bc AV |
159 | #define BCSR1_FETHIEN 0x08000000 |
160 | #define BCSR1_FETH_RST 0x04000000 | |
161 | #define BCSR1_RS232_EN1 0x02000000 | |
162 | #define BCSR1_RS232_EN2 0x01000000 | |
818fcac5 | 163 | #define BCSR3_USB_nEN 0x80000000 |
a70e88bc AV |
164 | #define BCSR3_FETHIEN2 0x10000000 |
165 | #define BCSR3_FETH2_RST 0x08000000 | |
166 | ||
e00c5498 SW |
167 | clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN); |
168 | setbits32(&bcsr[1], BCSR1_FETH_RST); | |
91bd6109 | 169 | |
e00c5498 SW |
170 | clrbits32(&bcsr[3], BCSR3_FETHIEN2); |
171 | setbits32(&bcsr[3], BCSR3_FETH2_RST); | |
91bd6109 | 172 | |
818fcac5 AV |
173 | clrbits32(&bcsr[3], BCSR3_USB_nEN); |
174 | ||
e00c5498 | 175 | iounmap(bcsr); |
91bd6109 | 176 | |
e00c5498 SW |
177 | init_ioports(); |
178 | pq2_init_pci(); | |
91bd6109 | 179 | |
e00c5498 SW |
180 | if (ppc_md.progress) |
181 | ppc_md.progress("mpc8272_ads_setup_arch(), finish", 0); | |
91bd6109 VB |
182 | } |
183 | ||
e00c5498 SW |
184 | static struct of_device_id __initdata of_bus_ids[] = { |
185 | { .name = "soc", }, | |
186 | { .name = "cpm", }, | |
187 | { .name = "localbus", }, | |
188 | {}, | |
91bd6109 VB |
189 | }; |
190 | ||
e00c5498 | 191 | static int __init declare_of_platform_devices(void) |
91bd6109 | 192 | { |
e00c5498 SW |
193 | /* Publish the QE devices */ |
194 | of_platform_bus_probe(NULL, of_bus_ids, NULL); | |
91bd6109 VB |
195 | return 0; |
196 | } | |
ca956f0e | 197 | machine_device_initcall(mpc8272_ads, declare_of_platform_devices); |
91bd6109 VB |
198 | |
199 | /* | |
200 | * Called very early, device-tree isn't unflattened | |
201 | */ | |
2d2294ae | 202 | static int __init mpc8272_ads_probe(void) |
91bd6109 | 203 | { |
e00c5498 SW |
204 | unsigned long root = of_get_flat_dt_root(); |
205 | return of_flat_dt_is_compatible(root, "fsl,mpc8272ads"); | |
91bd6109 VB |
206 | } |
207 | ||
2d2294ae | 208 | define_machine(mpc8272_ads) |
91bd6109 | 209 | { |
e00c5498 SW |
210 | .name = "Freescale MPC8272 ADS", |
211 | .probe = mpc8272_ads_probe, | |
212 | .setup_arch = mpc8272_ads_setup_arch, | |
213 | .init_IRQ = mpc8272_ads_pic_init, | |
214 | .get_irq = cpm2_get_irq, | |
4ff62e1c | 215 | .calibrate_decr = generic_calibrate_decr, |
e00c5498 SW |
216 | .restart = pq2_restart, |
217 | .progress = udbg_progress, | |
91bd6109 | 218 | }; |