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9020fc96 | 1 | /* |
8a56e1ee | 2 | * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved. |
9020fc96 KP |
3 | * |
4 | * Description: | |
5 | * MPC832xE MDS board specific routines. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License as published by the | |
9 | * Free Software Foundation; either version 2 of the License, or (at your | |
10 | * option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/stddef.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/errno.h> | |
17 | #include <linux/reboot.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/kdev_t.h> | |
20 | #include <linux/major.h> | |
21 | #include <linux/console.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/seq_file.h> | |
24 | #include <linux/root_dev.h> | |
25 | #include <linux/initrd.h> | |
882407b9 JL |
26 | #include <linux/of_platform.h> |
27 | #include <linux/of_device.h> | |
9020fc96 | 28 | |
60063497 | 29 | #include <linux/atomic.h> |
9020fc96 KP |
30 | #include <asm/time.h> |
31 | #include <asm/io.h> | |
32 | #include <asm/machdep.h> | |
33 | #include <asm/ipic.h> | |
9020fc96 KP |
34 | #include <asm/irq.h> |
35 | #include <asm/prom.h> | |
36 | #include <asm/udbg.h> | |
37 | #include <sysdev/fsl_soc.h> | |
76fe1ffc | 38 | #include <sysdev/fsl_pci.h> |
7aa1aa6e ZQ |
39 | #include <soc/fsl/qe/qe.h> |
40 | #include <soc/fsl/qe/qe_ic.h> | |
9020fc96 KP |
41 | |
42 | #include "mpc83xx.h" | |
9020fc96 KP |
43 | |
44 | #undef DEBUG | |
45 | #ifdef DEBUG | |
46 | #define DBG(fmt...) udbg_printf(fmt) | |
47 | #else | |
48 | #define DBG(fmt...) | |
49 | #endif | |
50 | ||
9020fc96 KP |
51 | /* ************************************************************************ |
52 | * | |
53 | * Setup the architecture | |
54 | * | |
55 | */ | |
56 | static void __init mpc832x_sys_setup_arch(void) | |
57 | { | |
58 | struct device_node *np; | |
81b36a0b | 59 | u8 __iomem *bcsr_regs = NULL; |
9020fc96 KP |
60 | |
61 | if (ppc_md.progress) | |
62 | ppc_md.progress("mpc832x_sys_setup_arch()", 0); | |
63 | ||
9020fc96 KP |
64 | /* Map BCSR area */ |
65 | np = of_find_node_by_name(NULL, "bcsr"); | |
81b36a0b | 66 | if (np) { |
9020fc96 KP |
67 | struct resource res; |
68 | ||
69 | of_address_to_resource(np, 0, &res); | |
28f65c11 | 70 | bcsr_regs = ioremap(res.start, resource_size(&res)); |
9020fc96 KP |
71 | of_node_put(np); |
72 | } | |
73 | ||
bede480d | 74 | mpc83xx_setup_pci(); |
9020fc96 KP |
75 | |
76 | #ifdef CONFIG_QUICC_ENGINE | |
06cd9396 | 77 | if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) { |
9020fc96 KP |
78 | par_io_init(np); |
79 | of_node_put(np); | |
80 | ||
81 | for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;) | |
82 | par_io_of_config(np); | |
83 | } | |
84 | ||
85 | if ((np = of_find_compatible_node(NULL, "network", "ucc_geth")) | |
86 | != NULL){ | |
d8ecbb93 KP |
87 | /* Reset the Ethernet PHYs */ |
88 | #define BCSR8_FETH_RST 0x50 | |
81b36a0b | 89 | clrbits8(&bcsr_regs[8], BCSR8_FETH_RST); |
9020fc96 | 90 | udelay(1000); |
81b36a0b | 91 | setbits8(&bcsr_regs[8], BCSR8_FETH_RST); |
9020fc96 KP |
92 | iounmap(bcsr_regs); |
93 | of_node_put(np); | |
94 | } | |
9020fc96 | 95 | #endif /* CONFIG_QUICC_ENGINE */ |
9020fc96 KP |
96 | } |
97 | ||
7669d58c | 98 | machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices); |
8746ed3d | 99 | |
9020fc96 KP |
100 | /* |
101 | * Called very early, MMU is off, device-tree isn't unflattened | |
102 | */ | |
103 | static int __init mpc832x_sys_probe(void) | |
104 | { | |
336c3c2e | 105 | unsigned long root = of_get_flat_dt_root(); |
9020fc96 | 106 | |
336c3c2e | 107 | return of_flat_dt_is_compatible(root, "MPC832xMDS"); |
9020fc96 KP |
108 | } |
109 | ||
110 | define_machine(mpc832x_mds) { | |
111 | .name = "MPC832x MDS", | |
112 | .probe = mpc832x_sys_probe, | |
113 | .setup_arch = mpc832x_sys_setup_arch, | |
d4fb5ebd | 114 | .init_IRQ = mpc83xx_ipic_and_qe_init_IRQ, |
9020fc96 KP |
115 | .get_irq = ipic_get_irq, |
116 | .restart = mpc83xx_restart, | |
117 | .time_init = mpc83xx_time_init, | |
118 | .calibrate_decr = generic_calibrate_decr, | |
119 | .progress = udbg_progress, | |
120 | }; |