projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| fb8e3e1f PA |
1 | /* |
| 2 | * MPC85xx RDB Board Setup | |
| 3 | * | |
| 4 | * Copyright 2009 Freescale Semiconductor Inc. | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify it | |
| 7 | * under the terms of the GNU General Public License as published by the | |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your | |
| 9 | * option) any later version. | |
| 10 | */ | |
| 11 | ||
| 12 | #include <linux/stddef.h> | |
| 13 | #include <linux/kernel.h> | |
| 14 | #include <linux/pci.h> | |
| 15 | #include <linux/kdev_t.h> | |
| 16 | #include <linux/delay.h> | |
| 17 | #include <linux/seq_file.h> | |
| 18 | #include <linux/interrupt.h> | |
| 19 | #include <linux/of_platform.h> | |
| 20 | ||
| 21 | #include <asm/system.h> | |
| 22 | #include <asm/time.h> | |
| 23 | #include <asm/machdep.h> | |
| 24 | #include <asm/pci-bridge.h> | |
| 25 | #include <mm/mmu_decl.h> | |
| 26 | #include <asm/prom.h> | |
| 27 | #include <asm/udbg.h> | |
| 28 | #include <asm/mpic.h> | |
| 29 | ||
| 30 | #include <sysdev/fsl_soc.h> | |
| 31 | #include <sysdev/fsl_pci.h> | |
| 582d3e09 | 32 | #include "smp.h" |
| fb8e3e1f | 33 | |
| 543a07b1 DES |
34 | #include "mpc85xx.h" |
| 35 | ||
| fb8e3e1f PA |
36 | #undef DEBUG |
| 37 | ||
| 38 | #ifdef DEBUG | |
| 39 | #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) | |
| 40 | #else | |
| 41 | #define DBG(fmt, args...) | |
| 42 | #endif | |
| 43 | ||
| 44 | ||
| 45 | void __init mpc85xx_rdb_pic_init(void) | |
| 46 | { | |
| 47 | struct mpic *mpic; | |
| dc2e673d | 48 | unsigned long root = of_get_flat_dt_root(); |
| fb8e3e1f | 49 | |
| a63e23b9 | 50 | if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) { |
| e55d7f73 | 51 | mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET | |
| 5019609f | 52 | MPIC_BIG_ENDIAN | |
| a63e23b9 | 53 | MPIC_SINGLE_DEST_CPU, |
| dc2e673d PA |
54 | 0, 256, " OpenPIC "); |
| 55 | } else { | |
| 996983b7 | 56 | mpic = mpic_alloc(NULL, 0, |
| 5019609f | 57 | MPIC_BIG_ENDIAN | |
| fb8e3e1f PA |
58 | MPIC_SINGLE_DEST_CPU, |
| 59 | 0, 256, " OpenPIC "); | |
| dc2e673d | 60 | } |
| fb8e3e1f PA |
61 | |
| 62 | BUG_ON(mpic == NULL); | |
| fb8e3e1f | 63 | mpic_init(mpic); |
| fb8e3e1f PA |
64 | } |
| 65 | ||
| 66 | /* | |
| 67 | * Setup the architecture | |
| 68 | */ | |
| fb8e3e1f PA |
69 | static void __init mpc85xx_rdb_setup_arch(void) |
| 70 | { | |
| 71 | #ifdef CONFIG_PCI | |
| 72 | struct device_node *np; | |
| 73 | #endif | |
| 74 | ||
| 75 | if (ppc_md.progress) | |
| 76 | ppc_md.progress("mpc85xx_rdb_setup_arch()", 0); | |
| 77 | ||
| 78 | #ifdef CONFIG_PCI | |
| 79 | for_each_node_by_type(np, "pci") { | |
| 80 | if (of_device_is_compatible(np, "fsl,mpc8548-pcie")) | |
| 81 | fsl_add_bridge(np, 0); | |
| 82 | } | |
| 83 | ||
| 84 | #endif | |
| 85 | ||
| fb8e3e1f | 86 | mpc85xx_smp_init(); |
| fb8e3e1f PA |
87 | printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n"); |
| 88 | } | |
| 89 | ||
| 46d026ac | 90 | machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices); |
| 35ce1b5a | 91 | machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices); |
| d1fb1060 | 92 | machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices); |
| 46d026ac | 93 | machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices); |
| b73bdf48 | 94 | machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices); |
| 6886780a | 95 | machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices); |
| fb8e3e1f PA |
96 | |
| 97 | /* | |
| 98 | * Called very early, device-tree isn't unflattened | |
| 99 | */ | |
| 100 | static int __init p2020_rdb_probe(void) | |
| 101 | { | |
| 102 | unsigned long root = of_get_flat_dt_root(); | |
| 103 | ||
| 104 | if (of_flat_dt_is_compatible(root, "fsl,P2020RDB")) | |
| 105 | return 1; | |
| 106 | return 0; | |
| 107 | } | |
| 108 | ||
| 52dffd7f PA |
109 | static int __init p1020_rdb_probe(void) |
| 110 | { | |
| 111 | unsigned long root = of_get_flat_dt_root(); | |
| 112 | ||
| 113 | if (of_flat_dt_is_compatible(root, "fsl,P1020RDB")) | |
| 114 | return 1; | |
| 115 | return 0; | |
| 116 | } | |
| 117 | ||
| b73bdf48 XJ |
118 | static int __init p1021_rdb_pc_probe(void) |
| 119 | { | |
| 120 | unsigned long root = of_get_flat_dt_root(); | |
| 121 | ||
| 122 | if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC")) | |
| 123 | return 1; | |
| 124 | return 0; | |
| 125 | } | |
| 126 | ||
| 35ce1b5a TY |
127 | static int __init p2020_rdb_pc_probe(void) |
| 128 | { | |
| 129 | unsigned long root = of_get_flat_dt_root(); | |
| 130 | ||
| 131 | if (of_flat_dt_is_compatible(root, "fsl,P2020RDB-PC")) | |
| 132 | return 1; | |
| 133 | return 0; | |
| 134 | } | |
| 135 | ||
| 6886780a ZF |
136 | static int __init p1025_rdb_probe(void) |
| 137 | { | |
| 138 | unsigned long root = of_get_flat_dt_root(); | |
| 139 | ||
| 140 | return of_flat_dt_is_compatible(root, "fsl,P1025RDB"); | |
| 141 | } | |
| 142 | ||
| d1fb1060 JH |
143 | static int __init p1020_mbg_pc_probe(void) |
| 144 | { | |
| 145 | unsigned long root = of_get_flat_dt_root(); | |
| 146 | ||
| 147 | return of_flat_dt_is_compatible(root, "fsl,P1020MBG-PC"); | |
| 148 | } | |
| 149 | ||
| fb8e3e1f PA |
150 | define_machine(p2020_rdb) { |
| 151 | .name = "P2020 RDB", | |
| 152 | .probe = p2020_rdb_probe, | |
| 153 | .setup_arch = mpc85xx_rdb_setup_arch, | |
| 154 | .init_IRQ = mpc85xx_rdb_pic_init, | |
| 155 | #ifdef CONFIG_PCI | |
| 156 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | |
| 157 | #endif | |
| 158 | .get_irq = mpic_get_irq, | |
| 159 | .restart = fsl_rstcr_restart, | |
| 160 | .calibrate_decr = generic_calibrate_decr, | |
| 161 | .progress = udbg_progress, | |
| 162 | }; | |
| 52dffd7f PA |
163 | |
| 164 | define_machine(p1020_rdb) { | |
| 165 | .name = "P1020 RDB", | |
| 166 | .probe = p1020_rdb_probe, | |
| 167 | .setup_arch = mpc85xx_rdb_setup_arch, | |
| 168 | .init_IRQ = mpc85xx_rdb_pic_init, | |
| 169 | #ifdef CONFIG_PCI | |
| 170 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | |
| 171 | #endif | |
| 172 | .get_irq = mpic_get_irq, | |
| 173 | .restart = fsl_rstcr_restart, | |
| 174 | .calibrate_decr = generic_calibrate_decr, | |
| 175 | .progress = udbg_progress, | |
| 176 | }; | |
| b73bdf48 XJ |
177 | |
| 178 | define_machine(p1021_rdb_pc) { | |
| 179 | .name = "P1021 RDB-PC", | |
| 180 | .probe = p1021_rdb_pc_probe, | |
| 181 | .setup_arch = mpc85xx_rdb_setup_arch, | |
| 182 | .init_IRQ = mpc85xx_rdb_pic_init, | |
| 183 | #ifdef CONFIG_PCI | |
| 184 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | |
| 185 | #endif | |
| 186 | .get_irq = mpic_get_irq, | |
| 187 | .restart = fsl_rstcr_restart, | |
| 188 | .calibrate_decr = generic_calibrate_decr, | |
| 189 | .progress = udbg_progress, | |
| 190 | }; | |
| 35ce1b5a TY |
191 | |
| 192 | define_machine(p2020_rdb_pc) { | |
| 193 | .name = "P2020RDB-PC", | |
| 194 | .probe = p2020_rdb_pc_probe, | |
| 195 | .setup_arch = mpc85xx_rdb_setup_arch, | |
| 196 | .init_IRQ = mpc85xx_rdb_pic_init, | |
| 197 | #ifdef CONFIG_PCI | |
| 198 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | |
| 199 | #endif | |
| 200 | .get_irq = mpic_get_irq, | |
| 201 | .restart = fsl_rstcr_restart, | |
| 202 | .calibrate_decr = generic_calibrate_decr, | |
| 203 | .progress = udbg_progress, | |
| 204 | }; | |
| 6886780a ZF |
205 | |
| 206 | define_machine(p1025_rdb) { | |
| 207 | .name = "P1025 RDB", | |
| 208 | .probe = p1025_rdb_probe, | |
| 209 | .setup_arch = mpc85xx_rdb_setup_arch, | |
| 210 | .init_IRQ = mpc85xx_rdb_pic_init, | |
| 211 | #ifdef CONFIG_PCI | |
| 212 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | |
| 213 | #endif | |
| 214 | .get_irq = mpic_get_irq, | |
| 215 | .restart = fsl_rstcr_restart, | |
| 216 | .calibrate_decr = generic_calibrate_decr, | |
| 217 | .progress = udbg_progress, | |
| 218 | }; | |
| d1fb1060 JH |
219 | |
| 220 | define_machine(p1020_mbg_pc) { | |
| 221 | .name = "P1020 MBG-PC", | |
| 222 | .probe = p1020_mbg_pc_probe, | |
| 223 | .setup_arch = mpc85xx_rdb_setup_arch, | |
| 224 | .init_IRQ = mpc85xx_rdb_pic_init, | |
| 225 | #ifdef CONFIG_PCI | |
| 226 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | |
| 227 | #endif | |
| 228 | .get_irq = mpic_get_irq, | |
| 229 | .restart = fsl_rstcr_restart, | |
| 230 | .calibrate_decr = generic_calibrate_decr, | |
| 231 | .progress = udbg_progress, | |
| 232 | }; |