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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[deliverable/linux.git] / arch / powerpc / platforms / 85xx / mpc85xx_rdb.c
CommitLineData
fb8e3e1f
PA		 1/*
2 * MPC85xx RDB Board Setup
3 *
72c916ae 4 * Copyright 2009,2012-2013 Freescale Semiconductor Inc.
fb8e3e1f
PA		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/stddef.h>
13#include <linux/kernel.h>
14#include <linux/pci.h>
15#include <linux/kdev_t.h>
16#include <linux/delay.h>
17#include <linux/seq_file.h>
18#include <linux/interrupt.h>
19#include <linux/of_platform.h>
94848654 20#include <linux/fsl/guts.h>
fb8e3e1f 21
fb8e3e1f
PA		 22#include <asm/time.h>
23#include <asm/machdep.h>
24#include <asm/pci-bridge.h>
25#include <mm/mmu_decl.h>
26#include <asm/prom.h>
27#include <asm/udbg.h>
28#include <asm/mpic.h>
7aa1aa6e
ZQ		 29#include <soc/fsl/qe/qe.h>
30#include <soc/fsl/qe/qe_ic.h>
fb8e3e1f
PA		 31
32#include <sysdev/fsl_soc.h>
33#include <sysdev/fsl_pci.h>
582d3e09 34#include "smp.h"
fb8e3e1f 35
543a07b1
DES		 36#include "mpc85xx.h"
37
fb8e3e1f
PA		 38#undef DEBUG
39
40#ifdef DEBUG
41#define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
42#else
43#define DBG(fmt, args...)
44#endif
45
46
47void __init mpc85xx_rdb_pic_init(void)
48{
49 struct mpic *mpic;
fb8e3e1f 50
04e358d8
ZF		 51#ifdef CONFIG_QUICC_ENGINE
52 struct device_node *np;
53#endif
54
acd3578e 55 if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) {
e55d7f73 56 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
5019609f 57 MPIC_BIG_ENDIAN |
a63e23b9 58 MPIC_SINGLE_DEST_CPU,
dc2e673d
PA		 59 0, 256, " OpenPIC ");
60 } else {
996983b7 61 mpic = mpic_alloc(NULL, 0,
5019609f 62 MPIC_BIG_ENDIAN |
fb8e3e1f
PA		 63 MPIC_SINGLE_DEST_CPU,
64 0, 256, " OpenPIC ");
dc2e673d 65 }
fb8e3e1f
PA		 66
67 BUG_ON(mpic == NULL);
fb8e3e1f 68 mpic_init(mpic);
04e358d8
ZF		 69
70#ifdef CONFIG_QUICC_ENGINE
71 np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
72 if (np) {
73 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
74 qe_ic_cascade_high_mpic);
75 of_node_put(np);
76
77 } else
78 pr_err("%s: Could not find qe-ic node\n", __func__);
79#endif
80
fb8e3e1f
PA		 81}
82
83/*
84 * Setup the architecture
85 */
fb8e3e1f
PA		 86static void __init mpc85xx_rdb_setup_arch(void)
87{
fb8e3e1f
PA		 88 if (ppc_md.progress)
89 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
90
fb8e3e1f 91 mpc85xx_smp_init();
04e358d8 92
905e75c4
JH		 93 fsl_pci_assign_primary();
94
04e358d8 95#ifdef CONFIG_QUICC_ENGINE
72c916ae 96 mpc85xx_qe_init();
706f4aa0 97 mpc85xx_qe_par_io_init();
04e358d8
ZF		 98#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
99 if (machine_is(p1025_rdb)) {
b0ad062c 100 struct device_node *np;
04e358d8 101
9cb6abcb 102 struct ccsr_guts __iomem *guts;
04e358d8
ZF		 103
104 np = of_find_node_by_name(NULL, "global-utilities");
105 if (np) {
106 guts = of_iomap(np, 0);
107 if (!guts) {
108
109 pr_err("mpc85xx-rdb: could not map global utilities register\n");
110
111 } else {
112 /* P1025 has pins muxed for QE and other functions. To
113 * enable QE UEC mode, we need to set bit QE0 for UCC1
114 * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
115 * and QE12 for QE MII management singals in PMUXCR
116 * register.
117 */
118 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
119 MPC85xx_PMUXCR_QE(3) |
120 MPC85xx_PMUXCR_QE(9) |
121 MPC85xx_PMUXCR_QE(12));
122 iounmap(guts);
123 }
124 of_node_put(np);
125 }
126
127 }
128#endif
04e358d8
ZF		 129#endif /* CONFIG_QUICC_ENGINE */
130
fb8e3e1f
PA		 131 printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
132}
133
905e75c4
JH		 134machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
135machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
136machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
137machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
138machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
550593e8 139machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
905e75c4
JH		 140machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
141machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
142machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
143machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
fb8e3e1f
PA		 144
145/*
146 * Called very early, device-tree isn't unflattened
147 */
148static int __init p2020_rdb_probe(void)
149{
56571384 150 if (of_machine_is_compatible("fsl,P2020RDB"))
fb8e3e1f
PA		 151 return 1;
152 return 0;
153}
154
52dffd7f
PA		 155static int __init p1020_rdb_probe(void)
156{
56571384 157 if (of_machine_is_compatible("fsl,P1020RDB"))
52dffd7f
PA		 158 return 1;
159 return 0;
160}
161
7e6af144
ZF		 162static int __init p1020_rdb_pc_probe(void)
163{
56571384 164 return of_machine_is_compatible("fsl,P1020RDB-PC");
7e6af144
ZF		 165}
166
550593e8
HZ		 167static int __init p1020_rdb_pd_probe(void)
168{
56571384 169 return of_machine_is_compatible("fsl,P1020RDB-PD");
550593e8
HZ		 170}
171
b73bdf48
XJ		 172static int __init p1021_rdb_pc_probe(void)
173{
56571384 174 if (of_machine_is_compatible("fsl,P1021RDB-PC"))
b73bdf48
XJ		 175 return 1;
176 return 0;
177}
178
35ce1b5a
TY		 179static int __init p2020_rdb_pc_probe(void)
180{
56571384 181 if (of_machine_is_compatible("fsl,P2020RDB-PC"))
35ce1b5a
TY		 182 return 1;
183 return 0;
184}
185
6886780a
ZF		 186static int __init p1025_rdb_probe(void)
187{
56571384 188 return of_machine_is_compatible("fsl,P1025RDB");
6886780a
ZF		 189}
190
d1fb1060
JH		 191static int __init p1020_mbg_pc_probe(void)
192{
56571384 193 return of_machine_is_compatible("fsl,P1020MBG-PC");
d1fb1060
JH		 194}
195
1a244b83
JH		 196static int __init p1020_utm_pc_probe(void)
197{
56571384 198 return of_machine_is_compatible("fsl,P1020UTM-PC");
1a244b83
JH		 199}
200
063e94bb
TY		 201static int __init p1024_rdb_probe(void)
202{
56571384 203 return of_machine_is_compatible("fsl,P1024RDB");
063e94bb
TY		 204}
205
fb8e3e1f
PA		 206define_machine(p2020_rdb) {
207 .name = "P2020 RDB",
208 .probe = p2020_rdb_probe,
209 .setup_arch = mpc85xx_rdb_setup_arch,
210 .init_IRQ = mpc85xx_rdb_pic_init,
211#ifdef CONFIG_PCI
212 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 213 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
fb8e3e1f
PA		 214#endif
215 .get_irq = mpic_get_irq,
216 .restart = fsl_rstcr_restart,
217 .calibrate_decr = generic_calibrate_decr,
218 .progress = udbg_progress,
219};
52dffd7f
PA		 220
221define_machine(p1020_rdb) {
222 .name = "P1020 RDB",
223 .probe = p1020_rdb_probe,
224 .setup_arch = mpc85xx_rdb_setup_arch,
225 .init_IRQ = mpc85xx_rdb_pic_init,
226#ifdef CONFIG_PCI
227 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 228 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
52dffd7f
PA		 229#endif
230 .get_irq = mpic_get_irq,
231 .restart = fsl_rstcr_restart,
232 .calibrate_decr = generic_calibrate_decr,
233 .progress = udbg_progress,
234};
b73bdf48
XJ		 235
236define_machine(p1021_rdb_pc) {
237 .name = "P1021 RDB-PC",
238 .probe = p1021_rdb_pc_probe,
239 .setup_arch = mpc85xx_rdb_setup_arch,
240 .init_IRQ = mpc85xx_rdb_pic_init,
241#ifdef CONFIG_PCI
242 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 243 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
b73bdf48
XJ		 244#endif
245 .get_irq = mpic_get_irq,
246 .restart = fsl_rstcr_restart,
247 .calibrate_decr = generic_calibrate_decr,
248 .progress = udbg_progress,
249};
35ce1b5a
TY		 250
251define_machine(p2020_rdb_pc) {
252 .name = "P2020RDB-PC",
253 .probe = p2020_rdb_pc_probe,
254 .setup_arch = mpc85xx_rdb_setup_arch,
255 .init_IRQ = mpc85xx_rdb_pic_init,
256#ifdef CONFIG_PCI
257 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 258 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
35ce1b5a
TY		 259#endif
260 .get_irq = mpic_get_irq,
261 .restart = fsl_rstcr_restart,
262 .calibrate_decr = generic_calibrate_decr,
263 .progress = udbg_progress,
264};
6886780a
ZF		 265
266define_machine(p1025_rdb) {
267 .name = "P1025 RDB",
268 .probe = p1025_rdb_probe,
269 .setup_arch = mpc85xx_rdb_setup_arch,
270 .init_IRQ = mpc85xx_rdb_pic_init,
271#ifdef CONFIG_PCI
272 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 273 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
6886780a
ZF		 274#endif
275 .get_irq = mpic_get_irq,
276 .restart = fsl_rstcr_restart,
277 .calibrate_decr = generic_calibrate_decr,
278 .progress = udbg_progress,
279};
d1fb1060
JH		 280
281define_machine(p1020_mbg_pc) {
282 .name = "P1020 MBG-PC",
283 .probe = p1020_mbg_pc_probe,
284 .setup_arch = mpc85xx_rdb_setup_arch,
285 .init_IRQ = mpc85xx_rdb_pic_init,
286#ifdef CONFIG_PCI
287 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 288 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
d1fb1060
JH		 289#endif
290 .get_irq = mpic_get_irq,
291 .restart = fsl_rstcr_restart,
292 .calibrate_decr = generic_calibrate_decr,
293 .progress = udbg_progress,
294};
1a244b83
JH		 295
296define_machine(p1020_utm_pc) {
297 .name = "P1020 UTM-PC",
298 .probe = p1020_utm_pc_probe,
299 .setup_arch = mpc85xx_rdb_setup_arch,
300 .init_IRQ = mpc85xx_rdb_pic_init,
301#ifdef CONFIG_PCI
302 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 303 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
1a244b83
JH		 304#endif
305 .get_irq = mpic_get_irq,
306 .restart = fsl_rstcr_restart,
307 .calibrate_decr = generic_calibrate_decr,
308 .progress = udbg_progress,
309};
7e6af144
ZF		 310
311define_machine(p1020_rdb_pc) {
312 .name = "P1020RDB-PC",
313 .probe = p1020_rdb_pc_probe,
314 .setup_arch = mpc85xx_rdb_setup_arch,
315 .init_IRQ = mpc85xx_rdb_pic_init,
316#ifdef CONFIG_PCI
317 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 318 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
7e6af144
ZF		 319#endif
320 .get_irq = mpic_get_irq,
321 .restart = fsl_rstcr_restart,
322 .calibrate_decr = generic_calibrate_decr,
323 .progress = udbg_progress,
324};
063e94bb 325
550593e8
HZ		 326define_machine(p1020_rdb_pd) {
327 .name = "P1020RDB-PD",
328 .probe = p1020_rdb_pd_probe,
329 .setup_arch = mpc85xx_rdb_setup_arch,
330 .init_IRQ = mpc85xx_rdb_pic_init,
331#ifdef CONFIG_PCI
332 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 333 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
550593e8
HZ		 334#endif
335 .get_irq = mpic_get_irq,
336 .restart = fsl_rstcr_restart,
337 .calibrate_decr = generic_calibrate_decr,
338 .progress = udbg_progress,
339};
340
063e94bb
TY		 341define_machine(p1024_rdb) {
342 .name = "P1024 RDB",
343 .probe = p1024_rdb_probe,
344 .setup_arch = mpc85xx_rdb_setup_arch,
345 .init_IRQ = mpc85xx_rdb_pic_init,
346#ifdef CONFIG_PCI
347 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
48b16180 348 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
063e94bb
TY		 349#endif
350 .get_irq = mpic_get_irq,
351 .restart = fsl_rstcr_restart,
352 .calibrate_decr = generic_calibrate_decr,
353 .progress = udbg_progress,
354};
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