Commit | Line | Data |
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2c198061 PG |
1 | /* |
2 | * Wind River SBC8560 setup and early boot code. | |
3 | * | |
4 | * Copyright 2007 Wind River Systems Inc. | |
5 | * | |
6 | * By Paul Gortmaker (see MAINTAINERS for contact information) | |
7 | * | |
8 | * Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | */ | |
15 | ||
16 | #include <linux/stddef.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/kdev_t.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/seq_file.h> | |
22 | #include <linux/of_platform.h> | |
23 | ||
2c198061 PG |
24 | #include <asm/time.h> |
25 | #include <asm/machdep.h> | |
26 | #include <asm/pci-bridge.h> | |
27 | #include <asm/mpic.h> | |
28 | #include <mm/mmu_decl.h> | |
29 | #include <asm/udbg.h> | |
30 | ||
31 | #include <sysdev/fsl_soc.h> | |
32 | #include <sysdev/fsl_pci.h> | |
33 | ||
543a07b1 DES |
34 | #include "mpc85xx.h" |
35 | ||
2c198061 PG |
36 | #ifdef CONFIG_CPM2 |
37 | #include <asm/cpm2.h> | |
38 | #include <sysdev/cpm2_pic.h> | |
39 | #endif | |
40 | ||
2c198061 PG |
41 | static void __init sbc8560_pic_init(void) |
42 | { | |
e55d7f73 | 43 | struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN, |
2c198061 PG |
44 | 0, 256, " OpenPIC "); |
45 | BUG_ON(mpic == NULL); | |
2c198061 PG |
46 | mpic_init(mpic); |
47 | ||
543a07b1 | 48 | mpc85xx_cpm2_pic_init(); |
2c198061 PG |
49 | } |
50 | ||
51 | /* | |
52 | * Setup the architecture | |
53 | */ | |
54 | #ifdef CONFIG_CPM2 | |
55 | struct cpm_pin { | |
56 | int port, pin, flags; | |
57 | }; | |
58 | ||
59 | static const struct cpm_pin sbc8560_pins[] = { | |
60 | /* SCC1 */ | |
61 | {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
62 | {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
63 | {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
64 | ||
65 | /* SCC2 */ | |
66 | {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
67 | {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
68 | {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
69 | ||
70 | /* FCC2 */ | |
71 | {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
72 | {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
73 | {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
74 | {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
75 | {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
76 | {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
77 | {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
78 | {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
79 | {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
80 | {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
81 | {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
82 | {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
83 | {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
84 | {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
85 | {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */ | |
86 | {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */ | |
87 | ||
88 | /* FCC3 */ | |
89 | {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
90 | {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
91 | {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
92 | {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
93 | {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
94 | {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
95 | {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
96 | {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
97 | {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
98 | {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
99 | {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
100 | {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
101 | {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
102 | {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
103 | {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */ | |
104 | {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */ | |
105 | }; | |
106 | ||
107 | static void __init init_ioports(void) | |
108 | { | |
109 | int i; | |
110 | ||
111 | for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) { | |
66576a87 | 112 | const struct cpm_pin *pin = &sbc8560_pins[i]; |
2c198061 PG |
113 | cpm2_set_pin(pin->port, pin->pin, pin->flags); |
114 | } | |
115 | ||
116 | cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX); | |
117 | cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX); | |
118 | cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX); | |
119 | cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX); | |
120 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX); | |
121 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX); | |
122 | cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX); | |
123 | cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX); | |
124 | } | |
125 | #endif | |
126 | ||
127 | static void __init sbc8560_setup_arch(void) | |
128 | { | |
129 | #ifdef CONFIG_PCI | |
130 | struct device_node *np; | |
131 | #endif | |
132 | ||
133 | if (ppc_md.progress) | |
134 | ppc_md.progress("sbc8560_setup_arch()", 0); | |
135 | ||
136 | #ifdef CONFIG_CPM2 | |
137 | cpm2_reset(); | |
138 | init_ioports(); | |
139 | #endif | |
140 | ||
141 | #ifdef CONFIG_PCI | |
142 | for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") | |
143 | fsl_add_bridge(np, 1); | |
144 | #endif | |
145 | } | |
146 | ||
147 | static void sbc8560_show_cpuinfo(struct seq_file *m) | |
148 | { | |
149 | uint pvid, svid, phid1; | |
2c198061 PG |
150 | |
151 | pvid = mfspr(SPRN_PVR); | |
152 | svid = mfspr(SPRN_SVR); | |
153 | ||
154 | seq_printf(m, "Vendor\t\t: Wind River\n"); | |
2c198061 PG |
155 | seq_printf(m, "PVR\t\t: 0x%x\n", pvid); |
156 | seq_printf(m, "SVR\t\t: 0x%x\n", svid); | |
157 | ||
158 | /* Display cpu Pll setting */ | |
159 | phid1 = mfspr(SPRN_HID1); | |
160 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); | |
2c198061 PG |
161 | } |
162 | ||
46d026ac | 163 | machine_device_initcall(sbc8560, mpc85xx_common_publish_devices); |
2c198061 PG |
164 | |
165 | /* | |
166 | * Called very early, device-tree isn't unflattened | |
167 | */ | |
168 | static int __init sbc8560_probe(void) | |
169 | { | |
170 | unsigned long root = of_get_flat_dt_root(); | |
171 | ||
172 | return of_flat_dt_is_compatible(root, "SBC8560"); | |
173 | } | |
174 | ||
175 | #ifdef CONFIG_RTC_DRV_M48T59 | |
176 | static int __init sbc8560_rtc_init(void) | |
177 | { | |
178 | struct device_node *np; | |
179 | struct resource res; | |
180 | struct platform_device *rtc_dev; | |
181 | ||
182 | np = of_find_compatible_node(NULL, NULL, "m48t59"); | |
183 | if (np == NULL) { | |
184 | printk("No RTC in DTB. Has it been eaten by wild dogs?\n"); | |
185 | return -ENODEV; | |
186 | } | |
187 | ||
188 | of_address_to_resource(np, 0, &res); | |
189 | of_node_put(np); | |
190 | ||
191 | printk("Found RTC (m48t59) at i/o 0x%x\n", res.start); | |
192 | ||
193 | rtc_dev = platform_device_register_simple("rtc-m48t59", 0, &res, 1); | |
194 | ||
195 | if (IS_ERR(rtc_dev)) { | |
196 | printk("Registering sbc8560 RTC device failed\n"); | |
197 | return PTR_ERR(rtc_dev); | |
198 | } | |
199 | ||
200 | return 0; | |
201 | } | |
202 | ||
203 | arch_initcall(sbc8560_rtc_init); | |
204 | ||
205 | #endif /* M48T59 */ | |
206 | ||
7792da85 LL |
207 | static __u8 __iomem *brstcr; |
208 | ||
209 | static int __init sbc8560_bdrstcr_init(void) | |
210 | { | |
211 | struct device_node *np; | |
212 | struct resource res; | |
213 | ||
214 | np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr"); | |
215 | if (np == NULL) { | |
216 | printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n"); | |
217 | return -ENODEV; | |
218 | } | |
219 | ||
220 | of_address_to_resource(np, 0, &res); | |
221 | ||
c72fa7df | 222 | printk(KERN_INFO "sbc8560: Found BRSTCR at %pR\n", &res); |
7792da85 | 223 | |
28f65c11 | 224 | brstcr = ioremap(res.start, resource_size(&res)); |
7792da85 LL |
225 | if(!brstcr) |
226 | printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n"); | |
227 | ||
228 | of_node_put(np); | |
229 | ||
230 | return 0; | |
231 | } | |
232 | ||
233 | arch_initcall(sbc8560_bdrstcr_init); | |
234 | ||
235 | void sbc8560_rstcr_restart(char * cmd) | |
236 | { | |
237 | local_irq_disable(); | |
238 | if(brstcr) | |
239 | clrbits8(brstcr, 0x80); | |
240 | ||
241 | while(1); | |
242 | } | |
243 | ||
2c198061 PG |
244 | define_machine(sbc8560) { |
245 | .name = "SBC8560", | |
246 | .probe = sbc8560_probe, | |
247 | .setup_arch = sbc8560_setup_arch, | |
248 | .init_IRQ = sbc8560_pic_init, | |
249 | .show_cpuinfo = sbc8560_show_cpuinfo, | |
250 | .get_irq = mpic_get_irq, | |
7792da85 | 251 | .restart = sbc8560_rstcr_restart, |
2c198061 PG |
252 | .calibrate_decr = generic_calibrate_decr, |
253 | .progress = udbg_progress, | |
254 | }; |