Commit | Line | Data |
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2c198061 PG |
1 | /* |
2 | * Wind River SBC8560 setup and early boot code. | |
3 | * | |
4 | * Copyright 2007 Wind River Systems Inc. | |
5 | * | |
6 | * By Paul Gortmaker (see MAINTAINERS for contact information) | |
7 | * | |
8 | * Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | */ | |
15 | ||
16 | #include <linux/stddef.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/kdev_t.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/seq_file.h> | |
22 | #include <linux/of_platform.h> | |
23 | ||
24 | #include <asm/system.h> | |
25 | #include <asm/time.h> | |
26 | #include <asm/machdep.h> | |
27 | #include <asm/pci-bridge.h> | |
28 | #include <asm/mpic.h> | |
29 | #include <mm/mmu_decl.h> | |
30 | #include <asm/udbg.h> | |
31 | ||
32 | #include <sysdev/fsl_soc.h> | |
33 | #include <sysdev/fsl_pci.h> | |
34 | ||
35 | #ifdef CONFIG_CPM2 | |
36 | #include <asm/cpm2.h> | |
37 | #include <sysdev/cpm2_pic.h> | |
38 | #endif | |
39 | ||
40 | #ifdef CONFIG_CPM2 | |
41 | ||
42 | static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) | |
43 | { | |
ec775d0e | 44 | struct irq_chip *chip = irq_desc_get_chip(desc); |
2c198061 PG |
45 | int cascade_irq; |
46 | ||
47 | while ((cascade_irq = cpm2_get_irq()) >= 0) | |
48 | generic_handle_irq(cascade_irq); | |
49 | ||
712d5d79 | 50 | chip->irq_eoi(&desc->irq_data); |
2c198061 PG |
51 | } |
52 | ||
53 | #endif /* CONFIG_CPM2 */ | |
54 | ||
55 | static void __init sbc8560_pic_init(void) | |
56 | { | |
57 | struct mpic *mpic; | |
58 | struct resource r; | |
59 | struct device_node *np = NULL; | |
60 | #ifdef CONFIG_CPM2 | |
61 | int irq; | |
62 | #endif | |
63 | ||
64 | np = of_find_node_by_type(np, "open-pic"); | |
65 | if (!np) { | |
66 | printk(KERN_ERR "Could not find open-pic node\n"); | |
67 | return; | |
68 | } | |
69 | ||
70 | if (of_address_to_resource(np, 0, &r)) { | |
71 | printk(KERN_ERR "Could not map mpic register space\n"); | |
72 | of_node_put(np); | |
73 | return; | |
74 | } | |
75 | ||
76 | mpic = mpic_alloc(np, r.start, | |
77 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | |
78 | 0, 256, " OpenPIC "); | |
79 | BUG_ON(mpic == NULL); | |
80 | of_node_put(np); | |
81 | ||
82 | mpic_init(mpic); | |
83 | ||
84 | #ifdef CONFIG_CPM2 | |
85 | /* Setup CPM2 PIC */ | |
86 | np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic"); | |
87 | if (np == NULL) { | |
88 | printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n"); | |
89 | return; | |
90 | } | |
91 | irq = irq_of_parse_and_map(np, 0); | |
92 | ||
93 | cpm2_pic_init(np); | |
94 | of_node_put(np); | |
ec775d0e | 95 | irq_set_chained_handler(irq, cpm2_cascade); |
2c198061 PG |
96 | #endif |
97 | } | |
98 | ||
99 | /* | |
100 | * Setup the architecture | |
101 | */ | |
102 | #ifdef CONFIG_CPM2 | |
103 | struct cpm_pin { | |
104 | int port, pin, flags; | |
105 | }; | |
106 | ||
107 | static const struct cpm_pin sbc8560_pins[] = { | |
108 | /* SCC1 */ | |
109 | {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
110 | {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
111 | {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
112 | ||
113 | /* SCC2 */ | |
114 | {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
115 | {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
116 | {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
117 | ||
118 | /* FCC2 */ | |
119 | {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
120 | {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
121 | {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
122 | {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
123 | {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
124 | {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
125 | {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
126 | {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
127 | {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
128 | {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
129 | {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
130 | {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
131 | {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
132 | {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
133 | {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */ | |
134 | {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */ | |
135 | ||
136 | /* FCC3 */ | |
137 | {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
138 | {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
139 | {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
140 | {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
141 | {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
142 | {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
143 | {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
144 | {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
145 | {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
146 | {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
147 | {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
148 | {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
149 | {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
150 | {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
151 | {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */ | |
152 | {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */ | |
153 | }; | |
154 | ||
155 | static void __init init_ioports(void) | |
156 | { | |
157 | int i; | |
158 | ||
159 | for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) { | |
66576a87 | 160 | const struct cpm_pin *pin = &sbc8560_pins[i]; |
2c198061 PG |
161 | cpm2_set_pin(pin->port, pin->pin, pin->flags); |
162 | } | |
163 | ||
164 | cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX); | |
165 | cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX); | |
166 | cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX); | |
167 | cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX); | |
168 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX); | |
169 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX); | |
170 | cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX); | |
171 | cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX); | |
172 | } | |
173 | #endif | |
174 | ||
175 | static void __init sbc8560_setup_arch(void) | |
176 | { | |
177 | #ifdef CONFIG_PCI | |
178 | struct device_node *np; | |
179 | #endif | |
180 | ||
181 | if (ppc_md.progress) | |
182 | ppc_md.progress("sbc8560_setup_arch()", 0); | |
183 | ||
184 | #ifdef CONFIG_CPM2 | |
185 | cpm2_reset(); | |
186 | init_ioports(); | |
187 | #endif | |
188 | ||
189 | #ifdef CONFIG_PCI | |
190 | for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") | |
191 | fsl_add_bridge(np, 1); | |
192 | #endif | |
193 | } | |
194 | ||
195 | static void sbc8560_show_cpuinfo(struct seq_file *m) | |
196 | { | |
197 | uint pvid, svid, phid1; | |
2c198061 PG |
198 | |
199 | pvid = mfspr(SPRN_PVR); | |
200 | svid = mfspr(SPRN_SVR); | |
201 | ||
202 | seq_printf(m, "Vendor\t\t: Wind River\n"); | |
2c198061 PG |
203 | seq_printf(m, "PVR\t\t: 0x%x\n", pvid); |
204 | seq_printf(m, "SVR\t\t: 0x%x\n", svid); | |
205 | ||
206 | /* Display cpu Pll setting */ | |
207 | phid1 = mfspr(SPRN_HID1); | |
208 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); | |
2c198061 PG |
209 | } |
210 | ||
211 | static struct of_device_id __initdata of_bus_ids[] = { | |
212 | { .name = "soc", }, | |
213 | { .type = "soc", }, | |
214 | { .name = "cpm", }, | |
215 | { .name = "localbus", }, | |
cf0d19fb | 216 | { .compatible = "simple-bus", }, |
84ba4a58 | 217 | { .compatible = "gianfar", }, |
2c198061 PG |
218 | {}, |
219 | }; | |
220 | ||
221 | static int __init declare_of_platform_devices(void) | |
222 | { | |
2c198061 | 223 | of_platform_bus_probe(NULL, of_bus_ids, NULL); |
77b41597 | 224 | |
2c198061 PG |
225 | return 0; |
226 | } | |
77b41597 | 227 | machine_device_initcall(sbc8560, declare_of_platform_devices); |
2c198061 PG |
228 | |
229 | /* | |
230 | * Called very early, device-tree isn't unflattened | |
231 | */ | |
232 | static int __init sbc8560_probe(void) | |
233 | { | |
234 | unsigned long root = of_get_flat_dt_root(); | |
235 | ||
236 | return of_flat_dt_is_compatible(root, "SBC8560"); | |
237 | } | |
238 | ||
239 | #ifdef CONFIG_RTC_DRV_M48T59 | |
240 | static int __init sbc8560_rtc_init(void) | |
241 | { | |
242 | struct device_node *np; | |
243 | struct resource res; | |
244 | struct platform_device *rtc_dev; | |
245 | ||
246 | np = of_find_compatible_node(NULL, NULL, "m48t59"); | |
247 | if (np == NULL) { | |
248 | printk("No RTC in DTB. Has it been eaten by wild dogs?\n"); | |
249 | return -ENODEV; | |
250 | } | |
251 | ||
252 | of_address_to_resource(np, 0, &res); | |
253 | of_node_put(np); | |
254 | ||
255 | printk("Found RTC (m48t59) at i/o 0x%x\n", res.start); | |
256 | ||
257 | rtc_dev = platform_device_register_simple("rtc-m48t59", 0, &res, 1); | |
258 | ||
259 | if (IS_ERR(rtc_dev)) { | |
260 | printk("Registering sbc8560 RTC device failed\n"); | |
261 | return PTR_ERR(rtc_dev); | |
262 | } | |
263 | ||
264 | return 0; | |
265 | } | |
266 | ||
267 | arch_initcall(sbc8560_rtc_init); | |
268 | ||
269 | #endif /* M48T59 */ | |
270 | ||
7792da85 LL |
271 | static __u8 __iomem *brstcr; |
272 | ||
273 | static int __init sbc8560_bdrstcr_init(void) | |
274 | { | |
275 | struct device_node *np; | |
276 | struct resource res; | |
277 | ||
278 | np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr"); | |
279 | if (np == NULL) { | |
280 | printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n"); | |
281 | return -ENODEV; | |
282 | } | |
283 | ||
284 | of_address_to_resource(np, 0, &res); | |
285 | ||
286 | printk(KERN_INFO "sbc8560: Found BRSTCR at i/o 0x%x\n", res.start); | |
287 | ||
28f65c11 | 288 | brstcr = ioremap(res.start, resource_size(&res)); |
7792da85 LL |
289 | if(!brstcr) |
290 | printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n"); | |
291 | ||
292 | of_node_put(np); | |
293 | ||
294 | return 0; | |
295 | } | |
296 | ||
297 | arch_initcall(sbc8560_bdrstcr_init); | |
298 | ||
299 | void sbc8560_rstcr_restart(char * cmd) | |
300 | { | |
301 | local_irq_disable(); | |
302 | if(brstcr) | |
303 | clrbits8(brstcr, 0x80); | |
304 | ||
305 | while(1); | |
306 | } | |
307 | ||
2c198061 PG |
308 | define_machine(sbc8560) { |
309 | .name = "SBC8560", | |
310 | .probe = sbc8560_probe, | |
311 | .setup_arch = sbc8560_setup_arch, | |
312 | .init_IRQ = sbc8560_pic_init, | |
313 | .show_cpuinfo = sbc8560_show_cpuinfo, | |
314 | .get_irq = mpic_get_irq, | |
7792da85 | 315 | .restart = sbc8560_rstcr_restart, |
2c198061 PG |
316 | .calibrate_decr = generic_calibrate_decr, |
317 | .progress = udbg_progress, | |
318 | }; |