Commit | Line | Data |
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2c198061 PG |
1 | /* |
2 | * Wind River SBC8560 setup and early boot code. | |
3 | * | |
4 | * Copyright 2007 Wind River Systems Inc. | |
5 | * | |
6 | * By Paul Gortmaker (see MAINTAINERS for contact information) | |
7 | * | |
8 | * Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | */ | |
15 | ||
16 | #include <linux/stddef.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/kdev_t.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/seq_file.h> | |
22 | #include <linux/of_platform.h> | |
23 | ||
24 | #include <asm/system.h> | |
25 | #include <asm/time.h> | |
26 | #include <asm/machdep.h> | |
27 | #include <asm/pci-bridge.h> | |
28 | #include <asm/mpic.h> | |
29 | #include <mm/mmu_decl.h> | |
30 | #include <asm/udbg.h> | |
31 | ||
32 | #include <sysdev/fsl_soc.h> | |
33 | #include <sysdev/fsl_pci.h> | |
34 | ||
543a07b1 DES |
35 | #include "mpc85xx.h" |
36 | ||
2c198061 PG |
37 | #ifdef CONFIG_CPM2 |
38 | #include <asm/cpm2.h> | |
39 | #include <sysdev/cpm2_pic.h> | |
40 | #endif | |
41 | ||
2c198061 PG |
42 | static void __init sbc8560_pic_init(void) |
43 | { | |
44 | struct mpic *mpic; | |
45 | struct resource r; | |
46 | struct device_node *np = NULL; | |
2c198061 PG |
47 | |
48 | np = of_find_node_by_type(np, "open-pic"); | |
49 | if (!np) { | |
50 | printk(KERN_ERR "Could not find open-pic node\n"); | |
51 | return; | |
52 | } | |
53 | ||
54 | if (of_address_to_resource(np, 0, &r)) { | |
55 | printk(KERN_ERR "Could not map mpic register space\n"); | |
56 | of_node_put(np); | |
57 | return; | |
58 | } | |
59 | ||
60 | mpic = mpic_alloc(np, r.start, | |
61 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | |
62 | 0, 256, " OpenPIC "); | |
63 | BUG_ON(mpic == NULL); | |
64 | of_node_put(np); | |
65 | ||
66 | mpic_init(mpic); | |
67 | ||
543a07b1 | 68 | mpc85xx_cpm2_pic_init(); |
2c198061 PG |
69 | } |
70 | ||
71 | /* | |
72 | * Setup the architecture | |
73 | */ | |
74 | #ifdef CONFIG_CPM2 | |
75 | struct cpm_pin { | |
76 | int port, pin, flags; | |
77 | }; | |
78 | ||
79 | static const struct cpm_pin sbc8560_pins[] = { | |
80 | /* SCC1 */ | |
81 | {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
82 | {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
83 | {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
84 | ||
85 | /* SCC2 */ | |
86 | {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
87 | {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
88 | {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
89 | ||
90 | /* FCC2 */ | |
91 | {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
92 | {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
93 | {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
94 | {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
95 | {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
96 | {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
97 | {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
98 | {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
99 | {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
100 | {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
101 | {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
102 | {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | |
103 | {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
104 | {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
105 | {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */ | |
106 | {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */ | |
107 | ||
108 | /* FCC3 */ | |
109 | {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
110 | {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
111 | {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
112 | {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
113 | {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
114 | {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
115 | {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
116 | {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
117 | {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
118 | {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
119 | {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
120 | {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | |
121 | {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
122 | {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | |
123 | {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */ | |
124 | {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */ | |
125 | }; | |
126 | ||
127 | static void __init init_ioports(void) | |
128 | { | |
129 | int i; | |
130 | ||
131 | for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) { | |
66576a87 | 132 | const struct cpm_pin *pin = &sbc8560_pins[i]; |
2c198061 PG |
133 | cpm2_set_pin(pin->port, pin->pin, pin->flags); |
134 | } | |
135 | ||
136 | cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX); | |
137 | cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX); | |
138 | cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX); | |
139 | cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX); | |
140 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX); | |
141 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX); | |
142 | cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX); | |
143 | cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX); | |
144 | } | |
145 | #endif | |
146 | ||
147 | static void __init sbc8560_setup_arch(void) | |
148 | { | |
149 | #ifdef CONFIG_PCI | |
150 | struct device_node *np; | |
151 | #endif | |
152 | ||
153 | if (ppc_md.progress) | |
154 | ppc_md.progress("sbc8560_setup_arch()", 0); | |
155 | ||
156 | #ifdef CONFIG_CPM2 | |
157 | cpm2_reset(); | |
158 | init_ioports(); | |
159 | #endif | |
160 | ||
161 | #ifdef CONFIG_PCI | |
162 | for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") | |
163 | fsl_add_bridge(np, 1); | |
164 | #endif | |
165 | } | |
166 | ||
167 | static void sbc8560_show_cpuinfo(struct seq_file *m) | |
168 | { | |
169 | uint pvid, svid, phid1; | |
2c198061 PG |
170 | |
171 | pvid = mfspr(SPRN_PVR); | |
172 | svid = mfspr(SPRN_SVR); | |
173 | ||
174 | seq_printf(m, "Vendor\t\t: Wind River\n"); | |
2c198061 PG |
175 | seq_printf(m, "PVR\t\t: 0x%x\n", pvid); |
176 | seq_printf(m, "SVR\t\t: 0x%x\n", svid); | |
177 | ||
178 | /* Display cpu Pll setting */ | |
179 | phid1 = mfspr(SPRN_HID1); | |
180 | seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); | |
2c198061 PG |
181 | } |
182 | ||
46d026ac | 183 | machine_device_initcall(sbc8560, mpc85xx_common_publish_devices); |
2c198061 PG |
184 | |
185 | /* | |
186 | * Called very early, device-tree isn't unflattened | |
187 | */ | |
188 | static int __init sbc8560_probe(void) | |
189 | { | |
190 | unsigned long root = of_get_flat_dt_root(); | |
191 | ||
192 | return of_flat_dt_is_compatible(root, "SBC8560"); | |
193 | } | |
194 | ||
195 | #ifdef CONFIG_RTC_DRV_M48T59 | |
196 | static int __init sbc8560_rtc_init(void) | |
197 | { | |
198 | struct device_node *np; | |
199 | struct resource res; | |
200 | struct platform_device *rtc_dev; | |
201 | ||
202 | np = of_find_compatible_node(NULL, NULL, "m48t59"); | |
203 | if (np == NULL) { | |
204 | printk("No RTC in DTB. Has it been eaten by wild dogs?\n"); | |
205 | return -ENODEV; | |
206 | } | |
207 | ||
208 | of_address_to_resource(np, 0, &res); | |
209 | of_node_put(np); | |
210 | ||
211 | printk("Found RTC (m48t59) at i/o 0x%x\n", res.start); | |
212 | ||
213 | rtc_dev = platform_device_register_simple("rtc-m48t59", 0, &res, 1); | |
214 | ||
215 | if (IS_ERR(rtc_dev)) { | |
216 | printk("Registering sbc8560 RTC device failed\n"); | |
217 | return PTR_ERR(rtc_dev); | |
218 | } | |
219 | ||
220 | return 0; | |
221 | } | |
222 | ||
223 | arch_initcall(sbc8560_rtc_init); | |
224 | ||
225 | #endif /* M48T59 */ | |
226 | ||
7792da85 LL |
227 | static __u8 __iomem *brstcr; |
228 | ||
229 | static int __init sbc8560_bdrstcr_init(void) | |
230 | { | |
231 | struct device_node *np; | |
232 | struct resource res; | |
233 | ||
234 | np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr"); | |
235 | if (np == NULL) { | |
236 | printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n"); | |
237 | return -ENODEV; | |
238 | } | |
239 | ||
240 | of_address_to_resource(np, 0, &res); | |
241 | ||
c72fa7df | 242 | printk(KERN_INFO "sbc8560: Found BRSTCR at %pR\n", &res); |
7792da85 | 243 | |
28f65c11 | 244 | brstcr = ioremap(res.start, resource_size(&res)); |
7792da85 LL |
245 | if(!brstcr) |
246 | printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n"); | |
247 | ||
248 | of_node_put(np); | |
249 | ||
250 | return 0; | |
251 | } | |
252 | ||
253 | arch_initcall(sbc8560_bdrstcr_init); | |
254 | ||
255 | void sbc8560_rstcr_restart(char * cmd) | |
256 | { | |
257 | local_irq_disable(); | |
258 | if(brstcr) | |
259 | clrbits8(brstcr, 0x80); | |
260 | ||
261 | while(1); | |
262 | } | |
263 | ||
2c198061 PG |
264 | define_machine(sbc8560) { |
265 | .name = "SBC8560", | |
266 | .probe = sbc8560_probe, | |
267 | .setup_arch = sbc8560_setup_arch, | |
268 | .init_IRQ = sbc8560_pic_init, | |
269 | .show_cpuinfo = sbc8560_show_cpuinfo, | |
270 | .get_irq = mpic_get_irq, | |
7792da85 | 271 | .restart = sbc8560_rstcr_restart, |
2c198061 PG |
272 | .calibrate_decr = generic_calibrate_decr, |
273 | .progress = udbg_progress, | |
274 | }; |