Commit | Line | Data |
---|---|---|
a0ae9c7c AB |
1 | config PPC64 |
2 | bool "64-bit kernel" | |
3 | default n | |
b952741c | 4 | select HAVE_VIRT_CPU_ACCOUNTING |
78989f0a | 5 | select ZLIB_DEFLATE |
a0ae9c7c AB |
6 | help |
7 | This option selects whether a 32-bit or a 64-bit kernel | |
8 | will be built. | |
9 | ||
10 | menu "Processor support" | |
11 | choice | |
12 | prompt "Processor Type" | |
13 | depends on PPC32 | |
a0ae9c7c | 14 | help |
b9fd305d AB |
15 | There are five families of 32 bit PowerPC chips supported. |
16 | The most common ones are the desktop and server CPUs (601, 603, | |
17 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their | |
e177edcd | 18 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
b140e5b2 | 19 | The other embedded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
b9fd305d AB |
20 | (85xx) each form a family of their own that is not compatible |
21 | with the others. | |
22 | ||
23 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. | |
24 | ||
48c93112 | 25 | config PPC_BOOK3S_32 |
e177edcd | 26 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
a0ae9c7c AB |
27 | select PPC_FPU |
28 | ||
a0ae9c7c AB |
29 | config PPC_85xx |
30 | bool "Freescale 85xx" | |
31 | select E500 | |
a0ae9c7c | 32 | |
a0ae9c7c AB |
33 | config PPC_8xx |
34 | bool "Freescale 8xx" | |
35 | select FSL_SOC | |
36 | select 8xx | |
1088a209 | 37 | select PPC_LIB_RHEAP |
a0ae9c7c AB |
38 | |
39 | config 40x | |
40 | bool "AMCC 40x" | |
41 | select PPC_DCR_NATIVE | |
9dae8afd | 42 | select PPC_UDBG_16550 |
93173ce2 | 43 | select 4xx_SOC |
b500563b | 44 | select PPC_PCI_CHOICE |
a0ae9c7c AB |
45 | |
46 | config 44x | |
e7f75ad0 | 47 | bool "AMCC 44x, 46x or 47x" |
a0ae9c7c | 48 | select PPC_DCR_NATIVE |
1d5499b5 | 49 | select PPC_UDBG_16550 |
93173ce2 | 50 | select 4xx_SOC |
b500563b | 51 | select PPC_PCI_CHOICE |
4ee7084e | 52 | select PHYS_64BIT |
a0ae9c7c AB |
53 | |
54 | config E200 | |
55 | bool "Freescale e200" | |
56 | ||
57 | endchoice | |
58 | ||
2d27cfd3 BH |
59 | choice |
60 | prompt "Processor Type" | |
5b7c3c91 | 61 | depends on PPC64 |
2d27cfd3 BH |
62 | help |
63 | There are two families of 64 bit PowerPC chips supported. | |
64 | The most common ones are the desktop and server CPUs | |
0f369103 | 65 | (POWER4, POWER5, 970, POWER5+, POWER6, POWER7, POWER8 ...) |
2d27cfd3 BH |
66 | |
67 | The other are the "embedded" processors compliant with the | |
68 | "Book 3E" variant of the architecture | |
69 | ||
70 | config PPC_BOOK3S_64 | |
71 | bool "Server processors" | |
5b7c3c91 | 72 | select PPC_FPU |
5adfd346 | 73 | select PPC_HAVE_PMU_SUPPORT |
41151e77 | 74 | select SYS_SUPPORTS_HUGETLBFS |
ab624762 | 75 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE |
c34a51ce | 76 | select ARCH_SUPPORTS_NUMA_BALANCING |
527518f1 | 77 | select IRQ_WORK |
5b7c3c91 | 78 | |
2d27cfd3 BH |
79 | config PPC_BOOK3E_64 |
80 | bool "Embedded processors" | |
81 | select PPC_FPU # Make it a choice ? | |
1ece355b | 82 | select PPC_SMP_MUXED_IPI |
440bc685 | 83 | select PPC_DOORBELL |
2d27cfd3 BH |
84 | |
85 | endchoice | |
86 | ||
d23c6fb4 AB |
87 | choice |
88 | prompt "CPU selection" | |
89 | depends on PPC64 | |
90 | default GENERIC_CPU | |
91 | help | |
92 | This will create a kernel which is optimised for a particular CPU. | |
93 | The resulting kernel may not run on other CPUs, so use this with care. | |
94 | ||
95 | If unsure, select Generic. | |
96 | ||
97 | config GENERIC_CPU | |
98 | bool "Generic" | |
686245be | 99 | depends on !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
100 | |
101 | config CELL_CPU | |
102 | bool "Cell Broadband Engine" | |
686245be | 103 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
104 | |
105 | config POWER4_CPU | |
106 | bool "POWER4" | |
686245be | 107 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
108 | |
109 | config POWER5_CPU | |
110 | bool "POWER5" | |
686245be | 111 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
112 | |
113 | config POWER6_CPU | |
114 | bool "POWER6" | |
686245be | 115 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
116 | |
117 | config POWER7_CPU | |
118 | bool "POWER7" | |
01718ba6 | 119 | depends on PPC_BOOK3S_64 |
423216ed | 120 | select ARCH_HAS_FAST_MULTIPLIER |
01718ba6 | 121 | |
ff2e466a AB |
122 | config POWER8_CPU |
123 | bool "POWER8" | |
124 | depends on PPC_BOOK3S_64 | |
423216ed | 125 | select ARCH_HAS_FAST_MULTIPLIER |
01718ba6 SW |
126 | |
127 | config E5500_CPU | |
128 | bool "Freescale e5500" | |
129 | depends on E500 | |
130 | ||
131 | config E6500_CPU | |
132 | bool "Freescale e6500" | |
133 | depends on E500 | |
d23c6fb4 AB |
134 | |
135 | endchoice | |
136 | ||
48c93112 BH |
137 | config PPC_BOOK3S |
138 | def_bool y | |
139 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 | |
28794d34 | 140 | |
2d27cfd3 BH |
141 | config PPC_BOOK3E |
142 | def_bool y | |
143 | depends on PPC_BOOK3E_64 | |
144 | ||
5b7c3c91 BH |
145 | config 6xx |
146 | def_bool y | |
147 | depends on PPC32 && PPC_BOOK3S | |
7325927e | 148 | select PPC_HAVE_PMU_SUPPORT |
5b7c3c91 | 149 | |
a0ae9c7c AB |
150 | # this is temp to handle compat with arch=ppc |
151 | config 8xx | |
152 | bool | |
153 | ||
a0ae9c7c | 154 | config E500 |
39aef685 | 155 | select FSL_EMB_PERFMON |
4490c06b | 156 | select PPC_FSL_BOOK3E |
a0ae9c7c AB |
157 | bool |
158 | ||
3dfa8773 KG |
159 | config PPC_E500MC |
160 | bool "e500mc Support" | |
161 | select PPC_FPU | |
555eae97 | 162 | select COMMON_CLK |
3dfa8773 | 163 | depends on E500 |
9653018b SW |
164 | help |
165 | This must be enabled for running on e500mc (and derivatives | |
166 | such as e5500/e6500), and must be disabled for running on | |
167 | e500v1 or e500v2. | |
3dfa8773 | 168 | |
a0ae9c7c AB |
169 | config PPC_FPU |
170 | bool | |
171 | default y if PPC64 | |
172 | ||
5753c082 KG |
173 | config FSL_EMB_PERFMON |
174 | bool "Freescale Embedded Perfmon" | |
175 | depends on E500 || PPC_83xx | |
176 | help | |
177 | This is the Performance Monitor support found on the e500 core | |
178 | and some e300 cores (c3 and c4). Select this only if your | |
179 | core supports the Embedded Performance Monitor APU | |
180 | ||
a1110654 SW |
181 | config FSL_EMB_PERF_EVENT |
182 | bool | |
183 | depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS | |
184 | default y | |
185 | ||
186 | config FSL_EMB_PERF_EVENT_E500 | |
187 | bool | |
188 | depends on FSL_EMB_PERF_EVENT && E500 | |
189 | default y | |
190 | ||
a0ae9c7c AB |
191 | config 4xx |
192 | bool | |
193 | depends on 40x || 44x | |
194 | default y | |
195 | ||
196 | config BOOKE | |
197 | bool | |
2d27cfd3 | 198 | depends on E200 || E500 || 44x || PPC_BOOK3E |
a0ae9c7c AB |
199 | default y |
200 | ||
201 | config FSL_BOOKE | |
202 | bool | |
4490c06b | 203 | depends on (E200 || E500) && PPC32 |
a0ae9c7c AB |
204 | default y |
205 | ||
4490c06b KG |
206 | # this is for common code between PPC32 & PPC64 FSL BOOKE |
207 | config PPC_FSL_BOOK3E | |
208 | bool | |
209 | select FSL_EMB_PERFMON | |
1ece355b | 210 | select PPC_SMP_MUXED_IPI |
a475c8ec | 211 | select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64 |
440bc685 | 212 | select PPC_DOORBELL |
4490c06b | 213 | default y if FSL_BOOKE |
39aef685 | 214 | |
a0ae9c7c AB |
215 | config PTE_64BIT |
216 | bool | |
4ee7084e BB |
217 | depends on 44x || E500 || PPC_86xx |
218 | default y if PHYS_64BIT | |
a0ae9c7c AB |
219 | |
220 | config PHYS_64BIT | |
4ee7084e BB |
221 | bool 'Large physical address support' if E500 || PPC_86xx |
222 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx | |
a0ae9c7c AB |
223 | ---help--- |
224 | This option enables kernel support for larger than 32-bit physical | |
4ee7084e BB |
225 | addresses. This feature may not be available on all cores. |
226 | ||
227 | If you have more than 3.5GB of RAM or so, you also need to enable | |
228 | SWIOTLB under Kernel Options for this to work. The actual number | |
229 | is platform-dependent. | |
a0ae9c7c AB |
230 | |
231 | If in doubt, say N here. | |
232 | ||
233 | config ALTIVEC | |
234 | bool "AltiVec Support" | |
804ece07 | 235 | depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64) |
a0ae9c7c AB |
236 | ---help--- |
237 | This option enables kernel support for the Altivec extensions to the | |
238 | PowerPC processor. The kernel currently supports saving and restoring | |
239 | altivec registers, and turning on the 'altivec enable' bit so user | |
240 | processes can execute altivec instructions. | |
241 | ||
242 | This option is only usefully if you have a processor that supports | |
243 | altivec (G4, otherwise known as 74xx series), but does not have | |
244 | any affect on a non-altivec cpu (it does, however add code to the | |
245 | kernel). | |
246 | ||
247 | If in doubt, say Y here. | |
248 | ||
96d5b52c MN |
249 | config VSX |
250 | bool "VSX Support" | |
804ece07 | 251 | depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU |
96d5b52c MN |
252 | ---help--- |
253 | ||
254 | This option enables kernel support for the Vector Scaler extensions | |
255 | to the PowerPC processor. The kernel currently supports saving and | |
256 | restoring VSX registers, and turning on the 'VSX enable' bit so user | |
257 | processes can execute VSX instructions. | |
258 | ||
259 | This option is only useful if you have a processor that supports | |
260 | VSX (P7 and above), but does not have any affect on a non-VSX | |
261 | CPUs (it does, however add code to the kernel). | |
262 | ||
263 | If in doubt, say Y here. | |
264 | ||
851d2e2f THFL |
265 | config PPC_ICSWX |
266 | bool "Support for PowerPC icswx coprocessor instruction" | |
804ece07 | 267 | depends on PPC_BOOK3S_64 |
851d2e2f THFL |
268 | default n |
269 | ---help--- | |
270 | ||
271 | This option enables kernel support for the PowerPC Initiate | |
272 | Coprocessor Store Word (icswx) coprocessor instruction on POWER7 | |
273 | or newer processors. | |
274 | ||
275 | This option is only useful if you have a processor that supports | |
276 | the icswx coprocessor instruction. It does not have any effect | |
277 | on processors without the icswx coprocessor instruction. | |
278 | ||
279 | This option slightly increases kernel memory usage. | |
280 | ||
281 | If in doubt, say N here. | |
282 | ||
9d670280 JX |
283 | config PPC_ICSWX_PID |
284 | bool "icswx requires direct PID management" | |
804ece07 | 285 | depends on PPC_ICSWX |
9d670280 JX |
286 | default y |
287 | ---help--- | |
c3dcf53a | 288 | The PID register in server is used explicitly for ICSWX. In |
6b2aac42 | 289 | embedded systems PID management is done by the system. |
9d670280 | 290 | |
c3dcf53a JX |
291 | config PPC_ICSWX_USE_SIGILL |
292 | bool "Should a bad CT cause a SIGILL?" | |
293 | depends on PPC_ICSWX | |
294 | default n | |
295 | ---help--- | |
296 | Should a bad CT used for "non-record form ICSWX" cause an | |
6b2aac42 | 297 | illegal instruction signal or should it be silent as |
c3dcf53a JX |
298 | architected. |
299 | ||
300 | If in doubt, say N here. | |
301 | ||
3477e71d MC |
302 | config SPE_POSSIBLE |
303 | def_bool y | |
304 | depends on E200 || (E500 && !PPC_E500MC) | |
305 | ||
a0ae9c7c AB |
306 | config SPE |
307 | bool "SPE Support" | |
3477e71d | 308 | depends on SPE_POSSIBLE |
a0ae9c7c AB |
309 | default y |
310 | ---help--- | |
311 | This option enables kernel support for the Signal Processing | |
312 | Extensions (SPE) to the PowerPC processor. The kernel currently | |
313 | supports saving and restoring SPE registers, and turning on the | |
314 | 'spe enable' bit so user processes can execute SPE instructions. | |
315 | ||
316 | This option is only useful if you have a processor that supports | |
317 | SPE (e500, otherwise known as 85xx series), but does not have any | |
318 | effect on a non-spe cpu (it does, however add code to the kernel). | |
319 | ||
320 | If in doubt, say Y here. | |
321 | ||
322 | config PPC_STD_MMU | |
5b7c3c91 BH |
323 | def_bool y |
324 | depends on PPC_BOOK3S | |
a0ae9c7c AB |
325 | |
326 | config PPC_STD_MMU_32 | |
327 | def_bool y | |
328 | depends on PPC_STD_MMU && PPC32 | |
329 | ||
5e696617 BH |
330 | config PPC_STD_MMU_64 |
331 | def_bool y | |
332 | depends on PPC_STD_MMU && PPC64 | |
333 | ||
566ca99a AK |
334 | config PPC_RADIX_MMU |
335 | bool "Radix MMU Support" | |
336 | depends on PPC_BOOK3S_64 | |
337 | default y | |
338 | help | |
339 | Enable support for the Power ISA 3.0 Radix style MMU. Currently this | |
340 | is only implemented by IBM Power9 CPUs, if you don't have one of them | |
341 | you can probably disable this. | |
342 | ||
5e696617 BH |
343 | config PPC_MMU_NOHASH |
344 | def_bool y | |
345 | depends on !PPC_STD_MMU | |
346 | ||
70fe3af8 KG |
347 | config PPC_BOOK3E_MMU |
348 | def_bool y | |
2d27cfd3 | 349 | depends on FSL_BOOKE || PPC_BOOK3E |
70fe3af8 | 350 | |
a0ae9c7c AB |
351 | config PPC_MM_SLICES |
352 | bool | |
a475c8ec | 353 | default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
a0ae9c7c AB |
354 | default n |
355 | ||
105988c0 PM |
356 | config PPC_HAVE_PMU_SUPPORT |
357 | bool | |
358 | ||
359 | config PPC_PERF_CTRS | |
360 | def_bool y | |
cdd6c482 | 361 | depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT |
105988c0 | 362 | help |
cdd6c482 | 363 | This enables the powerpc-specific perf_event back-end. |
105988c0 | 364 | |
a0ae9c7c | 365 | config SMP |
e7f75ad0 | 366 | depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x |
a0ae9c7c AB |
367 | bool "Symmetric multi-processing support" |
368 | ---help--- | |
369 | This enables support for systems with more than one CPU. If you have | |
370 | a system with only one CPU, say N. If you have a system with more | |
371 | than one CPU, say Y. Note that the kernel does not currently | |
372 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors | |
373 | since they have inadequate hardware support for multiprocessor | |
374 | operation. | |
375 | ||
376 | If you say N here, the kernel will run on single and multiprocessor | |
377 | machines, but will use only one CPU of a multiprocessor machine. If | |
378 | you say Y here, the kernel will run on single-processor machines. | |
379 | On a single-processor machine, the kernel will run faster if you say | |
380 | N here. | |
381 | ||
382 | If you don't know what to do here, say N. | |
383 | ||
384 | config NR_CPUS | |
2d8ae638 MN |
385 | int "Maximum number of CPUs (2-8192)" |
386 | range 2 8192 | |
a0ae9c7c AB |
387 | depends on SMP |
388 | default "32" if PPC64 | |
389 | default "4" | |
390 | ||
391 | config NOT_COHERENT_CACHE | |
392 | bool | |
b91a143b | 393 | depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON |
e7f75ad0 | 394 | default n if PPC_47x |
a0ae9c7c AB |
395 | default y |
396 | ||
f8eb77d6 | 397 | config CHECK_CACHE_COHERENCY |
a0ae9c7c AB |
398 | bool |
399 | ||
440bc685 IM |
400 | config PPC_DOORBELL |
401 | bool | |
402 | default n | |
403 | ||
a0ae9c7c | 404 | endmenu |
7c105b63 | 405 | |
e0d00591 ME |
406 | config VDSO32 |
407 | def_bool y | |
408 | depends on PPC32 || CPU_BIG_ENDIAN | |
409 | help | |
410 | This symbol controls whether we build the 32-bit VDSO. We obviously | |
411 | want to do that if we're building a 32-bit kernel. If we're building | |
412 | a 64-bit kernel then we only want a 32-bit VDSO if we're building for | |
413 | big endian. That is because the only little endian configuration we | |
414 | support is ppc64le which is 64-bit only. | |
415 | ||
962bc221 AB |
416 | choice |
417 | prompt "Endianness selection" | |
418 | default CPU_BIG_ENDIAN | |
7c105b63 AB |
419 | help |
420 | This option selects whether a big endian or little endian kernel will | |
421 | be built. | |
422 | ||
962bc221 AB |
423 | config CPU_BIG_ENDIAN |
424 | bool "Build big endian kernel" | |
425 | help | |
426 | Build a big endian kernel. | |
427 | ||
428 | If unsure, select this option. | |
429 | ||
430 | config CPU_LITTLE_ENDIAN | |
431 | bool "Build little endian kernel" | |
d4d4add9 | 432 | depends on PPC_BOOK3S_64 |
147c0516 | 433 | select PPC64_BOOT_WRAPPER |
962bc221 AB |
434 | help |
435 | Build a little endian kernel. | |
436 | ||
7c105b63 AB |
437 | Note that if cross compiling a little endian kernel, |
438 | CROSS_COMPILE must point to a toolchain capable of targeting | |
439 | little endian powerpc. | |
962bc221 AB |
440 | |
441 | endchoice | |
147c0516 CLG |
442 | |
443 | config PPC64_BOOT_WRAPPER | |
444 | def_bool n | |
445 | depends on CPU_LITTLE_ENDIAN |