Commit | Line | Data |
---|---|---|
a0ae9c7c AB |
1 | config PPC64 |
2 | bool "64-bit kernel" | |
3 | default n | |
b952741c | 4 | select HAVE_VIRT_CPU_ACCOUNTING |
78989f0a | 5 | select ZLIB_DEFLATE |
a0ae9c7c AB |
6 | help |
7 | This option selects whether a 32-bit or a 64-bit kernel | |
8 | will be built. | |
9 | ||
10 | menu "Processor support" | |
11 | choice | |
12 | prompt "Processor Type" | |
13 | depends on PPC32 | |
a0ae9c7c | 14 | help |
b9fd305d AB |
15 | There are five families of 32 bit PowerPC chips supported. |
16 | The most common ones are the desktop and server CPUs (601, 603, | |
17 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their | |
e177edcd | 18 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
b140e5b2 | 19 | The other embedded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
b9fd305d AB |
20 | (85xx) each form a family of their own that is not compatible |
21 | with the others. | |
22 | ||
23 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. | |
24 | ||
48c93112 | 25 | config PPC_BOOK3S_32 |
e177edcd | 26 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
a0ae9c7c AB |
27 | select PPC_FPU |
28 | ||
a0ae9c7c AB |
29 | config PPC_85xx |
30 | bool "Freescale 85xx" | |
31 | select E500 | |
a0ae9c7c | 32 | |
a0ae9c7c AB |
33 | config PPC_8xx |
34 | bool "Freescale 8xx" | |
35 | select FSL_SOC | |
36 | select 8xx | |
1088a209 | 37 | select PPC_LIB_RHEAP |
a0ae9c7c AB |
38 | |
39 | config 40x | |
40 | bool "AMCC 40x" | |
41 | select PPC_DCR_NATIVE | |
9dae8afd | 42 | select PPC_UDBG_16550 |
93173ce2 | 43 | select 4xx_SOC |
b500563b | 44 | select PPC_PCI_CHOICE |
a0ae9c7c AB |
45 | |
46 | config 44x | |
e7f75ad0 | 47 | bool "AMCC 44x, 46x or 47x" |
a0ae9c7c | 48 | select PPC_DCR_NATIVE |
1d5499b5 | 49 | select PPC_UDBG_16550 |
93173ce2 | 50 | select 4xx_SOC |
b500563b | 51 | select PPC_PCI_CHOICE |
4ee7084e | 52 | select PHYS_64BIT |
a0ae9c7c AB |
53 | |
54 | config E200 | |
55 | bool "Freescale e200" | |
56 | ||
57 | endchoice | |
58 | ||
2d27cfd3 BH |
59 | choice |
60 | prompt "Processor Type" | |
5b7c3c91 | 61 | depends on PPC64 |
2d27cfd3 BH |
62 | help |
63 | There are two families of 64 bit PowerPC chips supported. | |
64 | The most common ones are the desktop and server CPUs | |
0f369103 | 65 | (POWER4, POWER5, 970, POWER5+, POWER6, POWER7, POWER8 ...) |
2d27cfd3 BH |
66 | |
67 | The other are the "embedded" processors compliant with the | |
68 | "Book 3E" variant of the architecture | |
69 | ||
70 | config PPC_BOOK3S_64 | |
71 | bool "Server processors" | |
5b7c3c91 | 72 | select PPC_FPU |
5adfd346 | 73 | select PPC_HAVE_PMU_SUPPORT |
41151e77 | 74 | select SYS_SUPPORTS_HUGETLBFS |
074c2eae | 75 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE if PPC_64K_PAGES |
c34a51ce | 76 | select ARCH_SUPPORTS_NUMA_BALANCING |
527518f1 | 77 | select IRQ_WORK |
5b7c3c91 | 78 | |
2d27cfd3 BH |
79 | config PPC_BOOK3E_64 |
80 | bool "Embedded processors" | |
81 | select PPC_FPU # Make it a choice ? | |
1ece355b | 82 | select PPC_SMP_MUXED_IPI |
440bc685 | 83 | select PPC_DOORBELL |
2d27cfd3 BH |
84 | |
85 | endchoice | |
86 | ||
d23c6fb4 AB |
87 | choice |
88 | prompt "CPU selection" | |
89 | depends on PPC64 | |
90 | default GENERIC_CPU | |
91 | help | |
92 | This will create a kernel which is optimised for a particular CPU. | |
93 | The resulting kernel may not run on other CPUs, so use this with care. | |
94 | ||
95 | If unsure, select Generic. | |
96 | ||
97 | config GENERIC_CPU | |
98 | bool "Generic" | |
686245be | 99 | depends on !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
100 | |
101 | config CELL_CPU | |
102 | bool "Cell Broadband Engine" | |
686245be | 103 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
104 | |
105 | config POWER4_CPU | |
106 | bool "POWER4" | |
686245be | 107 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
108 | |
109 | config POWER5_CPU | |
110 | bool "POWER5" | |
686245be | 111 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
112 | |
113 | config POWER6_CPU | |
114 | bool "POWER6" | |
686245be | 115 | depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN |
d23c6fb4 AB |
116 | |
117 | config POWER7_CPU | |
118 | bool "POWER7" | |
01718ba6 | 119 | depends on PPC_BOOK3S_64 |
423216ed | 120 | select ARCH_HAS_FAST_MULTIPLIER |
01718ba6 | 121 | |
ff2e466a AB |
122 | config POWER8_CPU |
123 | bool "POWER8" | |
124 | depends on PPC_BOOK3S_64 | |
423216ed | 125 | select ARCH_HAS_FAST_MULTIPLIER |
01718ba6 SW |
126 | |
127 | config E5500_CPU | |
128 | bool "Freescale e5500" | |
129 | depends on E500 | |
130 | ||
131 | config E6500_CPU | |
132 | bool "Freescale e6500" | |
133 | depends on E500 | |
d23c6fb4 AB |
134 | |
135 | endchoice | |
136 | ||
48c93112 BH |
137 | config PPC_BOOK3S |
138 | def_bool y | |
139 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 | |
28794d34 | 140 | |
2d27cfd3 BH |
141 | config PPC_BOOK3E |
142 | def_bool y | |
143 | depends on PPC_BOOK3E_64 | |
144 | ||
5b7c3c91 BH |
145 | config 6xx |
146 | def_bool y | |
147 | depends on PPC32 && PPC_BOOK3S | |
7325927e | 148 | select PPC_HAVE_PMU_SUPPORT |
5b7c3c91 | 149 | |
3164cccd AB |
150 | config TUNE_CELL |
151 | bool "Optimize for Cell Broadband Engine" | |
28794d34 | 152 | depends on PPC64 && PPC_BOOK3S |
3164cccd AB |
153 | help |
154 | Cause the compiler to optimize for the PPE of the Cell Broadband | |
155 | Engine. This will make the code run considerably faster on Cell | |
156 | but somewhat slower on other machines. This option only changes | |
157 | the scheduling of instructions, not the selection of instructions | |
158 | itself, so the resulting kernel will keep running on all other | |
ff2d7587 | 159 | machines. |
3164cccd | 160 | |
a0ae9c7c AB |
161 | # this is temp to handle compat with arch=ppc |
162 | config 8xx | |
163 | bool | |
164 | ||
a0ae9c7c | 165 | config E500 |
39aef685 | 166 | select FSL_EMB_PERFMON |
4490c06b | 167 | select PPC_FSL_BOOK3E |
a0ae9c7c AB |
168 | bool |
169 | ||
3dfa8773 KG |
170 | config PPC_E500MC |
171 | bool "e500mc Support" | |
172 | select PPC_FPU | |
555eae97 | 173 | select COMMON_CLK |
3dfa8773 | 174 | depends on E500 |
9653018b SW |
175 | help |
176 | This must be enabled for running on e500mc (and derivatives | |
177 | such as e5500/e6500), and must be disabled for running on | |
178 | e500v1 or e500v2. | |
3dfa8773 | 179 | |
a0ae9c7c AB |
180 | config PPC_FPU |
181 | bool | |
182 | default y if PPC64 | |
183 | ||
5753c082 KG |
184 | config FSL_EMB_PERFMON |
185 | bool "Freescale Embedded Perfmon" | |
186 | depends on E500 || PPC_83xx | |
187 | help | |
188 | This is the Performance Monitor support found on the e500 core | |
189 | and some e300 cores (c3 and c4). Select this only if your | |
190 | core supports the Embedded Performance Monitor APU | |
191 | ||
a1110654 SW |
192 | config FSL_EMB_PERF_EVENT |
193 | bool | |
194 | depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS | |
195 | default y | |
196 | ||
197 | config FSL_EMB_PERF_EVENT_E500 | |
198 | bool | |
199 | depends on FSL_EMB_PERF_EVENT && E500 | |
200 | default y | |
201 | ||
a0ae9c7c AB |
202 | config 4xx |
203 | bool | |
204 | depends on 40x || 44x | |
205 | default y | |
206 | ||
207 | config BOOKE | |
208 | bool | |
2d27cfd3 | 209 | depends on E200 || E500 || 44x || PPC_BOOK3E |
a0ae9c7c AB |
210 | default y |
211 | ||
212 | config FSL_BOOKE | |
213 | bool | |
4490c06b | 214 | depends on (E200 || E500) && PPC32 |
a0ae9c7c AB |
215 | default y |
216 | ||
4490c06b KG |
217 | # this is for common code between PPC32 & PPC64 FSL BOOKE |
218 | config PPC_FSL_BOOK3E | |
219 | bool | |
220 | select FSL_EMB_PERFMON | |
1ece355b | 221 | select PPC_SMP_MUXED_IPI |
a475c8ec | 222 | select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64 |
440bc685 | 223 | select PPC_DOORBELL |
4490c06b | 224 | default y if FSL_BOOKE |
39aef685 | 225 | |
a0ae9c7c AB |
226 | config PTE_64BIT |
227 | bool | |
4ee7084e BB |
228 | depends on 44x || E500 || PPC_86xx |
229 | default y if PHYS_64BIT | |
a0ae9c7c AB |
230 | |
231 | config PHYS_64BIT | |
4ee7084e BB |
232 | bool 'Large physical address support' if E500 || PPC_86xx |
233 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx | |
a0ae9c7c AB |
234 | ---help--- |
235 | This option enables kernel support for larger than 32-bit physical | |
4ee7084e BB |
236 | addresses. This feature may not be available on all cores. |
237 | ||
238 | If you have more than 3.5GB of RAM or so, you also need to enable | |
239 | SWIOTLB under Kernel Options for this to work. The actual number | |
240 | is platform-dependent. | |
a0ae9c7c AB |
241 | |
242 | If in doubt, say N here. | |
243 | ||
244 | config ALTIVEC | |
245 | bool "AltiVec Support" | |
804ece07 | 246 | depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64) |
a0ae9c7c AB |
247 | ---help--- |
248 | This option enables kernel support for the Altivec extensions to the | |
249 | PowerPC processor. The kernel currently supports saving and restoring | |
250 | altivec registers, and turning on the 'altivec enable' bit so user | |
251 | processes can execute altivec instructions. | |
252 | ||
253 | This option is only usefully if you have a processor that supports | |
254 | altivec (G4, otherwise known as 74xx series), but does not have | |
255 | any affect on a non-altivec cpu (it does, however add code to the | |
256 | kernel). | |
257 | ||
258 | If in doubt, say Y here. | |
259 | ||
96d5b52c MN |
260 | config VSX |
261 | bool "VSX Support" | |
804ece07 | 262 | depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU |
96d5b52c MN |
263 | ---help--- |
264 | ||
265 | This option enables kernel support for the Vector Scaler extensions | |
266 | to the PowerPC processor. The kernel currently supports saving and | |
267 | restoring VSX registers, and turning on the 'VSX enable' bit so user | |
268 | processes can execute VSX instructions. | |
269 | ||
270 | This option is only useful if you have a processor that supports | |
271 | VSX (P7 and above), but does not have any affect on a non-VSX | |
272 | CPUs (it does, however add code to the kernel). | |
273 | ||
274 | If in doubt, say Y here. | |
275 | ||
851d2e2f THFL |
276 | config PPC_ICSWX |
277 | bool "Support for PowerPC icswx coprocessor instruction" | |
804ece07 | 278 | depends on PPC_BOOK3S_64 |
851d2e2f THFL |
279 | default n |
280 | ---help--- | |
281 | ||
282 | This option enables kernel support for the PowerPC Initiate | |
283 | Coprocessor Store Word (icswx) coprocessor instruction on POWER7 | |
284 | or newer processors. | |
285 | ||
286 | This option is only useful if you have a processor that supports | |
287 | the icswx coprocessor instruction. It does not have any effect | |
288 | on processors without the icswx coprocessor instruction. | |
289 | ||
290 | This option slightly increases kernel memory usage. | |
291 | ||
292 | If in doubt, say N here. | |
293 | ||
9d670280 JX |
294 | config PPC_ICSWX_PID |
295 | bool "icswx requires direct PID management" | |
804ece07 | 296 | depends on PPC_ICSWX |
9d670280 JX |
297 | default y |
298 | ---help--- | |
c3dcf53a | 299 | The PID register in server is used explicitly for ICSWX. In |
6b2aac42 | 300 | embedded systems PID management is done by the system. |
9d670280 | 301 | |
c3dcf53a JX |
302 | config PPC_ICSWX_USE_SIGILL |
303 | bool "Should a bad CT cause a SIGILL?" | |
304 | depends on PPC_ICSWX | |
305 | default n | |
306 | ---help--- | |
307 | Should a bad CT used for "non-record form ICSWX" cause an | |
6b2aac42 | 308 | illegal instruction signal or should it be silent as |
c3dcf53a JX |
309 | architected. |
310 | ||
311 | If in doubt, say N here. | |
312 | ||
3477e71d MC |
313 | config SPE_POSSIBLE |
314 | def_bool y | |
315 | depends on E200 || (E500 && !PPC_E500MC) | |
316 | ||
a0ae9c7c AB |
317 | config SPE |
318 | bool "SPE Support" | |
3477e71d | 319 | depends on SPE_POSSIBLE |
a0ae9c7c AB |
320 | default y |
321 | ---help--- | |
322 | This option enables kernel support for the Signal Processing | |
323 | Extensions (SPE) to the PowerPC processor. The kernel currently | |
324 | supports saving and restoring SPE registers, and turning on the | |
325 | 'spe enable' bit so user processes can execute SPE instructions. | |
326 | ||
327 | This option is only useful if you have a processor that supports | |
328 | SPE (e500, otherwise known as 85xx series), but does not have any | |
329 | effect on a non-spe cpu (it does, however add code to the kernel). | |
330 | ||
331 | If in doubt, say Y here. | |
332 | ||
333 | config PPC_STD_MMU | |
5b7c3c91 BH |
334 | def_bool y |
335 | depends on PPC_BOOK3S | |
a0ae9c7c AB |
336 | |
337 | config PPC_STD_MMU_32 | |
338 | def_bool y | |
339 | depends on PPC_STD_MMU && PPC32 | |
340 | ||
5e696617 BH |
341 | config PPC_STD_MMU_64 |
342 | def_bool y | |
343 | depends on PPC_STD_MMU && PPC64 | |
344 | ||
345 | config PPC_MMU_NOHASH | |
346 | def_bool y | |
347 | depends on !PPC_STD_MMU | |
348 | ||
70fe3af8 KG |
349 | config PPC_BOOK3E_MMU |
350 | def_bool y | |
2d27cfd3 | 351 | depends on FSL_BOOKE || PPC_BOOK3E |
70fe3af8 | 352 | |
a0ae9c7c AB |
353 | config PPC_MM_SLICES |
354 | bool | |
a475c8ec | 355 | default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
a0ae9c7c AB |
356 | default n |
357 | ||
105988c0 PM |
358 | config PPC_HAVE_PMU_SUPPORT |
359 | bool | |
360 | ||
361 | config PPC_PERF_CTRS | |
362 | def_bool y | |
cdd6c482 | 363 | depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT |
105988c0 | 364 | help |
cdd6c482 | 365 | This enables the powerpc-specific perf_event back-end. |
105988c0 | 366 | |
a0ae9c7c | 367 | config SMP |
e7f75ad0 | 368 | depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x |
a0ae9c7c AB |
369 | bool "Symmetric multi-processing support" |
370 | ---help--- | |
371 | This enables support for systems with more than one CPU. If you have | |
372 | a system with only one CPU, say N. If you have a system with more | |
373 | than one CPU, say Y. Note that the kernel does not currently | |
374 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors | |
375 | since they have inadequate hardware support for multiprocessor | |
376 | operation. | |
377 | ||
378 | If you say N here, the kernel will run on single and multiprocessor | |
379 | machines, but will use only one CPU of a multiprocessor machine. If | |
380 | you say Y here, the kernel will run on single-processor machines. | |
381 | On a single-processor machine, the kernel will run faster if you say | |
382 | N here. | |
383 | ||
384 | If you don't know what to do here, say N. | |
385 | ||
386 | config NR_CPUS | |
2d8ae638 MN |
387 | int "Maximum number of CPUs (2-8192)" |
388 | range 2 8192 | |
a0ae9c7c AB |
389 | depends on SMP |
390 | default "32" if PPC64 | |
391 | default "4" | |
392 | ||
393 | config NOT_COHERENT_CACHE | |
394 | bool | |
b91a143b | 395 | depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON |
e7f75ad0 | 396 | default n if PPC_47x |
a0ae9c7c AB |
397 | default y |
398 | ||
f8eb77d6 | 399 | config CHECK_CACHE_COHERENCY |
a0ae9c7c AB |
400 | bool |
401 | ||
440bc685 IM |
402 | config PPC_DOORBELL |
403 | bool | |
404 | default n | |
405 | ||
a0ae9c7c | 406 | endmenu |
7c105b63 | 407 | |
e0d00591 ME |
408 | config VDSO32 |
409 | def_bool y | |
410 | depends on PPC32 || CPU_BIG_ENDIAN | |
411 | help | |
412 | This symbol controls whether we build the 32-bit VDSO. We obviously | |
413 | want to do that if we're building a 32-bit kernel. If we're building | |
414 | a 64-bit kernel then we only want a 32-bit VDSO if we're building for | |
415 | big endian. That is because the only little endian configuration we | |
416 | support is ppc64le which is 64-bit only. | |
417 | ||
962bc221 AB |
418 | choice |
419 | prompt "Endianness selection" | |
420 | default CPU_BIG_ENDIAN | |
7c105b63 AB |
421 | help |
422 | This option selects whether a big endian or little endian kernel will | |
423 | be built. | |
424 | ||
962bc221 AB |
425 | config CPU_BIG_ENDIAN |
426 | bool "Build big endian kernel" | |
427 | help | |
428 | Build a big endian kernel. | |
429 | ||
430 | If unsure, select this option. | |
431 | ||
432 | config CPU_LITTLE_ENDIAN | |
433 | bool "Build little endian kernel" | |
d4d4add9 | 434 | depends on PPC_BOOK3S_64 |
147c0516 | 435 | select PPC64_BOOT_WRAPPER |
962bc221 AB |
436 | help |
437 | Build a little endian kernel. | |
438 | ||
7c105b63 AB |
439 | Note that if cross compiling a little endian kernel, |
440 | CROSS_COMPILE must point to a toolchain capable of targeting | |
441 | little endian powerpc. | |
962bc221 AB |
442 | |
443 | endchoice | |
147c0516 CLG |
444 | |
445 | config PPC64_BOOT_WRAPPER | |
446 | def_bool n | |
447 | depends on CPU_LITTLE_ENDIAN |