[deliverable/linux.git] / arch / powerpc / platforms / Kconfig.cputype

config PPC64
	bool "64-bit kernel"
	default n
	help
	  This option selects whether a 32-bit or a 64-bit kernel
	  will be built.

menu "Processor support"
choice
	prompt "Processor Type"
	depends on PPC32
	help
	  There are five families of 32 bit PowerPC chips supported.
	  The most common ones are the desktop and server CPUs (601, 603,
	  604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
	  embedded 512x/52xx/82xx/83xx/86xx counterparts.
	  The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
	  (85xx) each form a family of their own that is not compatible
	  with the others.

	  If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.

config PPC_BOOK3S_32
	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
	select PPC_FPU

config PPC_85xx
	bool "Freescale 85xx"
	select E500

config PPC_8xx
	bool "Freescale 8xx"
	select FSL_SOC
	select 8xx
	select PPC_LIB_RHEAP

config 40x
	bool "AMCC 40x"
	select PPC_DCR_NATIVE
	select PPC_UDBG_16550
	select 4xx_SOC
	select PPC_PCI_CHOICE

config 44x
	bool "AMCC 44x, 46x or 47x"
	select PPC_DCR_NATIVE
	select PPC_UDBG_16550
	select 4xx_SOC
	select PPC_PCI_CHOICE
	select PHYS_64BIT

config E200
	bool "Freescale e200"

endchoice

choice
	prompt "Processor Type"
	depends on PPC64
	help
	  There are two families of 64 bit PowerPC chips supported.
	  The most common ones are the desktop and server CPUs
	  (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)

	  The other are the "embedded" processors compliant with the
	  "Book 3E" variant of the architecture

config PPC_BOOK3S_64
	bool "Server processors"
	select PPC_FPU
	select PPC_HAVE_PMU_SUPPORT
	select SYS_SUPPORTS_HUGETLBFS

config PPC_BOOK3E_64
	bool "Embedded processors"
	select PPC_FPU # Make it a choice ?
	select PPC_SMP_MUXED_IPI

endchoice

choice
	prompt "CPU selection"
	depends on PPC64
	default GENERIC_CPU
	help
	  This will create a kernel which is optimised for a particular CPU.
	  The resulting kernel may not run on other CPUs, so use this with care.

	  If unsure, select Generic.

config GENERIC_CPU
	bool "Generic"

config CELL_CPU
	bool "Cell Broadband Engine"

config POWER4_CPU
	bool "POWER4"

config POWER5_CPU
	bool "POWER5"

config POWER6_CPU
	bool "POWER6"

config POWER7_CPU
	bool "POWER7"

endchoice

config PPC_BOOK3S
	def_bool y
	depends on PPC_BOOK3S_32 || PPC_BOOK3S_64

config PPC_BOOK3E
	def_bool y
	depends on PPC_BOOK3E_64

config 6xx
	def_bool y
	depends on PPC32 && PPC_BOOK3S
	select PPC_HAVE_PMU_SUPPORT

config POWER3
	bool
	depends on PPC64 && PPC_BOOK3S
	default y if !POWER4_ONLY

config POWER4
	depends on PPC64 && PPC_BOOK3S
	def_bool y

config PPC_A2
	bool
	depends on PPC_BOOK3E_64

config TUNE_CELL
	bool "Optimize for Cell Broadband Engine"
	depends on PPC64 && PPC_BOOK3S
	help
	  Cause the compiler to optimize for the PPE of the Cell Broadband
	  Engine. This will make the code run considerably faster on Cell
	  but somewhat slower on other machines. This option only changes
	  the scheduling of instructions, not the selection of instructions
	  itself, so the resulting kernel will keep running on all other
	  machines. When building a kernel that is supposed to run only
	  on Cell, you should also select the POWER4_ONLY option.

# this is temp to handle compat with arch=ppc
config 8xx
	bool

config E500
	select FSL_EMB_PERFMON
	select PPC_FSL_BOOK3E
	bool

config PPC_E500MC
	bool "e500mc Support"
	select PPC_FPU
	depends on E500

config PPC_FPU
	bool
	default y if PPC64

config FSL_EMB_PERFMON
	bool "Freescale Embedded Perfmon"
	depends on E500 || PPC_83xx
	help
	  This is the Performance Monitor support found on the e500 core
	  and some e300 cores (c3 and c4).  Select this only if your
	  core supports the Embedded Performance Monitor APU

config FSL_EMB_PERF_EVENT
	bool
	depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
	default y

config FSL_EMB_PERF_EVENT_E500
	bool
	depends on FSL_EMB_PERF_EVENT && E500
	default y

config 4xx
	bool
	depends on 40x || 44x
	default y

config BOOKE
	bool
	depends on E200 || E500 || 44x || PPC_BOOK3E
	default y

config FSL_BOOKE
	bool
	depends on (E200 || E500) && PPC32
	default y

# this is for common code between PPC32 & PPC64 FSL BOOKE
config PPC_FSL_BOOK3E
	bool
	select FSL_EMB_PERFMON
	select PPC_SMP_MUXED_IPI
	select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
	default y if FSL_BOOKE

config PTE_64BIT
	bool
	depends on 44x || E500 || PPC_86xx
	default y if PHYS_64BIT

config PHYS_64BIT
	bool 'Large physical address support' if E500 || PPC_86xx
	depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
	---help---
	  This option enables kernel support for larger than 32-bit physical
	  addresses.  This feature may not be available on all cores.

	  If you have more than 3.5GB of RAM or so, you also need to enable
	  SWIOTLB under Kernel Options for this to work.  The actual number
	  is platform-dependent.

	  If in doubt, say N here.

config ALTIVEC
	bool "AltiVec Support"
	depends on 6xx || POWER4
	---help---
	  This option enables kernel support for the Altivec extensions to the
	  PowerPC processor. The kernel currently supports saving and restoring
	  altivec registers, and turning on the 'altivec enable' bit so user
	  processes can execute altivec instructions.

	  This option is only usefully if you have a processor that supports
	  altivec (G4, otherwise known as 74xx series), but does not have
	  any affect on a non-altivec cpu (it does, however add code to the
	  kernel).

	  If in doubt, say Y here.

config VSX
	bool "VSX Support"
	depends on POWER4 && ALTIVEC && PPC_FPU
	---help---

	  This option enables kernel support for the Vector Scaler extensions
	  to the PowerPC processor. The kernel currently supports saving and
	  restoring VSX registers, and turning on the 'VSX enable' bit so user
	  processes can execute VSX instructions.

	  This option is only useful if you have a processor that supports
	  VSX (P7 and above), but does not have any affect on a non-VSX
	  CPUs (it does, however add code to the kernel).

	  If in doubt, say Y here.

config PPC_ICSWX
	bool "Support for PowerPC icswx coprocessor instruction"
	depends on POWER4 || PPC_A2
	default n
	---help---

	  This option enables kernel support for the PowerPC Initiate
	  Coprocessor Store Word (icswx) coprocessor instruction on POWER7
	  or newer processors.

	  This option is only useful if you have a processor that supports
	  the icswx coprocessor instruction. It does not have any effect
	  on processors without the icswx coprocessor instruction.

	  This option slightly increases kernel memory usage.

	  If in doubt, say N here.

config PPC_ICSWX_PID
	bool "icswx requires direct PID management"
	depends on PPC_ICSWX && POWER4
	default y
	---help---
	  The PID register in server is used explicitly for ICSWX.  In
	  embedded systems PID management is done by the system.

config PPC_ICSWX_USE_SIGILL
	bool "Should a bad CT cause a SIGILL?"
	depends on PPC_ICSWX
	default n
	---help---
	  Should a bad CT used for "non-record form ICSWX" cause an
	  illegal instruction signal or should it be silent as
	  architected.

	  If in doubt, say N here.

config SPE
	bool "SPE Support"
	depends on E200 || (E500 && !PPC_E500MC)
	default y
	---help---
	  This option enables kernel support for the Signal Processing
	  Extensions (SPE) to the PowerPC processor. The kernel currently
	  supports saving and restoring SPE registers, and turning on the
	  'spe enable' bit so user processes can execute SPE instructions.

	  This option is only useful if you have a processor that supports
	  SPE (e500, otherwise known as 85xx series), but does not have any
	  effect on a non-spe cpu (it does, however add code to the kernel).

	  If in doubt, say Y here.

config PPC_STD_MMU
	def_bool y
	depends on PPC_BOOK3S

config PPC_STD_MMU_32
	def_bool y
	depends on PPC_STD_MMU && PPC32

config PPC_STD_MMU_64
	def_bool y
	depends on PPC_STD_MMU && PPC64

config PPC_MMU_NOHASH
	def_bool y
	depends on !PPC_STD_MMU

config PPC_BOOK3E_MMU
	def_bool y
	depends on FSL_BOOKE || PPC_BOOK3E

config PPC_MM_SLICES
	bool
	default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
	default n

config VIRT_CPU_ACCOUNTING
	bool "Deterministic task and CPU time accounting"
	depends on PPC64
	default y
	help
	  Select this option to enable more accurate task and CPU time
	  accounting.  This is done by reading a CPU counter on each
	  kernel entry and exit and on transitions within the kernel
	  between system, softirq and hardirq state, so there is a
	  small performance impact.  This also enables accounting of
	  stolen time on logically-partitioned systems running on
	  IBM POWER5-based machines.

	  If in doubt, say Y here.

config PPC_HAVE_PMU_SUPPORT
       bool

config PPC_PERF_CTRS
       def_bool y
       depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
       help
         This enables the powerpc-specific perf_event back-end.

config SMP
	depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
	bool "Symmetric multi-processing support"
	---help---
	  This enables support for systems with more than one CPU. If you have
	  a system with only one CPU, say N. If you have a system with more
	  than one CPU, say Y.  Note that the kernel does not currently
	  support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
	  since they have inadequate hardware support for multiprocessor
	  operation.

	  If you say N here, the kernel will run on single and multiprocessor
	  machines, but will use only one CPU of a multiprocessor machine. If
	  you say Y here, the kernel will run on single-processor machines.
	  On a single-processor machine, the kernel will run faster if you say
	  N here.

	  If you don't know what to do here, say N.

config NR_CPUS
	int "Maximum number of CPUs (2-8192)"
	range 2 8192
	depends on SMP
	default "32" if PPC64
	default "4"

config NOT_COHERENT_CACHE
	bool
	depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
	default n if PPC_47x
	default y

config CHECK_CACHE_COHERENCY
	bool

endmenu
Commit	Line	Data
a0ae9c7c AB	1	config PPC64
	2	bool "64-bit kernel"
	3	default n
	4	help
	5	This option selects whether a 32-bit or a 64-bit kernel
	6	will be built.
	7
	8	menu "Processor support"
	9	choice
	10	prompt "Processor Type"
	11	depends on PPC32
a0ae9c7c	12	help
b9fd305d AB	13	There are five families of 32 bit PowerPC chips supported.
	14	The most common ones are the desktop and server CPUs (601, 603,
	15	604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
e177edcd	16	embedded 512x/52xx/82xx/83xx/86xx counterparts.
b9fd305d AB	17	The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
	18	(85xx) each form a family of their own that is not compatible
	19	with the others.
	20
	21	If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
	22
48c93112	23	config PPC_BOOK3S_32
e177edcd	24	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
a0ae9c7c AB	25	select PPC_FPU
a0ae9c7c AB	26
a0ae9c7c AB	27	config PPC_85xx
	28	bool "Freescale 85xx"
	29	select E500
a0ae9c7c	30
a0ae9c7c AB	31	config PPC_8xx
	32	bool "Freescale 8xx"
	33	select FSL_SOC
	34	select 8xx
1088a209	35	select PPC_LIB_RHEAP
a0ae9c7c AB	36
	37	config 40x
	38	bool "AMCC 40x"
	39	select PPC_DCR_NATIVE
9dae8afd	40	select PPC_UDBG_16550
93173ce2	41	select 4xx_SOC
b500563b	42	select PPC_PCI_CHOICE
a0ae9c7c AB	43
a0ae9c7c AB	44	config 44x
e7f75ad0	45	bool "AMCC 44x, 46x or 47x"
a0ae9c7c	46	select PPC_DCR_NATIVE
1d5499b5	47	select PPC_UDBG_16550
93173ce2	48	select 4xx_SOC
b500563b	49	select PPC_PCI_CHOICE
4ee7084e	50	select PHYS_64BIT
a0ae9c7c AB	51
	52	config E200
	53	bool "Freescale e200"
	54
	55	endchoice
	56
2d27cfd3 BH	57	choice
2d27cfd3 BH	58	prompt "Processor Type"
5b7c3c91	59	depends on PPC64
2d27cfd3 BH	60	help
	61	There are two families of 64 bit PowerPC chips supported.
	62	The most common ones are the desktop and server CPUs
	63	(POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
	64
	65	The other are the "embedded" processors compliant with the
	66	"Book 3E" variant of the architecture
	67
	68	config PPC_BOOK3S_64
	69	bool "Server processors"
5b7c3c91	70	select PPC_FPU
5adfd346	71	select PPC_HAVE_PMU_SUPPORT
41151e77	72	select SYS_SUPPORTS_HUGETLBFS
5b7c3c91	73
2d27cfd3 BH	74	config PPC_BOOK3E_64
	75	bool "Embedded processors"
	76	select PPC_FPU # Make it a choice ?
1ece355b	77	select PPC_SMP_MUXED_IPI
2d27cfd3 BH	78
	79	endchoice
	80
d23c6fb4 AB	81	choice
	82	prompt "CPU selection"
	83	depends on PPC64
	84	default GENERIC_CPU
	85	help
	86	This will create a kernel which is optimised for a particular CPU.
	87	The resulting kernel may not run on other CPUs, so use this with care.
	88
	89	If unsure, select Generic.
	90
	91	config GENERIC_CPU
	92	bool "Generic"
	93
	94	config CELL_CPU
	95	bool "Cell Broadband Engine"
	96
	97	config POWER4_CPU
	98	bool "POWER4"
	99
	100	config POWER5_CPU
	101	bool "POWER5"
	102
	103	config POWER6_CPU
	104	bool "POWER6"
	105
	106	config POWER7_CPU
	107	bool "POWER7"
	108
	109	endchoice
	110
48c93112 BH	111	config PPC_BOOK3S
	112	def_bool y
	113	depends on PPC_BOOK3S_32 \|\| PPC_BOOK3S_64
28794d34	114
2d27cfd3 BH	115	config PPC_BOOK3E
	116	def_bool y
	117	depends on PPC_BOOK3E_64
	118
5b7c3c91 BH	119	config 6xx
	120	def_bool y
	121	depends on PPC32 && PPC_BOOK3S
7325927e	122	select PPC_HAVE_PMU_SUPPORT
5b7c3c91	123
a0ae9c7c AB	124	config POWER3
a0ae9c7c AB	125	bool
28794d34	126	depends on PPC64 && PPC_BOOK3S
a0ae9c7c AB	127	default y if !POWER4_ONLY
	128
	129	config POWER4
28794d34	130	depends on PPC64 && PPC_BOOK3S
a0ae9c7c AB	131	def_bool y
a0ae9c7c AB	132
76b4eda8 BH	133	config PPC_A2
	134	bool
	135	depends on PPC_BOOK3E_64
	136
3164cccd AB	137	config TUNE_CELL
3164cccd AB	138	bool "Optimize for Cell Broadband Engine"
28794d34	139	depends on PPC64 && PPC_BOOK3S
3164cccd AB	140	help
	141	Cause the compiler to optimize for the PPE of the Cell Broadband
	142	Engine. This will make the code run considerably faster on Cell
	143	but somewhat slower on other machines. This option only changes
	144	the scheduling of instructions, not the selection of instructions
	145	itself, so the resulting kernel will keep running on all other
	146	machines. When building a kernel that is supposed to run only
	147	on Cell, you should also select the POWER4_ONLY option.
	148
a0ae9c7c AB	149	# this is temp to handle compat with arch=ppc
	150	config 8xx
	151	bool
	152
a0ae9c7c	153	config E500
39aef685	154	select FSL_EMB_PERFMON
4490c06b	155	select PPC_FSL_BOOK3E
a0ae9c7c AB	156	bool
a0ae9c7c AB	157
3dfa8773 KG	158	config PPC_E500MC
	159	bool "e500mc Support"
	160	select PPC_FPU
	161	depends on E500
	162
a0ae9c7c AB	163	config PPC_FPU
	164	bool
	165	default y if PPC64
	166
5753c082 KG	167	config FSL_EMB_PERFMON
	168	bool "Freescale Embedded Perfmon"
	169	depends on E500 \|\| PPC_83xx
	170	help
	171	This is the Performance Monitor support found on the e500 core
	172	and some e300 cores (c3 and c4). Select this only if your
	173	core supports the Embedded Performance Monitor APU
	174
a1110654 SW	175	config FSL_EMB_PERF_EVENT
	176	bool
	177	depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
	178	default y
	179
	180	config FSL_EMB_PERF_EVENT_E500
	181	bool
	182	depends on FSL_EMB_PERF_EVENT && E500
	183	default y
	184
a0ae9c7c AB	185	config 4xx
	186	bool
	187	depends on 40x \|\| 44x
	188	default y
	189
	190	config BOOKE
	191	bool
2d27cfd3	192	depends on E200 \|\| E500 \|\| 44x \|\| PPC_BOOK3E
a0ae9c7c AB	193	default y
	194
	195	config FSL_BOOKE
	196	bool
4490c06b	197	depends on (E200 \|\| E500) && PPC32
a0ae9c7c AB	198	default y
a0ae9c7c AB	199
4490c06b KG	200	# this is for common code between PPC32 & PPC64 FSL BOOKE
	201	config PPC_FSL_BOOK3E
	202	bool
	203	select FSL_EMB_PERFMON
1ece355b	204	select PPC_SMP_MUXED_IPI
a475c8ec	205	select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT \|\| PPC64
4490c06b	206	default y if FSL_BOOKE
39aef685	207
a0ae9c7c AB	208	config PTE_64BIT
a0ae9c7c AB	209	bool
4ee7084e BB	210	depends on 44x \|\| E500 \|\| PPC_86xx
4ee7084e BB	211	default y if PHYS_64BIT
a0ae9c7c AB	212
a0ae9c7c AB	213	config PHYS_64BIT
4ee7084e BB	214	bool 'Large physical address support' if E500 \|\| PPC_86xx
4ee7084e BB	215	depends on (44x \|\| E500 \|\| PPC_86xx) && !PPC_83xx && !PPC_82xx
a0ae9c7c AB	216	---help---
a0ae9c7c AB	217	This option enables kernel support for larger than 32-bit physical
4ee7084e BB	218	addresses. This feature may not be available on all cores.
	219
	220	If you have more than 3.5GB of RAM or so, you also need to enable
	221	SWIOTLB under Kernel Options for this to work. The actual number
	222	is platform-dependent.
a0ae9c7c AB	223
	224	If in doubt, say N here.
	225
	226	config ALTIVEC
	227	bool "AltiVec Support"
28794d34	228	depends on 6xx \|\| POWER4
a0ae9c7c AB	229	---help---
	230	This option enables kernel support for the Altivec extensions to the
	231	PowerPC processor. The kernel currently supports saving and restoring
	232	altivec registers, and turning on the 'altivec enable' bit so user
	233	processes can execute altivec instructions.
	234
	235	This option is only usefully if you have a processor that supports
	236	altivec (G4, otherwise known as 74xx series), but does not have
	237	any affect on a non-altivec cpu (it does, however add code to the
	238	kernel).
	239
	240	If in doubt, say Y here.
	241
96d5b52c MN	242	config VSX
	243	bool "VSX Support"
	244	depends on POWER4 && ALTIVEC && PPC_FPU
	245	---help---
	246
	247	This option enables kernel support for the Vector Scaler extensions
	248	to the PowerPC processor. The kernel currently supports saving and
	249	restoring VSX registers, and turning on the 'VSX enable' bit so user
	250	processes can execute VSX instructions.
	251
	252	This option is only useful if you have a processor that supports
	253	VSX (P7 and above), but does not have any affect on a non-VSX
	254	CPUs (it does, however add code to the kernel).
	255
	256	If in doubt, say Y here.
	257
851d2e2f THFL	258	config PPC_ICSWX
851d2e2f THFL	259	bool "Support for PowerPC icswx coprocessor instruction"
fac26ad4	260	depends on POWER4 \|\| PPC_A2
851d2e2f THFL	261	default n
	262	---help---
	263
	264	This option enables kernel support for the PowerPC Initiate
	265	Coprocessor Store Word (icswx) coprocessor instruction on POWER7
	266	or newer processors.
	267
	268	This option is only useful if you have a processor that supports
	269	the icswx coprocessor instruction. It does not have any effect
	270	on processors without the icswx coprocessor instruction.
	271
	272	This option slightly increases kernel memory usage.
	273
	274	If in doubt, say N here.
	275
9d670280 JX	276	config PPC_ICSWX_PID
	277	bool "icswx requires direct PID management"
	278	depends on PPC_ICSWX && POWER4
	279	default y
	280	---help---
c3dcf53a	281	The PID register in server is used explicitly for ICSWX. In
6b2aac42	282	embedded systems PID management is done by the system.
9d670280	283
c3dcf53a JX	284	config PPC_ICSWX_USE_SIGILL
	285	bool "Should a bad CT cause a SIGILL?"
	286	depends on PPC_ICSWX
	287	default n
	288	---help---
	289	Should a bad CT used for "non-record form ICSWX" cause an
6b2aac42	290	illegal instruction signal or should it be silent as
c3dcf53a JX	291	architected.
	292
	293	If in doubt, say N here.
	294
a0ae9c7c AB	295	config SPE
a0ae9c7c AB	296	bool "SPE Support"
3dfa8773	297	depends on E200 \|\| (E500 && !PPC_E500MC)
a0ae9c7c AB	298	default y
	299	---help---
	300	This option enables kernel support for the Signal Processing
	301	Extensions (SPE) to the PowerPC processor. The kernel currently
	302	supports saving and restoring SPE registers, and turning on the
	303	'spe enable' bit so user processes can execute SPE instructions.
	304
	305	This option is only useful if you have a processor that supports
	306	SPE (e500, otherwise known as 85xx series), but does not have any
	307	effect on a non-spe cpu (it does, however add code to the kernel).
	308
	309	If in doubt, say Y here.
	310
	311	config PPC_STD_MMU
5b7c3c91 BH	312	def_bool y
5b7c3c91 BH	313	depends on PPC_BOOK3S
a0ae9c7c AB	314
	315	config PPC_STD_MMU_32
	316	def_bool y
	317	depends on PPC_STD_MMU && PPC32
	318
5e696617 BH	319	config PPC_STD_MMU_64
	320	def_bool y
	321	depends on PPC_STD_MMU && PPC64
	322
	323	config PPC_MMU_NOHASH
	324	def_bool y
	325	depends on !PPC_STD_MMU
	326
70fe3af8 KG	327	config PPC_BOOK3E_MMU
70fe3af8 KG	328	def_bool y
2d27cfd3	329	depends on FSL_BOOKE \|\| PPC_BOOK3E
70fe3af8	330
a0ae9c7c AB	331	config PPC_MM_SLICES
a0ae9c7c AB	332	bool
a475c8ec	333	default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) \|\| (PPC_STD_MMU_64 && PPC_64K_PAGES)
a0ae9c7c AB	334	default n
	335
	336	config VIRT_CPU_ACCOUNTING
	337	bool "Deterministic task and CPU time accounting"
	338	depends on PPC64
	339	default y
	340	help
	341	Select this option to enable more accurate task and CPU time
	342	accounting. This is done by reading a CPU counter on each
	343	kernel entry and exit and on transitions within the kernel
	344	between system, softirq and hardirq state, so there is a
	345	small performance impact. This also enables accounting of
	346	stolen time on logically-partitioned systems running on
	347	IBM POWER5-based machines.
	348
	349	If in doubt, say Y here.
	350
105988c0 PM	351	config PPC_HAVE_PMU_SUPPORT
	352	bool
	353
	354	config PPC_PERF_CTRS
	355	def_bool y
cdd6c482	356	depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
105988c0	357	help
cdd6c482	358	This enables the powerpc-specific perf_event back-end.
105988c0	359
a0ae9c7c	360	config SMP
e7f75ad0	361	depends on PPC_BOOK3S \|\| PPC_BOOK3E \|\| FSL_BOOKE \|\| PPC_47x
a0ae9c7c AB	362	bool "Symmetric multi-processing support"
	363	---help---
	364	This enables support for systems with more than one CPU. If you have
	365	a system with only one CPU, say N. If you have a system with more
	366	than one CPU, say Y. Note that the kernel does not currently
	367	support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
	368	since they have inadequate hardware support for multiprocessor
	369	operation.
	370
	371	If you say N here, the kernel will run on single and multiprocessor
	372	machines, but will use only one CPU of a multiprocessor machine. If
	373	you say Y here, the kernel will run on single-processor machines.
	374	On a single-processor machine, the kernel will run faster if you say
	375	N here.
	376
	377	If you don't know what to do here, say N.
	378
	379	config NR_CPUS
2d8ae638 MN	380	int "Maximum number of CPUs (2-8192)"
2d8ae638 MN	381	range 2 8192
a0ae9c7c AB	382	depends on SMP
	383	default "32" if PPC64
	384	default "4"
	385
	386	config NOT_COHERENT_CACHE
	387	bool
b91a143b	388	depends on 4xx \|\| 8xx \|\| E200 \|\| PPC_MPC512x \|\| GAMECUBE_COMMON
e7f75ad0	389	default n if PPC_47x
a0ae9c7c AB	390	default y
a0ae9c7c AB	391
f8eb77d6	392	config CHECK_CACHE_COHERENCY
a0ae9c7c AB	393	bool
	394
	395	endmenu