Commit | Line | Data |
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a0ae9c7c AB |
1 | config PPC64 |
2 | bool "64-bit kernel" | |
3 | default n | |
4 | help | |
5 | This option selects whether a 32-bit or a 64-bit kernel | |
6 | will be built. | |
7 | ||
8 | menu "Processor support" | |
9 | choice | |
10 | prompt "Processor Type" | |
11 | depends on PPC32 | |
12 | default 6xx | |
a0ae9c7c | 13 | help |
b9fd305d AB |
14 | There are five families of 32 bit PowerPC chips supported. |
15 | The most common ones are the desktop and server CPUs (601, 603, | |
16 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their | |
e177edcd | 17 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
b9fd305d AB |
18 | The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
19 | (85xx) each form a family of their own that is not compatible | |
20 | with the others. | |
21 | ||
22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. | |
23 | ||
24 | config 6xx | |
e177edcd | 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
a0ae9c7c AB |
26 | select PPC_FPU |
27 | ||
a0ae9c7c AB |
28 | config PPC_85xx |
29 | bool "Freescale 85xx" | |
30 | select E500 | |
31 | select FSL_SOC | |
3a83156b | 32 | select MPC85xx |
a0ae9c7c | 33 | |
a0ae9c7c AB |
34 | config PPC_8xx |
35 | bool "Freescale 8xx" | |
36 | select FSL_SOC | |
37 | select 8xx | |
1088a209 | 38 | select PPC_LIB_RHEAP |
a0ae9c7c AB |
39 | |
40 | config 40x | |
41 | bool "AMCC 40x" | |
42 | select PPC_DCR_NATIVE | |
9dae8afd | 43 | select PPC_UDBG_16550 |
93173ce2 | 44 | select 4xx_SOC |
b500563b | 45 | select PPC_PCI_CHOICE |
a0ae9c7c AB |
46 | |
47 | config 44x | |
48 | bool "AMCC 44x" | |
49 | select PPC_DCR_NATIVE | |
1d5499b5 | 50 | select PPC_UDBG_16550 |
93173ce2 | 51 | select 4xx_SOC |
b500563b | 52 | select PPC_PCI_CHOICE |
4ee7084e | 53 | select PHYS_64BIT |
a0ae9c7c AB |
54 | |
55 | config E200 | |
56 | bool "Freescale e200" | |
57 | ||
58 | endchoice | |
59 | ||
60 | config POWER4_ONLY | |
61 | bool "Optimize for POWER4" | |
62 | depends on PPC64 | |
63 | default n | |
64 | ---help--- | |
65 | Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. | |
66 | The resulting binary will not work on POWER3 or RS64 processors | |
67 | when compiled with binutils 2.15 or later. | |
68 | ||
69 | config POWER3 | |
70 | bool | |
71 | depends on PPC64 | |
72 | default y if !POWER4_ONLY | |
73 | ||
74 | config POWER4 | |
75 | depends on PPC64 | |
76 | def_bool y | |
77 | ||
3164cccd AB |
78 | config TUNE_CELL |
79 | bool "Optimize for Cell Broadband Engine" | |
80 | depends on PPC64 | |
81 | help | |
82 | Cause the compiler to optimize for the PPE of the Cell Broadband | |
83 | Engine. This will make the code run considerably faster on Cell | |
84 | but somewhat slower on other machines. This option only changes | |
85 | the scheduling of instructions, not the selection of instructions | |
86 | itself, so the resulting kernel will keep running on all other | |
87 | machines. When building a kernel that is supposed to run only | |
88 | on Cell, you should also select the POWER4_ONLY option. | |
89 | ||
a0ae9c7c AB |
90 | # this is temp to handle compat with arch=ppc |
91 | config 8xx | |
92 | bool | |
93 | ||
a0ae9c7c | 94 | config E500 |
39aef685 | 95 | select FSL_EMB_PERFMON |
a0ae9c7c AB |
96 | bool |
97 | ||
3dfa8773 KG |
98 | config PPC_E500MC |
99 | bool "e500mc Support" | |
100 | select PPC_FPU | |
101 | depends on E500 | |
102 | ||
a0ae9c7c AB |
103 | config PPC_FPU |
104 | bool | |
105 | default y if PPC64 | |
106 | ||
107 | config 4xx | |
108 | bool | |
109 | depends on 40x || 44x | |
110 | default y | |
111 | ||
112 | config BOOKE | |
113 | bool | |
114 | depends on E200 || E500 || 44x | |
115 | default y | |
116 | ||
117 | config FSL_BOOKE | |
118 | bool | |
119 | depends on E200 || E500 | |
120 | default y | |
121 | ||
39aef685 | 122 | config FSL_EMB_PERFMON |
ad562c71 AF |
123 | bool "Freescale Embedded Perfmon" |
124 | depends on E500 || PPC_83xx | |
125 | help | |
126 | This is the Performance Monitor support found on the e500 core | |
127 | and some e300 cores (c3 and c4). Select this only if your | |
128 | core supports the Embedded Performance Monitor APU | |
39aef685 | 129 | |
a0ae9c7c AB |
130 | config PTE_64BIT |
131 | bool | |
4ee7084e BB |
132 | depends on 44x || E500 || PPC_86xx |
133 | default y if PHYS_64BIT | |
a0ae9c7c AB |
134 | |
135 | config PHYS_64BIT | |
4ee7084e BB |
136 | bool 'Large physical address support' if E500 || PPC_86xx |
137 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx | |
a0ae9c7c AB |
138 | ---help--- |
139 | This option enables kernel support for larger than 32-bit physical | |
4ee7084e BB |
140 | addresses. This feature may not be available on all cores. |
141 | ||
142 | If you have more than 3.5GB of RAM or so, you also need to enable | |
143 | SWIOTLB under Kernel Options for this to work. The actual number | |
144 | is platform-dependent. | |
a0ae9c7c AB |
145 | |
146 | If in doubt, say N here. | |
147 | ||
148 | config ALTIVEC | |
149 | bool "AltiVec Support" | |
150 | depends on CLASSIC32 || POWER4 | |
151 | ---help--- | |
152 | This option enables kernel support for the Altivec extensions to the | |
153 | PowerPC processor. The kernel currently supports saving and restoring | |
154 | altivec registers, and turning on the 'altivec enable' bit so user | |
155 | processes can execute altivec instructions. | |
156 | ||
157 | This option is only usefully if you have a processor that supports | |
158 | altivec (G4, otherwise known as 74xx series), but does not have | |
159 | any affect on a non-altivec cpu (it does, however add code to the | |
160 | kernel). | |
161 | ||
162 | If in doubt, say Y here. | |
163 | ||
96d5b52c MN |
164 | config VSX |
165 | bool "VSX Support" | |
166 | depends on POWER4 && ALTIVEC && PPC_FPU | |
167 | ---help--- | |
168 | ||
169 | This option enables kernel support for the Vector Scaler extensions | |
170 | to the PowerPC processor. The kernel currently supports saving and | |
171 | restoring VSX registers, and turning on the 'VSX enable' bit so user | |
172 | processes can execute VSX instructions. | |
173 | ||
174 | This option is only useful if you have a processor that supports | |
175 | VSX (P7 and above), but does not have any affect on a non-VSX | |
176 | CPUs (it does, however add code to the kernel). | |
177 | ||
178 | If in doubt, say Y here. | |
179 | ||
a0ae9c7c AB |
180 | config SPE |
181 | bool "SPE Support" | |
3dfa8773 | 182 | depends on E200 || (E500 && !PPC_E500MC) |
a0ae9c7c AB |
183 | default y |
184 | ---help--- | |
185 | This option enables kernel support for the Signal Processing | |
186 | Extensions (SPE) to the PowerPC processor. The kernel currently | |
187 | supports saving and restoring SPE registers, and turning on the | |
188 | 'spe enable' bit so user processes can execute SPE instructions. | |
189 | ||
190 | This option is only useful if you have a processor that supports | |
191 | SPE (e500, otherwise known as 85xx series), but does not have any | |
192 | effect on a non-spe cpu (it does, however add code to the kernel). | |
193 | ||
194 | If in doubt, say Y here. | |
195 | ||
196 | config PPC_STD_MMU | |
197 | bool | |
5e696617 | 198 | depends on 6xx || PPC64 |
a0ae9c7c AB |
199 | default y |
200 | ||
201 | config PPC_STD_MMU_32 | |
202 | def_bool y | |
203 | depends on PPC_STD_MMU && PPC32 | |
204 | ||
5e696617 BH |
205 | config PPC_STD_MMU_64 |
206 | def_bool y | |
207 | depends on PPC_STD_MMU && PPC64 | |
208 | ||
209 | config PPC_MMU_NOHASH | |
210 | def_bool y | |
211 | depends on !PPC_STD_MMU | |
212 | ||
a0ae9c7c AB |
213 | config PPC_MM_SLICES |
214 | bool | |
ca9153a3 | 215 | default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
a0ae9c7c AB |
216 | default n |
217 | ||
218 | config VIRT_CPU_ACCOUNTING | |
219 | bool "Deterministic task and CPU time accounting" | |
220 | depends on PPC64 | |
221 | default y | |
222 | help | |
223 | Select this option to enable more accurate task and CPU time | |
224 | accounting. This is done by reading a CPU counter on each | |
225 | kernel entry and exit and on transitions within the kernel | |
226 | between system, softirq and hardirq state, so there is a | |
227 | small performance impact. This also enables accounting of | |
228 | stolen time on logically-partitioned systems running on | |
229 | IBM POWER5-based machines. | |
230 | ||
231 | If in doubt, say Y here. | |
232 | ||
233 | config SMP | |
234 | depends on PPC_STD_MMU | |
235 | bool "Symmetric multi-processing support" | |
236 | ---help--- | |
237 | This enables support for systems with more than one CPU. If you have | |
238 | a system with only one CPU, say N. If you have a system with more | |
239 | than one CPU, say Y. Note that the kernel does not currently | |
240 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors | |
241 | since they have inadequate hardware support for multiprocessor | |
242 | operation. | |
243 | ||
244 | If you say N here, the kernel will run on single and multiprocessor | |
245 | machines, but will use only one CPU of a multiprocessor machine. If | |
246 | you say Y here, the kernel will run on single-processor machines. | |
247 | On a single-processor machine, the kernel will run faster if you say | |
248 | N here. | |
249 | ||
250 | If you don't know what to do here, say N. | |
251 | ||
252 | config NR_CPUS | |
90035fe3 TB |
253 | int "Maximum number of CPUs (2-1024)" |
254 | range 2 1024 | |
a0ae9c7c AB |
255 | depends on SMP |
256 | default "32" if PPC64 | |
257 | default "4" | |
258 | ||
259 | config NOT_COHERENT_CACHE | |
260 | bool | |
e177edcd | 261 | depends on 4xx || 8xx || E200 || PPC_MPC512x |
a0ae9c7c AB |
262 | default y |
263 | ||
f8eb77d6 | 264 | config CHECK_CACHE_COHERENCY |
a0ae9c7c AB |
265 | bool |
266 | ||
267 | endmenu |