[deliverable/linux.git] / arch / powerpc / platforms / Kconfig.cputype

config PPC64
	bool "64-bit kernel"
	default n
	select HAVE_VIRT_CPU_ACCOUNTING
	help
	  This option selects whether a 32-bit or a 64-bit kernel
	  will be built.

menu "Processor support"
choice
	prompt "Processor Type"
	depends on PPC32
	help
	  There are five families of 32 bit PowerPC chips supported.
	  The most common ones are the desktop and server CPUs (601, 603,
	  604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
	  embedded 512x/52xx/82xx/83xx/86xx counterparts.
	  The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
	  (85xx) each form a family of their own that is not compatible
	  with the others.

	  If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.

config PPC_BOOK3S_32
	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
	select PPC_FPU

config PPC_85xx
	bool "Freescale 85xx"
	select E500

config PPC_8xx
	bool "Freescale 8xx"
	select FSL_SOC
	select 8xx
	select PPC_LIB_RHEAP

config 40x
	bool "AMCC 40x"
	select PPC_DCR_NATIVE
	select PPC_UDBG_16550
	select 4xx_SOC
	select PPC_PCI_CHOICE

config 44x
	bool "AMCC 44x, 46x or 47x"
	select PPC_DCR_NATIVE
	select PPC_UDBG_16550
	select 4xx_SOC
	select PPC_PCI_CHOICE
	select PHYS_64BIT

config E200
	bool "Freescale e200"

endchoice

choice
	prompt "Processor Type"
	depends on PPC64
	help
	  There are two families of 64 bit PowerPC chips supported.
	  The most common ones are the desktop and server CPUs
	  (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)

	  The other are the "embedded" processors compliant with the
	  "Book 3E" variant of the architecture

config PPC_BOOK3S_64
	bool "Server processors"
	select PPC_FPU
	select PPC_HAVE_PMU_SUPPORT
	select SYS_SUPPORTS_HUGETLBFS
	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if PPC_64K_PAGES
	select ARCH_SUPPORTS_NUMA_BALANCING
	select IRQ_WORK

config PPC_BOOK3E_64
	bool "Embedded processors"
	select PPC_FPU # Make it a choice ?
	select PPC_SMP_MUXED_IPI
	select PPC_DOORBELL

endchoice

choice
	prompt "CPU selection"
	depends on PPC64
	default GENERIC_CPU
	help
	  This will create a kernel which is optimised for a particular CPU.
	  The resulting kernel may not run on other CPUs, so use this with care.

	  If unsure, select Generic.

config GENERIC_CPU
	bool "Generic"
	depends on !CPU_LITTLE_ENDIAN

config CELL_CPU
	bool "Cell Broadband Engine"
	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN

config POWER4_CPU
	bool "POWER4"
	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN

config POWER5_CPU
	bool "POWER5"
	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN

config POWER6_CPU
	bool "POWER6"
	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN

config POWER7_CPU
	bool "POWER7"
	depends on PPC_BOOK3S_64

config E5500_CPU
	bool "Freescale e5500"
	depends on E500

config E6500_CPU
	bool "Freescale e6500"
	depends on E500

endchoice

config PPC_BOOK3S
	def_bool y
	depends on PPC_BOOK3S_32 || PPC_BOOK3S_64

config PPC_BOOK3E
	def_bool y
	depends on PPC_BOOK3E_64

config 6xx
	def_bool y
	depends on PPC32 && PPC_BOOK3S
	select PPC_HAVE_PMU_SUPPORT

config POWER3
	depends on PPC64 && PPC_BOOK3S
	def_bool y

config POWER4
	depends on PPC64 && PPC_BOOK3S
	def_bool y

config TUNE_CELL
	bool "Optimize for Cell Broadband Engine"
	depends on PPC64 && PPC_BOOK3S
	help
	  Cause the compiler to optimize for the PPE of the Cell Broadband
	  Engine. This will make the code run considerably faster on Cell
	  but somewhat slower on other machines. This option only changes
	  the scheduling of instructions, not the selection of instructions
	  itself, so the resulting kernel will keep running on all other
	  machines.

# this is temp to handle compat with arch=ppc
config 8xx
	bool

config E500
	select FSL_EMB_PERFMON
	select PPC_FSL_BOOK3E
	bool

config PPC_E500MC
	bool "e500mc Support"
	select PPC_FPU
	select COMMON_CLK
	depends on E500
	help
	  This must be enabled for running on e500mc (and derivatives
	  such as e5500/e6500), and must be disabled for running on
	  e500v1 or e500v2.

config PPC_FPU
	bool
	default y if PPC64

config FSL_EMB_PERFMON
	bool "Freescale Embedded Perfmon"
	depends on E500 || PPC_83xx
	help
	  This is the Performance Monitor support found on the e500 core
	  and some e300 cores (c3 and c4).  Select this only if your
	  core supports the Embedded Performance Monitor APU

config FSL_EMB_PERF_EVENT
	bool
	depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
	default y

config FSL_EMB_PERF_EVENT_E500
	bool
	depends on FSL_EMB_PERF_EVENT && E500
	default y

config 4xx
	bool
	depends on 40x || 44x
	default y

config BOOKE
	bool
	depends on E200 || E500 || 44x || PPC_BOOK3E
	default y

config FSL_BOOKE
	bool
	depends on (E200 || E500) && PPC32
	default y

# this is for common code between PPC32 & PPC64 FSL BOOKE
config PPC_FSL_BOOK3E
	bool
	select FSL_EMB_PERFMON
	select PPC_SMP_MUXED_IPI
	select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
	select PPC_DOORBELL
	default y if FSL_BOOKE

config PTE_64BIT
	bool
	depends on 44x || E500 || PPC_86xx
	default y if PHYS_64BIT

config PHYS_64BIT
	bool 'Large physical address support' if E500 || PPC_86xx
	depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
	---help---
	  This option enables kernel support for larger than 32-bit physical
	  addresses.  This feature may not be available on all cores.

	  If you have more than 3.5GB of RAM or so, you also need to enable
	  SWIOTLB under Kernel Options for this to work.  The actual number
	  is platform-dependent.

	  If in doubt, say N here.

config ALTIVEC
	bool "AltiVec Support"
	depends on 6xx || POWER4 || (PPC_E500MC && PPC64)
	---help---
	  This option enables kernel support for the Altivec extensions to the
	  PowerPC processor. The kernel currently supports saving and restoring
	  altivec registers, and turning on the 'altivec enable' bit so user
	  processes can execute altivec instructions.

	  This option is only usefully if you have a processor that supports
	  altivec (G4, otherwise known as 74xx series), but does not have
	  any affect on a non-altivec cpu (it does, however add code to the
	  kernel).

	  If in doubt, say Y here.

config VSX
	bool "VSX Support"
	depends on POWER4 && ALTIVEC && PPC_FPU
	---help---

	  This option enables kernel support for the Vector Scaler extensions
	  to the PowerPC processor. The kernel currently supports saving and
	  restoring VSX registers, and turning on the 'VSX enable' bit so user
	  processes can execute VSX instructions.

	  This option is only useful if you have a processor that supports
	  VSX (P7 and above), but does not have any affect on a non-VSX
	  CPUs (it does, however add code to the kernel).

	  If in doubt, say Y here.

config PPC_ICSWX
	bool "Support for PowerPC icswx coprocessor instruction"
	depends on POWER4
	default n
	---help---

	  This option enables kernel support for the PowerPC Initiate
	  Coprocessor Store Word (icswx) coprocessor instruction on POWER7
	  or newer processors.

	  This option is only useful if you have a processor that supports
	  the icswx coprocessor instruction. It does not have any effect
	  on processors without the icswx coprocessor instruction.

	  This option slightly increases kernel memory usage.

	  If in doubt, say N here.

config PPC_ICSWX_PID
	bool "icswx requires direct PID management"
	depends on PPC_ICSWX && POWER4
	default y
	---help---
	  The PID register in server is used explicitly for ICSWX.  In
	  embedded systems PID management is done by the system.

config PPC_ICSWX_USE_SIGILL
	bool "Should a bad CT cause a SIGILL?"
	depends on PPC_ICSWX
	default n
	---help---
	  Should a bad CT used for "non-record form ICSWX" cause an
	  illegal instruction signal or should it be silent as
	  architected.

	  If in doubt, say N here.

config SPE
	bool "SPE Support"
	depends on E200 || (E500 && !PPC_E500MC)
	default y
	---help---
	  This option enables kernel support for the Signal Processing
	  Extensions (SPE) to the PowerPC processor. The kernel currently
	  supports saving and restoring SPE registers, and turning on the
	  'spe enable' bit so user processes can execute SPE instructions.

	  This option is only useful if you have a processor that supports
	  SPE (e500, otherwise known as 85xx series), but does not have any
	  effect on a non-spe cpu (it does, however add code to the kernel).

	  If in doubt, say Y here.

config PPC_STD_MMU
	def_bool y
	depends on PPC_BOOK3S

config PPC_STD_MMU_32
	def_bool y
	depends on PPC_STD_MMU && PPC32

config PPC_STD_MMU_64
	def_bool y
	depends on PPC_STD_MMU && PPC64

config PPC_MMU_NOHASH
	def_bool y
	depends on !PPC_STD_MMU

config PPC_BOOK3E_MMU
	def_bool y
	depends on FSL_BOOKE || PPC_BOOK3E

config PPC_MM_SLICES
	bool
	default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
	default n

config PPC_HAVE_PMU_SUPPORT
       bool

config PPC_PERF_CTRS
       def_bool y
       depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
       help
         This enables the powerpc-specific perf_event back-end.

config SMP
	depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
	bool "Symmetric multi-processing support"
	---help---
	  This enables support for systems with more than one CPU. If you have
	  a system with only one CPU, say N. If you have a system with more
	  than one CPU, say Y.  Note that the kernel does not currently
	  support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
	  since they have inadequate hardware support for multiprocessor
	  operation.

	  If you say N here, the kernel will run on single and multiprocessor
	  machines, but will use only one CPU of a multiprocessor machine. If
	  you say Y here, the kernel will run on single-processor machines.
	  On a single-processor machine, the kernel will run faster if you say
	  N here.

	  If you don't know what to do here, say N.

config NR_CPUS
	int "Maximum number of CPUs (2-8192)"
	range 2 8192
	depends on SMP
	default "32" if PPC64
	default "4"

config NOT_COHERENT_CACHE
	bool
	depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
	default n if PPC_47x
	default y

config CHECK_CACHE_COHERENCY
	bool

config PPC_DOORBELL
	bool
	default n

endmenu

choice
	prompt "Endianness selection"
	default CPU_BIG_ENDIAN
	help
	  This option selects whether a big endian or little endian kernel will
	  be built.

config CPU_BIG_ENDIAN
	bool "Build big endian kernel"
	help
	  Build a big endian kernel.

	  If unsure, select this option.

config CPU_LITTLE_ENDIAN
	bool "Build little endian kernel"
	select PPC64_BOOT_WRAPPER
	help
	  Build a little endian kernel.

	  Note that if cross compiling a little endian kernel,
	  CROSS_COMPILE must point to a toolchain capable of targeting
	  little endian powerpc.

endchoice

config PPC64_BOOT_WRAPPER
	def_bool n
	depends on CPU_LITTLE_ENDIAN
Commit	Line	Data
a0ae9c7c AB	1	config PPC64
	2	bool "64-bit kernel"
	3	default n
b952741c	4	select HAVE_VIRT_CPU_ACCOUNTING
a0ae9c7c AB	5	help
	6	This option selects whether a 32-bit or a 64-bit kernel
	7	will be built.
	8
	9	menu "Processor support"
	10	choice
	11	prompt "Processor Type"
	12	depends on PPC32
a0ae9c7c	13	help
b9fd305d AB	14	There are five families of 32 bit PowerPC chips supported.
	15	The most common ones are the desktop and server CPUs (601, 603,
	16	604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
e177edcd	17	embedded 512x/52xx/82xx/83xx/86xx counterparts.
b9fd305d AB	18	The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
	19	(85xx) each form a family of their own that is not compatible
	20	with the others.
	21
	22	If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
	23
48c93112	24	config PPC_BOOK3S_32
e177edcd	25	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
a0ae9c7c AB	26	select PPC_FPU
a0ae9c7c AB	27
a0ae9c7c AB	28	config PPC_85xx
	29	bool "Freescale 85xx"
	30	select E500
a0ae9c7c	31
a0ae9c7c AB	32	config PPC_8xx
	33	bool "Freescale 8xx"
	34	select FSL_SOC
	35	select 8xx
1088a209	36	select PPC_LIB_RHEAP
a0ae9c7c AB	37
	38	config 40x
	39	bool "AMCC 40x"
	40	select PPC_DCR_NATIVE
9dae8afd	41	select PPC_UDBG_16550
93173ce2	42	select 4xx_SOC
b500563b	43	select PPC_PCI_CHOICE
a0ae9c7c AB	44
a0ae9c7c AB	45	config 44x
e7f75ad0	46	bool "AMCC 44x, 46x or 47x"
a0ae9c7c	47	select PPC_DCR_NATIVE
1d5499b5	48	select PPC_UDBG_16550
93173ce2	49	select 4xx_SOC
b500563b	50	select PPC_PCI_CHOICE
4ee7084e	51	select PHYS_64BIT
a0ae9c7c AB	52
	53	config E200
	54	bool "Freescale e200"
	55
	56	endchoice
	57
2d27cfd3 BH	58	choice
2d27cfd3 BH	59	prompt "Processor Type"
5b7c3c91	60	depends on PPC64
2d27cfd3 BH	61	help
	62	There are two families of 64 bit PowerPC chips supported.
	63	The most common ones are the desktop and server CPUs
	64	(POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
	65
	66	The other are the "embedded" processors compliant with the
	67	"Book 3E" variant of the architecture
	68
	69	config PPC_BOOK3S_64
	70	bool "Server processors"
5b7c3c91	71	select PPC_FPU
5adfd346	72	select PPC_HAVE_PMU_SUPPORT
41151e77	73	select SYS_SUPPORTS_HUGETLBFS
074c2eae	74	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if PPC_64K_PAGES
c34a51ce	75	select ARCH_SUPPORTS_NUMA_BALANCING
527518f1	76	select IRQ_WORK
5b7c3c91	77
2d27cfd3 BH	78	config PPC_BOOK3E_64
	79	bool "Embedded processors"
	80	select PPC_FPU # Make it a choice ?
1ece355b	81	select PPC_SMP_MUXED_IPI
440bc685	82	select PPC_DOORBELL
2d27cfd3 BH	83
	84	endchoice
	85
d23c6fb4 AB	86	choice
	87	prompt "CPU selection"
	88	depends on PPC64
	89	default GENERIC_CPU
	90	help
	91	This will create a kernel which is optimised for a particular CPU.
	92	The resulting kernel may not run on other CPUs, so use this with care.
	93
	94	If unsure, select Generic.
	95
	96	config GENERIC_CPU
	97	bool "Generic"
686245be	98	depends on !CPU_LITTLE_ENDIAN
d23c6fb4 AB	99
	100	config CELL_CPU
	101	bool "Cell Broadband Engine"
686245be	102	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
d23c6fb4 AB	103
	104	config POWER4_CPU
	105	bool "POWER4"
686245be	106	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
d23c6fb4 AB	107
	108	config POWER5_CPU
	109	bool "POWER5"
686245be	110	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
d23c6fb4 AB	111
	112	config POWER6_CPU
	113	bool "POWER6"
686245be	114	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
d23c6fb4 AB	115
	116	config POWER7_CPU
	117	bool "POWER7"
01718ba6 SW	118	depends on PPC_BOOK3S_64
	119
	120	config E5500_CPU
	121	bool "Freescale e5500"
	122	depends on E500
	123
	124	config E6500_CPU
	125	bool "Freescale e6500"
	126	depends on E500
d23c6fb4 AB	127
	128	endchoice
	129
48c93112 BH	130	config PPC_BOOK3S
	131	def_bool y
	132	depends on PPC_BOOK3S_32 \|\| PPC_BOOK3S_64
28794d34	133
2d27cfd3 BH	134	config PPC_BOOK3E
	135	def_bool y
	136	depends on PPC_BOOK3E_64
	137
5b7c3c91 BH	138	config 6xx
	139	def_bool y
	140	depends on PPC32 && PPC_BOOK3S
7325927e	141	select PPC_HAVE_PMU_SUPPORT
5b7c3c91	142
a0ae9c7c	143	config POWER3
28794d34	144	depends on PPC64 && PPC_BOOK3S
ff2d7587	145	def_bool y
a0ae9c7c AB	146
a0ae9c7c AB	147	config POWER4
28794d34	148	depends on PPC64 && PPC_BOOK3S
a0ae9c7c AB	149	def_bool y
a0ae9c7c AB	150
3164cccd AB	151	config TUNE_CELL
3164cccd AB	152	bool "Optimize for Cell Broadband Engine"
28794d34	153	depends on PPC64 && PPC_BOOK3S
3164cccd AB	154	help
	155	Cause the compiler to optimize for the PPE of the Cell Broadband
	156	Engine. This will make the code run considerably faster on Cell
	157	but somewhat slower on other machines. This option only changes
	158	the scheduling of instructions, not the selection of instructions
	159	itself, so the resulting kernel will keep running on all other
ff2d7587	160	machines.
3164cccd	161
a0ae9c7c AB	162	# this is temp to handle compat with arch=ppc
	163	config 8xx
	164	bool
	165
a0ae9c7c	166	config E500
39aef685	167	select FSL_EMB_PERFMON
4490c06b	168	select PPC_FSL_BOOK3E
a0ae9c7c AB	169	bool
a0ae9c7c AB	170
3dfa8773 KG	171	config PPC_E500MC
	172	bool "e500mc Support"
	173	select PPC_FPU
555eae97	174	select COMMON_CLK
3dfa8773	175	depends on E500
9653018b SW	176	help
	177	This must be enabled for running on e500mc (and derivatives
	178	such as e5500/e6500), and must be disabled for running on
	179	e500v1 or e500v2.
3dfa8773	180
a0ae9c7c AB	181	config PPC_FPU
	182	bool
	183	default y if PPC64
	184
5753c082 KG	185	config FSL_EMB_PERFMON
	186	bool "Freescale Embedded Perfmon"
	187	depends on E500 \|\| PPC_83xx
	188	help
	189	This is the Performance Monitor support found on the e500 core
	190	and some e300 cores (c3 and c4). Select this only if your
	191	core supports the Embedded Performance Monitor APU
	192
a1110654 SW	193	config FSL_EMB_PERF_EVENT
	194	bool
	195	depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
	196	default y
	197
	198	config FSL_EMB_PERF_EVENT_E500
	199	bool
	200	depends on FSL_EMB_PERF_EVENT && E500
	201	default y
	202
a0ae9c7c AB	203	config 4xx
	204	bool
	205	depends on 40x \|\| 44x
	206	default y
	207
	208	config BOOKE
	209	bool
2d27cfd3	210	depends on E200 \|\| E500 \|\| 44x \|\| PPC_BOOK3E
a0ae9c7c AB	211	default y
	212
	213	config FSL_BOOKE
	214	bool
4490c06b	215	depends on (E200 \|\| E500) && PPC32
a0ae9c7c AB	216	default y
a0ae9c7c AB	217
4490c06b KG	218	# this is for common code between PPC32 & PPC64 FSL BOOKE
	219	config PPC_FSL_BOOK3E
	220	bool
	221	select FSL_EMB_PERFMON
1ece355b	222	select PPC_SMP_MUXED_IPI
a475c8ec	223	select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT \|\| PPC64
440bc685	224	select PPC_DOORBELL
4490c06b	225	default y if FSL_BOOKE
39aef685	226
a0ae9c7c AB	227	config PTE_64BIT
a0ae9c7c AB	228	bool
4ee7084e BB	229	depends on 44x \|\| E500 \|\| PPC_86xx
4ee7084e BB	230	default y if PHYS_64BIT
a0ae9c7c AB	231
a0ae9c7c AB	232	config PHYS_64BIT
4ee7084e BB	233	bool 'Large physical address support' if E500 \|\| PPC_86xx
4ee7084e BB	234	depends on (44x \|\| E500 \|\| PPC_86xx) && !PPC_83xx && !PPC_82xx
a0ae9c7c AB	235	---help---
a0ae9c7c AB	236	This option enables kernel support for larger than 32-bit physical
4ee7084e BB	237	addresses. This feature may not be available on all cores.
	238
	239	If you have more than 3.5GB of RAM or so, you also need to enable
	240	SWIOTLB under Kernel Options for this to work. The actual number
	241	is platform-dependent.
a0ae9c7c AB	242
	243	If in doubt, say N here.
	244
	245	config ALTIVEC
	246	bool "AltiVec Support"
cd66cc2e	247	depends on 6xx \|\| POWER4 \|\| (PPC_E500MC && PPC64)
a0ae9c7c AB	248	---help---
	249	This option enables kernel support for the Altivec extensions to the
	250	PowerPC processor. The kernel currently supports saving and restoring
	251	altivec registers, and turning on the 'altivec enable' bit so user
	252	processes can execute altivec instructions.
	253
	254	This option is only usefully if you have a processor that supports
	255	altivec (G4, otherwise known as 74xx series), but does not have
	256	any affect on a non-altivec cpu (it does, however add code to the
	257	kernel).
	258
	259	If in doubt, say Y here.
	260
96d5b52c MN	261	config VSX
	262	bool "VSX Support"
	263	depends on POWER4 && ALTIVEC && PPC_FPU
	264	---help---
	265
	266	This option enables kernel support for the Vector Scaler extensions
	267	to the PowerPC processor. The kernel currently supports saving and
	268	restoring VSX registers, and turning on the 'VSX enable' bit so user
	269	processes can execute VSX instructions.
	270
	271	This option is only useful if you have a processor that supports
	272	VSX (P7 and above), but does not have any affect on a non-VSX
	273	CPUs (it does, however add code to the kernel).
	274
	275	If in doubt, say Y here.
	276
851d2e2f THFL	277	config PPC_ICSWX
851d2e2f THFL	278	bool "Support for PowerPC icswx coprocessor instruction"
fb5a5157	279	depends on POWER4
851d2e2f THFL	280	default n
	281	---help---
	282
	283	This option enables kernel support for the PowerPC Initiate
	284	Coprocessor Store Word (icswx) coprocessor instruction on POWER7
	285	or newer processors.
	286
	287	This option is only useful if you have a processor that supports
	288	the icswx coprocessor instruction. It does not have any effect
	289	on processors without the icswx coprocessor instruction.
	290
	291	This option slightly increases kernel memory usage.
	292
	293	If in doubt, say N here.
	294
9d670280 JX	295	config PPC_ICSWX_PID
	296	bool "icswx requires direct PID management"
	297	depends on PPC_ICSWX && POWER4
	298	default y
	299	---help---
c3dcf53a	300	The PID register in server is used explicitly for ICSWX. In
6b2aac42	301	embedded systems PID management is done by the system.
9d670280	302
c3dcf53a JX	303	config PPC_ICSWX_USE_SIGILL
	304	bool "Should a bad CT cause a SIGILL?"
	305	depends on PPC_ICSWX
	306	default n
	307	---help---
	308	Should a bad CT used for "non-record form ICSWX" cause an
6b2aac42	309	illegal instruction signal or should it be silent as
c3dcf53a JX	310	architected.
	311
	312	If in doubt, say N here.
	313
a0ae9c7c AB	314	config SPE
a0ae9c7c AB	315	bool "SPE Support"
3dfa8773	316	depends on E200 \|\| (E500 && !PPC_E500MC)
a0ae9c7c AB	317	default y
	318	---help---
	319	This option enables kernel support for the Signal Processing
	320	Extensions (SPE) to the PowerPC processor. The kernel currently
	321	supports saving and restoring SPE registers, and turning on the
	322	'spe enable' bit so user processes can execute SPE instructions.
	323
	324	This option is only useful if you have a processor that supports
	325	SPE (e500, otherwise known as 85xx series), but does not have any
	326	effect on a non-spe cpu (it does, however add code to the kernel).
	327
	328	If in doubt, say Y here.
	329
	330	config PPC_STD_MMU
5b7c3c91 BH	331	def_bool y
5b7c3c91 BH	332	depends on PPC_BOOK3S
a0ae9c7c AB	333
	334	config PPC_STD_MMU_32
	335	def_bool y
	336	depends on PPC_STD_MMU && PPC32
	337
5e696617 BH	338	config PPC_STD_MMU_64
	339	def_bool y
	340	depends on PPC_STD_MMU && PPC64
	341
	342	config PPC_MMU_NOHASH
	343	def_bool y
	344	depends on !PPC_STD_MMU
	345
70fe3af8 KG	346	config PPC_BOOK3E_MMU
70fe3af8 KG	347	def_bool y
2d27cfd3	348	depends on FSL_BOOKE \|\| PPC_BOOK3E
70fe3af8	349
a0ae9c7c AB	350	config PPC_MM_SLICES
a0ae9c7c AB	351	bool
a475c8ec	352	default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) \|\| (PPC_STD_MMU_64 && PPC_64K_PAGES)
a0ae9c7c AB	353	default n
a0ae9c7c AB	354
105988c0 PM	355	config PPC_HAVE_PMU_SUPPORT
	356	bool
	357
	358	config PPC_PERF_CTRS
	359	def_bool y
cdd6c482	360	depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
105988c0	361	help
cdd6c482	362	This enables the powerpc-specific perf_event back-end.
105988c0	363
a0ae9c7c	364	config SMP
e7f75ad0	365	depends on PPC_BOOK3S \|\| PPC_BOOK3E \|\| FSL_BOOKE \|\| PPC_47x
a0ae9c7c AB	366	bool "Symmetric multi-processing support"
	367	---help---
	368	This enables support for systems with more than one CPU. If you have
	369	a system with only one CPU, say N. If you have a system with more
	370	than one CPU, say Y. Note that the kernel does not currently
	371	support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
	372	since they have inadequate hardware support for multiprocessor
	373	operation.
	374
	375	If you say N here, the kernel will run on single and multiprocessor
	376	machines, but will use only one CPU of a multiprocessor machine. If
	377	you say Y here, the kernel will run on single-processor machines.
	378	On a single-processor machine, the kernel will run faster if you say
	379	N here.
	380
	381	If you don't know what to do here, say N.
	382
	383	config NR_CPUS
2d8ae638 MN	384	int "Maximum number of CPUs (2-8192)"
2d8ae638 MN	385	range 2 8192
a0ae9c7c AB	386	depends on SMP
	387	default "32" if PPC64
	388	default "4"
	389
	390	config NOT_COHERENT_CACHE
	391	bool
b91a143b	392	depends on 4xx \|\| 8xx \|\| E200 \|\| PPC_MPC512x \|\| GAMECUBE_COMMON
e7f75ad0	393	default n if PPC_47x
a0ae9c7c AB	394	default y
a0ae9c7c AB	395
f8eb77d6	396	config CHECK_CACHE_COHERENCY
a0ae9c7c AB	397	bool
a0ae9c7c AB	398
440bc685 IM	399	config PPC_DOORBELL
	400	bool
	401	default n
	402
a0ae9c7c	403	endmenu
7c105b63	404
962bc221 AB	405	choice
	406	prompt "Endianness selection"
	407	default CPU_BIG_ENDIAN
7c105b63 AB	408	help
	409	This option selects whether a big endian or little endian kernel will
	410	be built.
	411
962bc221 AB	412	config CPU_BIG_ENDIAN
	413	bool "Build big endian kernel"
	414	help
	415	Build a big endian kernel.
	416
	417	If unsure, select this option.
	418
	419	config CPU_LITTLE_ENDIAN
	420	bool "Build little endian kernel"
147c0516	421	select PPC64_BOOT_WRAPPER
962bc221 AB	422	help
	423	Build a little endian kernel.
	424
7c105b63 AB	425	Note that if cross compiling a little endian kernel,
	426	CROSS_COMPILE must point to a toolchain capable of targeting
	427	little endian powerpc.
962bc221 AB	428
962bc221 AB	429	endchoice
147c0516 CLG	430
	431	config PPC64_BOOT_WRAPPER
	432	def_bool n
	433	depends on CPU_LITTLE_ENDIAN