[deliverable/linux.git] / arch / powerpc / platforms / cell / cbe_cpufreq.c

/*
 * cpufreq driver for the cell processor
 *
 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
 *
 * Author: Christian Krafft <krafft@de.ibm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/cpufreq.h>
#include <linux/timer.h>

#include <asm/hw_irq.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/processor.h>
#include <asm/prom.h>
#include <asm/time.h>
#include <asm/pmi.h>
#include <asm/of_platform.h>

#include "cbe_regs.h"

static DEFINE_MUTEX(cbe_switch_mutex);


/* the CBE supports an 8 step frequency scaling */
static struct cpufreq_frequency_table cbe_freqs[] = {
	{1,	0},
	{2,	0},
	{3,	0},
	{4,	0},
	{5,	0},
	{6,	0},
	{8,	0},
	{10,	0},
	{0,	CPUFREQ_TABLE_END},
};

/* to write to MIC register */
static u64 MIC_Slow_Fast_Timer_table[] = {
	[0 ... 7] = 0x007fc00000000000ull,
};

/* more values for the MIC */
static u64 MIC_Slow_Next_Timer_table[] = {
	0x0000240000000000ull,
	0x0000268000000000ull,
	0x000029C000000000ull,
	0x00002D0000000000ull,
	0x0000300000000000ull,
	0x0000334000000000ull,
	0x000039C000000000ull,
	0x00003FC000000000ull,
};

static unsigned int pmi_frequency_limit = 0;
/*
 * hardware specific functions
 */

static struct of_device *pmi_dev;

#ifdef CONFIG_PPC_PMI
static int set_pmode_pmi(int cpu, unsigned int pmode)
{
	int ret;
	pmi_message_t pmi_msg;
#ifdef DEBUG
	u64 time;
#endif

	pmi_msg.type = PMI_TYPE_FREQ_CHANGE;
	pmi_msg.data1 =	cbe_cpu_to_node(cpu);
	pmi_msg.data2 = pmode;

#ifdef DEBUG
	time = (u64) get_cycles();
#endif

	pmi_send_message(pmi_dev, pmi_msg);
	ret = pmi_msg.data2;

	pr_debug("PMI returned slow mode %d\n", ret);

#ifdef DEBUG
	time = (u64) get_cycles() - time; /* actual cycles (not cpu cycles!) */
	time = 1000000000 * time / CLOCK_TICK_RATE; /* time in ns (10^-9) */
	pr_debug("had to wait %lu ns for a transition\n", time);
#endif
	return ret;
}
#endif

static int get_pmode(int cpu)
{
	int ret;
	struct cbe_pmd_regs __iomem *pmd_regs;

	pmd_regs = cbe_get_cpu_pmd_regs(cpu);
	ret = in_be64(&pmd_regs->pmsr) & 0x07;

	return ret;
}

static int set_pmode_reg(int cpu, unsigned int pmode)
{
	struct cbe_pmd_regs __iomem *pmd_regs;
	struct cbe_mic_tm_regs __iomem *mic_tm_regs;
	u64 flags;
	u64 value;

	local_irq_save(flags);

	mic_tm_regs = cbe_get_cpu_mic_tm_regs(cpu);
	pmd_regs = cbe_get_cpu_pmd_regs(cpu);

	pr_debug("pm register is mapped at %p\n", &pmd_regs->pmcr);
	pr_debug("mic register is mapped at %p\n", &mic_tm_regs->slow_fast_timer_0);

	out_be64(&mic_tm_regs->slow_fast_timer_0, MIC_Slow_Fast_Timer_table[pmode]);
	out_be64(&mic_tm_regs->slow_fast_timer_1, MIC_Slow_Fast_Timer_table[pmode]);

	out_be64(&mic_tm_regs->slow_next_timer_0, MIC_Slow_Next_Timer_table[pmode]);
	out_be64(&mic_tm_regs->slow_next_timer_1, MIC_Slow_Next_Timer_table[pmode]);

	value = in_be64(&pmd_regs->pmcr);
	/* set bits to zero */
	value &= 0xFFFFFFFFFFFFFFF8ull;
	/* set bits to next pmode */
	value |= pmode;

	out_be64(&pmd_regs->pmcr, value);

	/* wait until new pmode appears in status register */
	value = in_be64(&pmd_regs->pmsr) & 0x07;
	while(value != pmode) {
		cpu_relax();
		value = in_be64(&pmd_regs->pmsr) & 0x07;
	}

	local_irq_restore(flags);

	return 0;
}

static int set_pmode(int cpu, unsigned int slow_mode) {
#ifdef CONFIG_PPC_PMI
	if (pmi_dev)
		return set_pmode_pmi(cpu, slow_mode);
	else
#endif
		return set_pmode_reg(cpu, slow_mode);
}

static void cbe_cpufreq_handle_pmi(struct of_device *dev, pmi_message_t pmi_msg)
{
	u8 cpu;
	u8 cbe_pmode_new;

	BUG_ON(pmi_msg.type != PMI_TYPE_FREQ_CHANGE);

	cpu = cbe_node_to_cpu(pmi_msg.data1);
	cbe_pmode_new = pmi_msg.data2;

	pmi_frequency_limit = cbe_freqs[cbe_pmode_new].frequency;

	pr_debug("cbe_handle_pmi: max freq=%d\n", pmi_frequency_limit);
}

static int pmi_notifier(struct notifier_block *nb,
				       unsigned long event, void *data)
{
	struct cpufreq_policy *policy = data;

	if (event != CPUFREQ_INCOMPATIBLE)
		return 0;

	cpufreq_verify_within_limits(policy, 0, pmi_frequency_limit);
	return 0;
}

static struct notifier_block pmi_notifier_block = {
	.notifier_call = pmi_notifier,
};

static struct pmi_handler cbe_pmi_handler = {
	.type			= PMI_TYPE_FREQ_CHANGE,
	.handle_pmi_message	= cbe_cpufreq_handle_pmi,
};


/*
 * cpufreq functions
 */

static int cbe_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
	const u32 *max_freqp;
	u32 max_freq;
	int i, cur_pmode;
	struct device_node *cpu;

	cpu = of_get_cpu_node(policy->cpu, NULL);

	if (!cpu)
		return -ENODEV;

	pr_debug("init cpufreq on CPU %d\n", policy->cpu);

	max_freqp = of_get_property(cpu, "clock-frequency", NULL);

	if (!max_freqp)
		return -EINVAL;

	/* we need the freq in kHz */
	max_freq = *max_freqp / 1000;

	pr_debug("max clock-frequency is at %u kHz\n", max_freq);
	pr_debug("initializing frequency table\n");

	/* initialize frequency table */
	for (i=0; cbe_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
		cbe_freqs[i].frequency = max_freq / cbe_freqs[i].index;
		pr_debug("%d: %d\n", i, cbe_freqs[i].frequency);
	}

	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
	/* if DEBUG is enabled set_pmode() measures the correct latency of a transition */
	policy->cpuinfo.transition_latency = 25000;

	cur_pmode = get_pmode(policy->cpu);
	pr_debug("current pmode is at %d\n",cur_pmode);

	policy->cur = cbe_freqs[cur_pmode].frequency;

#ifdef CONFIG_SMP
	policy->cpus = cpu_sibling_map[policy->cpu];
#endif

	cpufreq_frequency_table_get_attr(cbe_freqs, policy->cpu);

	if (pmi_dev) {
		/* frequency might get limited later, initialize limit with max_freq */
		pmi_frequency_limit = max_freq;
		cpufreq_register_notifier(&pmi_notifier_block, CPUFREQ_POLICY_NOTIFIER);
	}

	/* this ensures that policy->cpuinfo_min and policy->cpuinfo_max are set correctly */
	return cpufreq_frequency_table_cpuinfo(policy, cbe_freqs);
}

static int cbe_cpufreq_cpu_exit(struct cpufreq_policy *policy)
{
	if (pmi_dev)
		cpufreq_unregister_notifier(&pmi_notifier_block, CPUFREQ_POLICY_NOTIFIER);

	cpufreq_frequency_table_put_attr(policy->cpu);
	return 0;
}

static int cbe_cpufreq_verify(struct cpufreq_policy *policy)
{
	return cpufreq_frequency_table_verify(policy, cbe_freqs);
}


static int cbe_cpufreq_target(struct cpufreq_policy *policy, unsigned int target_freq,
			    unsigned int relation)
{
	int rc;
	struct cpufreq_freqs freqs;
	int cbe_pmode_new;

	cpufreq_frequency_table_target(policy,
				       cbe_freqs,
				       target_freq,
				       relation,
				       &cbe_pmode_new);

	freqs.old = policy->cur;
	freqs.new = cbe_freqs[cbe_pmode_new].frequency;
	freqs.cpu = policy->cpu;

	mutex_lock(&cbe_switch_mutex);
	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);

	pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
		 policy->cpu,
		 cbe_freqs[cbe_pmode_new].frequency,
		 cbe_freqs[cbe_pmode_new].index);

	rc = set_pmode(policy->cpu, cbe_pmode_new);
	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	mutex_unlock(&cbe_switch_mutex);

	return rc;
}

static struct cpufreq_driver cbe_cpufreq_driver = {
	.verify		= cbe_cpufreq_verify,
	.target		= cbe_cpufreq_target,
	.init		= cbe_cpufreq_cpu_init,
	.exit		= cbe_cpufreq_cpu_exit,
	.name		= "cbe-cpufreq",
	.owner		= THIS_MODULE,
	.flags		= CPUFREQ_CONST_LOOPS,
};

/*
 * module init and destoy
 */

static int __init cbe_cpufreq_init(void)
{
#ifdef CONFIG_PPC_PMI
	struct device_node *np;
#endif
	if (!machine_is(cell))
		return -ENODEV;
#ifdef CONFIG_PPC_PMI
	np = of_find_node_by_type(NULL, "ibm,pmi");

	pmi_dev = of_find_device_by_node(np);

	if (pmi_dev)
		pmi_register_handler(pmi_dev, &cbe_pmi_handler);
#endif
	return cpufreq_register_driver(&cbe_cpufreq_driver);
}

static void __exit cbe_cpufreq_exit(void)
{
#ifdef CONFIG_PPC_PMI
	if (pmi_dev)
		pmi_unregister_handler(pmi_dev, &cbe_pmi_handler);
#endif
	cpufreq_unregister_driver(&cbe_cpufreq_driver);
}

module_init(cbe_cpufreq_init);
module_exit(cbe_cpufreq_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Christian Krafft <krafft@de.ibm.com>");
Commit	Line	Data
36ca4ba4 CK	1	/*
	2	* cpufreq driver for the cell processor
	3	*
	4	* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
	5	*
	6	* Author: Christian Krafft <krafft@de.ibm.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2, or (at your option)
	11	* any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	21	*/
	22
	23	#include <linux/cpufreq.h>
	24	#include <linux/timer.h>
	25
	26	#include <asm/hw_irq.h>
	27	#include <asm/io.h>
4bd4aa19	28	#include <asm/machdep.h>
36ca4ba4 CK	29	#include <asm/processor.h>
	30	#include <asm/prom.h>
	31	#include <asm/time.h>
5050063c CK	32	#include <asm/pmi.h>
5050063c CK	33	#include <asm/of_platform.h>
36ca4ba4 CK	34
	35	#include "cbe_regs.h"
	36
	37	static DEFINE_MUTEX(cbe_switch_mutex);
	38
	39
	40	/* the CBE supports an 8 step frequency scaling */
	41	static struct cpufreq_frequency_table cbe_freqs[] = {
	42	{1, 0},
	43	{2, 0},
	44	{3, 0},
	45	{4, 0},
	46	{5, 0},
	47	{6, 0},
	48	{8, 0},
	49	{10, 0},
	50	{0, CPUFREQ_TABLE_END},
	51	};
	52
	53	/* to write to MIC register */
	54	static u64 MIC_Slow_Fast_Timer_table[] = {
	55	[0 ... 7] = 0x007fc00000000000ull,
	56	};
	57
	58	/* more values for the MIC */
	59	static u64 MIC_Slow_Next_Timer_table[] = {
	60	0x0000240000000000ull,
	61	0x0000268000000000ull,
	62	0x000029C000000000ull,
	63	0x00002D0000000000ull,
	64	0x0000300000000000ull,
	65	0x0000334000000000ull,
	66	0x000039C000000000ull,
	67	0x00003FC000000000ull,
	68	};
	69
1552cb92	70	static unsigned int pmi_frequency_limit = 0;
36ca4ba4 CK	71	/*
	72	* hardware specific functions
	73	*/
	74
5050063c CK	75	static struct of_device *pmi_dev;
5050063c CK	76
ee5d1b7f	77	#ifdef CONFIG_PPC_PMI
5050063c CK	78	static int set_pmode_pmi(int cpu, unsigned int pmode)
	79	{
	80	int ret;
	81	pmi_message_t pmi_msg;
	82	#ifdef DEBUG
	83	u64 time;
	84	#endif
	85
	86	pmi_msg.type = PMI_TYPE_FREQ_CHANGE;
	87	pmi_msg.data1 = cbe_cpu_to_node(cpu);
	88	pmi_msg.data2 = pmode;
	89
	90	#ifdef DEBUG
	91	time = (u64) get_cycles();
	92	#endif
	93
	94	pmi_send_message(pmi_dev, pmi_msg);
	95	ret = pmi_msg.data2;
	96
	97	pr_debug("PMI returned slow mode %d\n", ret);
	98
	99	#ifdef DEBUG
	100	time = (u64) get_cycles() - time; /* actual cycles (not cpu cycles!) */
	101	time = 1000000000 * time / CLOCK_TICK_RATE; /* time in ns (10^-9) */
	102	pr_debug("had to wait %lu ns for a transition\n", time);
	103	#endif
	104	return ret;
	105	}
ee5d1b7f	106	#endif
5050063c	107
36ca4ba4 CK	108	static int get_pmode(int cpu)
	109	{
	110	int ret;
	111	struct cbe_pmd_regs __iomem *pmd_regs;
	112
	113	pmd_regs = cbe_get_cpu_pmd_regs(cpu);
	114	ret = in_be64(&pmd_regs->pmsr) & 0x07;
	115
	116	return ret;
	117	}
	118
5050063c	119	static int set_pmode_reg(int cpu, unsigned int pmode)
36ca4ba4 CK	120	{
	121	struct cbe_pmd_regs __iomem *pmd_regs;
	122	struct cbe_mic_tm_regs __iomem *mic_tm_regs;
	123	u64 flags;
	124	u64 value;
	125
	126	local_irq_save(flags);
	127
	128	mic_tm_regs = cbe_get_cpu_mic_tm_regs(cpu);
	129	pmd_regs = cbe_get_cpu_pmd_regs(cpu);
	130
	131	pr_debug("pm register is mapped at %p\n", &pmd_regs->pmcr);
	132	pr_debug("mic register is mapped at %p\n", &mic_tm_regs->slow_fast_timer_0);
	133
	134	out_be64(&mic_tm_regs->slow_fast_timer_0, MIC_Slow_Fast_Timer_table[pmode]);
	135	out_be64(&mic_tm_regs->slow_fast_timer_1, MIC_Slow_Fast_Timer_table[pmode]);
	136
	137	out_be64(&mic_tm_regs->slow_next_timer_0, MIC_Slow_Next_Timer_table[pmode]);
	138	out_be64(&mic_tm_regs->slow_next_timer_1, MIC_Slow_Next_Timer_table[pmode]);
	139
	140	value = in_be64(&pmd_regs->pmcr);
	141	/* set bits to zero */
	142	value &= 0xFFFFFFFFFFFFFFF8ull;
	143	/* set bits to next pmode */
	144	value \|= pmode;
	145
	146	out_be64(&pmd_regs->pmcr, value);
	147
	148	/* wait until new pmode appears in status register */
	149	value = in_be64(&pmd_regs->pmsr) & 0x07;
	150	while(value != pmode) {
	151	cpu_relax();
	152	value = in_be64(&pmd_regs->pmsr) & 0x07;
	153	}
	154
	155	local_irq_restore(flags);
	156
	157	return 0;
	158	}
	159
5050063c	160	static int set_pmode(int cpu, unsigned int slow_mode) {
ee5d1b7f	161	#ifdef CONFIG_PPC_PMI
4bd4aa19	162	if (pmi_dev)
5050063c CK	163	return set_pmode_pmi(cpu, slow_mode);
5050063c CK	164	else
ee5d1b7f	165	#endif
5050063c CK	166	return set_pmode_reg(cpu, slow_mode);
	167	}
	168
	169	static void cbe_cpufreq_handle_pmi(struct of_device *dev, pmi_message_t pmi_msg)
	170	{
5050063c CK	171	u8 cpu;
	172	u8 cbe_pmode_new;
	173
4bd4aa19	174	BUG_ON(pmi_msg.type != PMI_TYPE_FREQ_CHANGE);
5050063c CK	175
	176	cpu = cbe_node_to_cpu(pmi_msg.data1);
	177	cbe_pmode_new = pmi_msg.data2;
	178
1552cb92	179	pmi_frequency_limit = cbe_freqs[cbe_pmode_new].frequency;
5050063c	180
1552cb92 TR	181	pr_debug("cbe_handle_pmi: max freq=%d\n", pmi_frequency_limit);
	182	}
	183
	184	static int pmi_notifier(struct notifier_block *nb,
	185	unsigned long event, void *data)
	186	{
	187	struct cpufreq_policy *policy = data;
5050063c	188
1552cb92 TR	189	if (event != CPUFREQ_INCOMPATIBLE)
	190	return 0;
	191
	192	cpufreq_verify_within_limits(policy, 0, pmi_frequency_limit);
	193	return 0;
5050063c CK	194	}
5050063c CK	195
1552cb92 TR	196	static struct notifier_block pmi_notifier_block = {
	197	.notifier_call = pmi_notifier,
	198	};
	199
5050063c CK	200	static struct pmi_handler cbe_pmi_handler = {
	201	.type = PMI_TYPE_FREQ_CHANGE,
	202	.handle_pmi_message = cbe_cpufreq_handle_pmi,
	203	};
	204
	205
36ca4ba4 CK	206	/*
	207	* cpufreq functions
	208	*/
	209
4bd4aa19	210	static int cbe_cpufreq_cpu_init(struct cpufreq_policy *policy)
36ca4ba4	211	{
9c1a2bae SR	212	const u32 *max_freqp;
9c1a2bae SR	213	u32 max_freq;
36ca4ba4 CK	214	int i, cur_pmode;
	215	struct device_node *cpu;
	216
	217	cpu = of_get_cpu_node(policy->cpu, NULL);
	218
4bd4aa19	219	if (!cpu)
36ca4ba4 CK	220	return -ENODEV;
	221
	222	pr_debug("init cpufreq on CPU %d\n", policy->cpu);
	223
9c1a2bae	224	max_freqp = of_get_property(cpu, "clock-frequency", NULL);
36ca4ba4	225
9c1a2bae	226	if (!max_freqp)
36ca4ba4 CK	227	return -EINVAL;
36ca4ba4 CK	228
4bd4aa19	229	/* we need the freq in kHz */
9c1a2bae	230	max_freq = *max_freqp / 1000;
36ca4ba4	231
9c1a2bae	232	pr_debug("max clock-frequency is at %u kHz\n", max_freq);
36ca4ba4 CK	233	pr_debug("initializing frequency table\n");
36ca4ba4 CK	234
4bd4aa19	235	/* initialize frequency table */
36ca4ba4	236	for (i=0; cbe_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
9c1a2bae	237	cbe_freqs[i].frequency = max_freq / cbe_freqs[i].index;
36ca4ba4 CK	238	pr_debug("%d: %d\n", i, cbe_freqs[i].frequency);
	239	}
	240
	241	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
	242	/* if DEBUG is enabled set_pmode() measures the correct latency of a transition */
	243	policy->cpuinfo.transition_latency = 25000;
	244
	245	cur_pmode = get_pmode(policy->cpu);
	246	pr_debug("current pmode is at %d\n",cur_pmode);
	247
	248	policy->cur = cbe_freqs[cur_pmode].frequency;
	249
	250	#ifdef CONFIG_SMP
	251	policy->cpus = cpu_sibling_map[policy->cpu];
	252	#endif
	253
4bd4aa19	254	cpufreq_frequency_table_get_attr(cbe_freqs, policy->cpu);
36ca4ba4	255
1552cb92 TR	256	if (pmi_dev) {
	257	/* frequency might get limited later, initialize limit with max_freq */
	258	pmi_frequency_limit = max_freq;
	259	cpufreq_register_notifier(&pmi_notifier_block, CPUFREQ_POLICY_NOTIFIER);
	260	}
	261
36ca4ba4	262	/* this ensures that policy->cpuinfo_min and policy->cpuinfo_max are set correctly */
4bd4aa19	263	return cpufreq_frequency_table_cpuinfo(policy, cbe_freqs);
36ca4ba4 CK	264	}
	265
	266	static int cbe_cpufreq_cpu_exit(struct cpufreq_policy *policy)
	267	{
1552cb92 TR	268	if (pmi_dev)
	269	cpufreq_unregister_notifier(&pmi_notifier_block, CPUFREQ_POLICY_NOTIFIER);
	270
36ca4ba4 CK	271	cpufreq_frequency_table_put_attr(policy->cpu);
	272	return 0;
	273	}
	274
	275	static int cbe_cpufreq_verify(struct cpufreq_policy *policy)
	276	{
	277	return cpufreq_frequency_table_verify(policy, cbe_freqs);
	278	}
	279
	280
	281	static int cbe_cpufreq_target(struct cpufreq_policy *policy, unsigned int target_freq,
	282	unsigned int relation)
	283	{
	284	int rc;
	285	struct cpufreq_freqs freqs;
	286	int cbe_pmode_new;
	287
	288	cpufreq_frequency_table_target(policy,
	289	cbe_freqs,
	290	target_freq,
	291	relation,
	292	&cbe_pmode_new);
	293
	294	freqs.old = policy->cur;
	295	freqs.new = cbe_freqs[cbe_pmode_new].frequency;
	296	freqs.cpu = policy->cpu;
	297
4bd4aa19	298	mutex_lock(&cbe_switch_mutex);
36ca4ba4 CK	299	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
	300
	301	pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
	302	policy->cpu,
	303	cbe_freqs[cbe_pmode_new].frequency,
	304	cbe_freqs[cbe_pmode_new].index);
	305
	306	rc = set_pmode(policy->cpu, cbe_pmode_new);
	307	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	308	mutex_unlock(&cbe_switch_mutex);
	309
	310	return rc;
	311	}
	312
	313	static struct cpufreq_driver cbe_cpufreq_driver = {
	314	.verify = cbe_cpufreq_verify,
	315	.target = cbe_cpufreq_target,
	316	.init = cbe_cpufreq_cpu_init,
	317	.exit = cbe_cpufreq_cpu_exit,
	318	.name = "cbe-cpufreq",
	319	.owner = THIS_MODULE,
	320	.flags = CPUFREQ_CONST_LOOPS,
	321	};
	322
	323	/*
	324	* module init and destoy
	325	*/
	326
	327	static int __init cbe_cpufreq_init(void)
	328	{
ee5d1b7f	329	#ifdef CONFIG_PPC_PMI
5050063c	330	struct device_node *np;
ee5d1b7f	331	#endif
4bd4aa19 OJ	332	if (!machine_is(cell))
4bd4aa19 OJ	333	return -ENODEV;
ee5d1b7f	334	#ifdef CONFIG_PPC_PMI
5050063c CK	335	np = of_find_node_by_type(NULL, "ibm,pmi");
	336
	337	pmi_dev = of_find_device_by_node(np);
	338
	339	if (pmi_dev)
	340	pmi_register_handler(pmi_dev, &cbe_pmi_handler);
ee5d1b7f	341	#endif
36ca4ba4 CK	342	return cpufreq_register_driver(&cbe_cpufreq_driver);
	343	}
	344
	345	static void __exit cbe_cpufreq_exit(void)
	346	{
ee5d1b7f	347	#ifdef CONFIG_PPC_PMI
4bd4aa19	348	if (pmi_dev)
5050063c	349	pmi_unregister_handler(pmi_dev, &cbe_pmi_handler);
ee5d1b7f	350	#endif
36ca4ba4 CK	351	cpufreq_unregister_driver(&cbe_cpufreq_driver);
	352	}
	353
	354	module_init(cbe_cpufreq_init);
	355	module_exit(cbe_cpufreq_exit);
	356
	357	MODULE_LICENSE("GPL");
	358	MODULE_AUTHOR("Christian Krafft <krafft@de.ibm.com>");