powerpc: Cleanup from l64 to ll64 change: arch code
[deliverable/linux.git] / arch / powerpc / platforms / cell / spufs / fault.c
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1/*
2 * Low-level SPU handling
3 *
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
5 *
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22#include <linux/sched.h>
23#include <linux/mm.h>
24#include <linux/module.h>
25
26#include <asm/spu.h>
27#include <asm/spu_csa.h>
28
29#include "spufs.h"
30
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31/**
32 * Handle an SPE event, depending on context SPU_CREATE_EVENTS_ENABLED flag.
33 *
34 * If the context was created with events, we just set the return event.
35 * Otherwise, send an appropriate signal to the process.
36 */
37static void spufs_handle_event(struct spu_context *ctx,
c8a1e939 38 unsigned long ea, int type)
57dace23 39{
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40 siginfo_t info;
41
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42 if (ctx->flags & SPU_CREATE_EVENTS_ENABLED) {
43 ctx->event_return |= type;
44 wake_up_all(&ctx->stop_wq);
d6ad39bc 45 return;
57dace23 46 }
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47
48 memset(&info, 0, sizeof(info));
49
50 switch (type) {
51 case SPE_EVENT_INVALID_DMA:
52 info.si_signo = SIGBUS;
53 info.si_code = BUS_OBJERR;
54 break;
55 case SPE_EVENT_SPE_DATA_STORAGE:
18789fb1 56 info.si_signo = SIGSEGV;
d6ad39bc 57 info.si_addr = (void __user *)ea;
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58 info.si_code = SEGV_ACCERR;
59 ctx->ops->restart_dma(ctx);
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60 break;
61 case SPE_EVENT_DMA_ALIGNMENT:
62 info.si_signo = SIGBUS;
63 /* DAR isn't set for an alignment fault :( */
64 info.si_code = BUS_ADRALN;
65 break;
66 case SPE_EVENT_SPE_ERROR:
67 info.si_signo = SIGILL;
68 info.si_addr = (void __user *)(unsigned long)
69 ctx->ops->npc_read(ctx) - 4;
70 info.si_code = ILL_ILLOPC;
71 break;
72 }
73
74 if (info.si_signo)
75 force_sig_info(info.si_signo, &info, current);
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76}
77
d6ad39bc 78int spufs_handle_class0(struct spu_context *ctx)
57dace23 79{
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80 unsigned long stat = ctx->csa.class_0_pending & CLASS0_INTR_MASK;
81
82 if (likely(!stat))
83 return 0;
84
85 if (stat & CLASS0_DMA_ALIGNMENT_INTR)
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86 spufs_handle_event(ctx, ctx->csa.class_0_dar,
87 SPE_EVENT_DMA_ALIGNMENT);
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88
89 if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)
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90 spufs_handle_event(ctx, ctx->csa.class_0_dar,
91 SPE_EVENT_INVALID_DMA);
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92
93 if (stat & CLASS0_SPU_ERROR_INTR)
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94 spufs_handle_event(ctx, ctx->csa.class_0_dar,
95 SPE_EVENT_SPE_ERROR);
96
97 ctx->csa.class_0_pending = 0;
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98
99 return -EIO;
57dace23 100}
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101
102/*
103 * bottom half handler for page faults, we can't do this from
104 * interrupt context, since we might need to sleep.
105 * we also need to give up the mutex so we can get scheduled
106 * out while waiting for the backing store.
107 *
108 * TODO: try calling hash_page from the interrupt handler first
109 * in order to speed up the easy case.
110 */
111int spufs_handle_class1(struct spu_context *ctx)
112{
113 u64 ea, dsisr, access;
114 unsigned long flags;
e9f8a0b6 115 unsigned flt = 0;
eebead5b 116 int ret;
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117
118 /*
119 * dar and dsisr get passed from the registers
120 * to the spu_context, to this function, but not
121 * back to the spu if it gets scheduled again.
122 *
123 * if we don't handle the fault for a saved context
124 * in time, we can still expect to get the same fault
125 * the immediately after the context restore.
126 */
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127 ea = ctx->csa.class_1_dar;
128 dsisr = ctx->csa.class_1_dsisr;
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129
130 if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))
131 return 0;
132
27ec41d3 133 spuctx_switch_state(ctx, SPU_UTIL_IOWAIT);
e9f8a0b6 134
9477e455 135 pr_debug("ctx %p: ea %016llx, dsisr %016llx state %d\n", ctx, ea,
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136 dsisr, ctx->state);
137
e9f8a0b6 138 ctx->stats.hash_flt++;
27ec41d3 139 if (ctx->state == SPU_STATE_RUNNABLE)
fe2f896d 140 ctx->spu->stats.hash_flt++;
e9f8a0b6 141
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142 /* we must not hold the lock when entering spu_handle_mm_fault */
143 spu_release(ctx);
144
145 access = (_PAGE_PRESENT | _PAGE_USER);
146 access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL;
147 local_irq_save(flags);
148 ret = hash_page(ea, access, 0x300);
149 local_irq_restore(flags);
150
151 /* hashing failed, so try the actual fault handler */
152 if (ret)
e9f8a0b6 153 ret = spu_handle_mm_fault(current->mm, ea, dsisr, &flt);
57dace23 154
c9101bdb 155 /*
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156 * This is nasty: we need the state_mutex for all the bookkeeping even
157 * if the syscall was interrupted by a signal. ewww.
c9101bdb 158 */
eebead5b 159 mutex_lock(&ctx->state_mutex);
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160
161 /*
162 * Clear dsisr under ctxt lock after handling the fault, so that
163 * time slicing will not preempt the context while the page fault
164 * handler is running. Context switch code removes mappings.
165 */
f3d69e05 166 ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
d6ad39bc 167
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168 /*
169 * If we handled the fault successfully and are in runnable
170 * state, restart the DMA.
171 * In case of unhandled error report the problem to user space.
172 */
173 if (!ret) {
80422977 174 if (flt & VM_FAULT_MAJOR)
e9f8a0b6 175 ctx->stats.maj_flt++;
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176 else
177 ctx->stats.min_flt++;
fe2f896d 178 if (ctx->state == SPU_STATE_RUNNABLE) {
80422977 179 if (flt & VM_FAULT_MAJOR)
fe2f896d 180 ctx->spu->stats.maj_flt++;
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181 else
182 ctx->spu->stats.min_flt++;
fe2f896d 183 }
e9f8a0b6 184
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185 if (ctx->spu)
186 ctx->ops->restart_dma(ctx);
187 } else
d6ad39bc 188 spufs_handle_event(ctx, ea, SPE_EVENT_SPE_DATA_STORAGE);
57dace23 189
27ec41d3 190 spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);
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191 return ret;
192}
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