Commit | Line | Data |
---|---|---|
bbd0abda | 1 | /* |
bbd0abda PM |
2 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds |
3 | * | |
4 | * Adapted for PowerPC (PReP) by Gary Thomas | |
5 | * Modified by Cort Dougan (cort@cs.nmt.edu). | |
6 | * Copied and modified from arch/i386/kernel/time.c | |
7 | * | |
8 | */ | |
9 | #include <linux/errno.h> | |
10 | #include <linux/sched.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/param.h> | |
13 | #include <linux/string.h> | |
14 | #include <linux/mm.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/time.h> | |
17 | #include <linux/timex.h> | |
18 | #include <linux/kernel_stat.h> | |
19 | #include <linux/mc146818rtc.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/bcd.h> | |
575e3216 | 22 | #include <linux/ioport.h> |
bbd0abda PM |
23 | |
24 | #include <asm/io.h> | |
25 | #include <asm/nvram.h> | |
26 | #include <asm/prom.h> | |
27 | #include <asm/sections.h> | |
28 | #include <asm/time.h> | |
29 | ||
30 | extern spinlock_t rtc_lock; | |
31 | ||
32 | static int nvram_as1 = NVRAM_AS1; | |
33 | static int nvram_as0 = NVRAM_AS0; | |
34 | static int nvram_data = NVRAM_DATA; | |
35 | ||
36 | long __init chrp_time_init(void) | |
37 | { | |
38 | struct device_node *rtcs; | |
575e3216 | 39 | struct resource r; |
bbd0abda PM |
40 | int base; |
41 | ||
42 | rtcs = find_compatible_devices("rtc", "pnpPNP,b00"); | |
43 | if (rtcs == NULL) | |
44 | rtcs = find_compatible_devices("rtc", "ds1385-rtc"); | |
575e3216 | 45 | if (rtcs == NULL || of_address_to_resource(rtcs, 0, &r)) |
bbd0abda | 46 | return 0; |
575e3216 DW |
47 | |
48 | base = r.start; | |
bbd0abda PM |
49 | nvram_as1 = 0; |
50 | nvram_as0 = base; | |
51 | nvram_data = base + 1; | |
52 | ||
53 | return 0; | |
54 | } | |
55 | ||
56 | int chrp_cmos_clock_read(int addr) | |
57 | { | |
58 | if (nvram_as1 != 0) | |
59 | outb(addr>>8, nvram_as1); | |
60 | outb(addr, nvram_as0); | |
61 | return (inb(nvram_data)); | |
62 | } | |
63 | ||
64 | void chrp_cmos_clock_write(unsigned long val, int addr) | |
65 | { | |
66 | if (nvram_as1 != 0) | |
67 | outb(addr>>8, nvram_as1); | |
68 | outb(addr, nvram_as0); | |
69 | outb(val, nvram_data); | |
70 | return; | |
71 | } | |
72 | ||
73 | /* | |
74 | * Set the hardware clock. -- Cort | |
75 | */ | |
76 | int chrp_set_rtc_time(struct rtc_time *tmarg) | |
77 | { | |
78 | unsigned char save_control, save_freq_select; | |
79 | struct rtc_time tm = *tmarg; | |
80 | ||
81 | spin_lock(&rtc_lock); | |
82 | ||
83 | save_control = chrp_cmos_clock_read(RTC_CONTROL); /* tell the clock it's being set */ | |
84 | ||
85 | chrp_cmos_clock_write((save_control|RTC_SET), RTC_CONTROL); | |
86 | ||
87 | save_freq_select = chrp_cmos_clock_read(RTC_FREQ_SELECT); /* stop and reset prescaler */ | |
88 | ||
89 | chrp_cmos_clock_write((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); | |
90 | ||
bbd0abda PM |
91 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
92 | BIN_TO_BCD(tm.tm_sec); | |
93 | BIN_TO_BCD(tm.tm_min); | |
94 | BIN_TO_BCD(tm.tm_hour); | |
95 | BIN_TO_BCD(tm.tm_mon); | |
96 | BIN_TO_BCD(tm.tm_mday); | |
97 | BIN_TO_BCD(tm.tm_year); | |
98 | } | |
99 | chrp_cmos_clock_write(tm.tm_sec,RTC_SECONDS); | |
100 | chrp_cmos_clock_write(tm.tm_min,RTC_MINUTES); | |
101 | chrp_cmos_clock_write(tm.tm_hour,RTC_HOURS); | |
102 | chrp_cmos_clock_write(tm.tm_mon,RTC_MONTH); | |
103 | chrp_cmos_clock_write(tm.tm_mday,RTC_DAY_OF_MONTH); | |
104 | chrp_cmos_clock_write(tm.tm_year,RTC_YEAR); | |
105 | ||
106 | /* The following flags have to be released exactly in this order, | |
107 | * otherwise the DS12887 (popular MC146818A clone with integrated | |
108 | * battery and quartz) will not reset the oscillator and will not | |
109 | * update precisely 500 ms later. You won't find this mentioned in | |
110 | * the Dallas Semiconductor data sheets, but who believes data | |
111 | * sheets anyway ... -- Markus Kuhn | |
112 | */ | |
113 | chrp_cmos_clock_write(save_control, RTC_CONTROL); | |
114 | chrp_cmos_clock_write(save_freq_select, RTC_FREQ_SELECT); | |
115 | ||
116 | spin_unlock(&rtc_lock); | |
117 | return 0; | |
118 | } | |
119 | ||
120 | void chrp_get_rtc_time(struct rtc_time *tm) | |
121 | { | |
122 | unsigned int year, mon, day, hour, min, sec; | |
123 | int uip, i; | |
124 | ||
125 | /* The Linux interpretation of the CMOS clock register contents: | |
126 | * When the Update-In-Progress (UIP) flag goes from 1 to 0, the | |
127 | * RTC registers show the second which has precisely just started. | |
128 | * Let's hope other operating systems interpret the RTC the same way. | |
129 | */ | |
130 | ||
131 | /* Since the UIP flag is set for about 2.2 ms and the clock | |
132 | * is typically written with a precision of 1 jiffy, trying | |
133 | * to obtain a precision better than a few milliseconds is | |
134 | * an illusion. Only consistency is interesting, this also | |
135 | * allows to use the routine for /dev/rtc without a potential | |
136 | * 1 second kernel busy loop triggered by any reader of /dev/rtc. | |
137 | */ | |
138 | ||
139 | for ( i = 0; i<1000000; i++) { | |
140 | uip = chrp_cmos_clock_read(RTC_FREQ_SELECT); | |
141 | sec = chrp_cmos_clock_read(RTC_SECONDS); | |
142 | min = chrp_cmos_clock_read(RTC_MINUTES); | |
143 | hour = chrp_cmos_clock_read(RTC_HOURS); | |
144 | day = chrp_cmos_clock_read(RTC_DAY_OF_MONTH); | |
145 | mon = chrp_cmos_clock_read(RTC_MONTH); | |
146 | year = chrp_cmos_clock_read(RTC_YEAR); | |
147 | uip |= chrp_cmos_clock_read(RTC_FREQ_SELECT); | |
148 | if ((uip & RTC_UIP)==0) break; | |
149 | } | |
150 | ||
151 | if (!(chrp_cmos_clock_read(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | |
152 | BCD_TO_BIN(sec); | |
153 | BCD_TO_BIN(min); | |
154 | BCD_TO_BIN(hour); | |
155 | BCD_TO_BIN(day); | |
156 | BCD_TO_BIN(mon); | |
157 | BCD_TO_BIN(year); | |
158 | } | |
49e16b7b | 159 | if (year < 70) |
bbd0abda PM |
160 | year += 100; |
161 | tm->tm_sec = sec; | |
162 | tm->tm_min = min; | |
163 | tm->tm_hour = hour; | |
164 | tm->tm_mday = day; | |
165 | tm->tm_mon = mon; | |
166 | tm->tm_year = year; | |
167 | } |