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c5d56332 ZR |
1 | /* |
2 | * mpc7448_hpc2.c | |
3 | * | |
c4342ff9 | 4 | * Board setup routines for the Freescale mpc7448hpc2(taiga) platform |
c5d56332 ZR |
5 | * |
6 | * Author: Jacob Pan | |
7 | * jacob.pan@freescale.com | |
8 | * Author: Xianghua Xiao | |
9 | * x.xiao@freescale.com | |
10 | * Maintainer: Roy Zang <tie-fei.zang@freescale.com> | |
11 | * Add Flat Device Tree support fot mpc7448hpc2 board | |
12 | * | |
13 | * Copyright 2004-2006 Freescale Semiconductor, Inc. | |
14 | * | |
c4342ff9 ZR |
15 | * This program is free software; you can redistribute it and/or |
16 | * modify it under the terms of the GNU General Public License | |
17 | * as published by the Free Software Foundation; either version | |
18 | * 2 of the License, or (at your option) any later version. | |
c5d56332 ZR |
19 | */ |
20 | ||
c5d56332 ZR |
21 | #include <linux/stddef.h> |
22 | #include <linux/kernel.h> | |
23 | #include <linux/pci.h> | |
24 | #include <linux/kdev_t.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/irq.h> | |
c5d56332 ZR |
28 | #include <linux/seq_file.h> |
29 | #include <linux/root_dev.h> | |
30 | #include <linux/serial.h> | |
31 | #include <linux/tty.h> | |
32 | #include <linux/serial_core.h> | |
33 | ||
34 | #include <asm/system.h> | |
35 | #include <asm/time.h> | |
36 | #include <asm/machdep.h> | |
37 | #include <asm/prom.h> | |
38 | #include <asm/udbg.h> | |
39 | #include <asm/tsi108.h> | |
40 | #include <asm/pci-bridge.h> | |
41 | #include <asm/reg.h> | |
42 | #include <mm/mmu_decl.h> | |
43 | #include "mpc7448_hpc2.h" | |
44 | #include <asm/tsi108_irq.h> | |
45 | #include <asm/mpic.h> | |
46 | ||
47 | #undef DEBUG | |
48 | #ifdef DEBUG | |
49 | #define DBG(fmt...) do { printk(fmt); } while(0) | |
50 | #else | |
51 | #define DBG(fmt...) do { } while(0) | |
52 | #endif | |
53 | ||
54 | #ifndef CONFIG_PCI | |
55 | isa_io_base = MPC7448_HPC2_ISA_IO_BASE; | |
56 | isa_mem_base = MPC7448_HPC2_ISA_MEM_BASE; | |
57 | pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET; | |
58 | #endif | |
59 | ||
60 | extern int tsi108_setup_pci(struct device_node *dev); | |
61 | extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); | |
5873c9bd | 62 | extern void tsi108_pci_int_init(struct device_node *node); |
35a84c2f | 63 | extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc); |
c5d56332 ZR |
64 | |
65 | int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) | |
66 | { | |
67 | if (bus == 0 && PCI_SLOT(devfn) == 0) | |
68 | return PCIBIOS_DEVICE_NOT_FOUND; | |
69 | else | |
70 | return PCIBIOS_SUCCESSFUL; | |
71 | } | |
72 | ||
c5d56332 ZR |
73 | static void __init mpc7448_hpc2_setup_arch(void) |
74 | { | |
c5d56332 ZR |
75 | struct device_node *np; |
76 | if (ppc_md.progress) | |
77 | ppc_md.progress("mpc7448_hpc2_setup_arch():set_bridge", 0); | |
78 | ||
c5d56332 ZR |
79 | tsi108_csr_vir_base = get_vir_csrbase(); |
80 | ||
c5d56332 ZR |
81 | /* setup PCI host bridge */ |
82 | #ifdef CONFIG_PCI | |
83 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | |
84 | tsi108_setup_pci(np); | |
85 | ||
86 | ppc_md.pci_exclude_device = mpc7448_hpc2_exclude_device; | |
87 | if (ppc_md.progress) | |
88 | ppc_md.progress("tsi108: resources set", 0x100); | |
89 | #endif | |
90 | ||
91 | printk(KERN_INFO "MPC7448HPC2 (TAIGA) Platform\n"); | |
92 | printk(KERN_INFO | |
93 | "Jointly ported by Freescale and Tundra Semiconductor\n"); | |
94 | printk(KERN_INFO | |
95 | "Enabling L2 cache then enabling the HID0 prefetch engine.\n"); | |
96 | } | |
97 | ||
98 | /* | |
99 | * Interrupt setup and service. Interrrupts on the mpc7448_hpc2 come | |
100 | * from the four external INT pins, PCI interrupts are routed via | |
101 | * PCI interrupt control registers, it generates internal IRQ23 | |
102 | * | |
103 | * Interrupt routing on the Taiga Board: | |
104 | * TSI108:PB_INT[0] -> CPU0:INT# | |
105 | * TSI108:PB_INT[1] -> CPU0:MCP# | |
106 | * TSI108:PB_INT[2] -> N/C | |
107 | * TSI108:PB_INT[3] -> N/C | |
108 | */ | |
109 | static void __init mpc7448_hpc2_init_IRQ(void) | |
110 | { | |
111 | struct mpic *mpic; | |
112 | phys_addr_t mpic_paddr = 0; | |
5873c9bd ZR |
113 | struct device_node *tsi_pic; |
114 | #ifdef CONFIG_PCI | |
c4342ff9 ZR |
115 | unsigned int cascade_pci_irq; |
116 | struct device_node *tsi_pci; | |
5873c9bd ZR |
117 | struct device_node *cascade_node = NULL; |
118 | #endif | |
c5d56332 ZR |
119 | |
120 | tsi_pic = of_find_node_by_type(NULL, "open-pic"); | |
121 | if (tsi_pic) { | |
122 | unsigned int size; | |
e2eb6392 | 123 | const void *prop = of_get_property(tsi_pic, "reg", &size); |
c5d56332 ZR |
124 | mpic_paddr = of_translate_address(tsi_pic, prop); |
125 | } | |
126 | ||
127 | if (mpic_paddr == 0) { | |
128 | printk("%s: No tsi108 PIC found !\n", __FUNCTION__); | |
129 | return; | |
130 | } | |
131 | ||
5873c9bd | 132 | DBG("%s: tsi108 pic phys_addr = 0x%x\n", __FUNCTION__, |
c5d56332 ZR |
133 | (u32) mpic_paddr); |
134 | ||
c4342ff9 | 135 | mpic = mpic_alloc(tsi_pic, mpic_paddr, |
c5d56332 | 136 | MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | |
7233593b | 137 | MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108, |
5873c9bd ZR |
138 | 24, |
139 | NR_IRQS-4, /* num_sources used */ | |
c4342ff9 | 140 | "Tsi108_PIC"); |
c5d56332 | 141 | |
5873c9bd ZR |
142 | BUG_ON(mpic == NULL); |
143 | ||
144 | mpic_assign_isu(mpic, 0, mpic_paddr + 0x100); | |
145 | ||
c5d56332 | 146 | mpic_init(mpic); |
c4342ff9 | 147 | |
5873c9bd | 148 | #ifdef CONFIG_PCI |
c4342ff9 | 149 | tsi_pci = of_find_node_by_type(NULL, "pci"); |
5873c9bd | 150 | if (tsi_pci == NULL) { |
c4342ff9 ZR |
151 | printk("%s: No tsi108 pci node found !\n", __FUNCTION__); |
152 | return; | |
153 | } | |
5873c9bd ZR |
154 | cascade_node = of_find_node_by_type(NULL, "pic-router"); |
155 | if (cascade_node == NULL) { | |
156 | printk("%s: No tsi108 pci cascade node found !\n", __FUNCTION__); | |
157 | return; | |
158 | } | |
c4342ff9 ZR |
159 | |
160 | cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0); | |
5873c9bd ZR |
161 | DBG("%s: tsi108 cascade_pci_irq = 0x%x\n", __FUNCTION__, |
162 | (u32) cascade_pci_irq); | |
163 | tsi108_pci_int_init(cascade_node); | |
c4342ff9 ZR |
164 | set_irq_data(cascade_pci_irq, mpic); |
165 | set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade); | |
5873c9bd | 166 | #endif |
c5d56332 ZR |
167 | /* Configure MPIC outputs to CPU0 */ |
168 | tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); | |
c4342ff9 | 169 | of_node_put(tsi_pic); |
c5d56332 ZR |
170 | } |
171 | ||
172 | void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) | |
173 | { | |
174 | seq_printf(m, "vendor\t\t: Freescale Semiconductor\n"); | |
175 | seq_printf(m, "machine\t\t: MPC7448hpc2\n"); | |
176 | } | |
177 | ||
178 | void mpc7448_hpc2_restart(char *cmd) | |
179 | { | |
180 | local_irq_disable(); | |
181 | ||
182 | /* Set exception prefix high - to the firmware */ | |
183 | _nmask_and_or_msr(0, MSR_IP); | |
184 | ||
185 | for (;;) ; /* Spin until reset happens */ | |
186 | } | |
187 | ||
188 | void mpc7448_hpc2_power_off(void) | |
189 | { | |
190 | local_irq_disable(); | |
191 | for (;;) ; /* No way to shut power off with software */ | |
192 | } | |
193 | ||
194 | void mpc7448_hpc2_halt(void) | |
195 | { | |
196 | mpc7448_hpc2_power_off(); | |
197 | } | |
198 | ||
199 | /* | |
200 | * Called very early, device-tree isn't unflattened | |
201 | */ | |
202 | static int __init mpc7448_hpc2_probe(void) | |
203 | { | |
204 | unsigned long root = of_get_flat_dt_root(); | |
205 | ||
206 | if (!of_flat_dt_is_compatible(root, "mpc74xx")) | |
207 | return 0; | |
208 | return 1; | |
209 | } | |
210 | ||
211 | static int mpc7448_machine_check_exception(struct pt_regs *regs) | |
212 | { | |
213 | extern void tsi108_clear_pci_cfg_error(void); | |
214 | const struct exception_table_entry *entry; | |
215 | ||
216 | /* Are we prepared to handle this fault */ | |
217 | if ((entry = search_exception_tables(regs->nip)) != NULL) { | |
218 | tsi108_clear_pci_cfg_error(); | |
219 | regs->msr |= MSR_RI; | |
220 | regs->nip = entry->fixup; | |
221 | return 1; | |
222 | } | |
223 | return 0; | |
c5d56332 | 224 | } |
c4342ff9 | 225 | |
c5d56332 ZR |
226 | define_machine(mpc7448_hpc2){ |
227 | .name = "MPC7448 HPC2", | |
228 | .probe = mpc7448_hpc2_probe, | |
229 | .setup_arch = mpc7448_hpc2_setup_arch, | |
230 | .init_IRQ = mpc7448_hpc2_init_IRQ, | |
231 | .show_cpuinfo = mpc7448_hpc2_show_cpuinfo, | |
232 | .get_irq = mpic_get_irq, | |
c5d56332 ZR |
233 | .restart = mpc7448_hpc2_restart, |
234 | .calibrate_decr = generic_calibrate_decr, | |
235 | .machine_check_exception= mpc7448_machine_check_exception, | |
236 | .progress = udbg_progress, | |
237 | }; |