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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com> | |
3 | * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu> | |
4 | * | |
1da177e4 LT |
5 | * Description: |
6 | * Architecture- / platform-specific boot-time initialization code for | |
7 | * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and | |
8 | * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek | |
9 | * <dan@net4x.com>. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | */ | |
16 | ||
17 | #undef DEBUG | |
18 | ||
1da177e4 LT |
19 | #include <linux/init.h> |
20 | #include <linux/threads.h> | |
21 | #include <linux/smp.h> | |
22 | #include <linux/param.h> | |
23 | #include <linux/string.h> | |
1da177e4 LT |
24 | #include <linux/seq_file.h> |
25 | #include <linux/kdev_t.h> | |
26 | #include <linux/major.h> | |
27 | #include <linux/root_dev.h> | |
bec7c458 | 28 | #include <linux/kernel.h> |
1ad74998 TB |
29 | #include <linux/hrtimer.h> |
30 | #include <linux/tick.h> | |
1da177e4 LT |
31 | |
32 | #include <asm/processor.h> | |
33 | #include <asm/machdep.h> | |
34 | #include <asm/page.h> | |
35 | #include <asm/mmu.h> | |
36 | #include <asm/pgtable.h> | |
37 | #include <asm/mmu_context.h> | |
38 | #include <asm/cputable.h> | |
39 | #include <asm/sections.h> | |
40 | #include <asm/iommu.h> | |
aed31351 | 41 | #include <asm/firmware.h> |
49b09853 | 42 | #include <asm/system.h> |
1da177e4 | 43 | #include <asm/time.h> |
1da177e4 LT |
44 | #include <asm/paca.h> |
45 | #include <asm/cache.h> | |
0bc0ffd5 | 46 | #include <asm/abs_addr.h> |
15b17189 | 47 | #include <asm/iseries/hv_lp_config.h> |
c0a8d05c | 48 | #include <asm/iseries/hv_call_event.h> |
8021b8a7 | 49 | #include <asm/iseries/hv_call_xm.h> |
8875ccfb | 50 | #include <asm/iseries/it_lp_queue.h> |
bbc8b628 | 51 | #include <asm/iseries/mf.h> |
e45423ea | 52 | #include <asm/iseries/hv_lp_event.h> |
c43a55ff | 53 | #include <asm/iseries/lpar_map.h> |
bf6a7112 | 54 | #include <asm/udbg.h> |
7d01c880 | 55 | #include <asm/irq.h> |
1da177e4 | 56 | |
f11b7bd8 | 57 | #include "naca.h" |
c8b84976 | 58 | #include "setup.h" |
b08567cb SR |
59 | #include "irq.h" |
60 | #include "vpd_areas.h" | |
61 | #include "processor_vpd.h" | |
06a36db1 | 62 | #include "it_lp_naca.h" |
b08567cb SR |
63 | #include "main_store.h" |
64 | #include "call_sm.h" | |
0e29bb1a | 65 | #include "call_hpt.h" |
26b6d5b1 | 66 | #include "pci.h" |
c8b84976 | 67 | |
1da177e4 | 68 | #ifdef DEBUG |
bf6a7112 | 69 | #define DBG(fmt...) udbg_printf(fmt) |
1da177e4 LT |
70 | #else |
71 | #define DBG(fmt...) | |
72 | #endif | |
73 | ||
74 | /* Function Prototypes */ | |
799d6046 | 75 | static unsigned long build_iSeries_Memory_Map(void); |
143a1dec PM |
76 | static void iseries_shared_idle(void); |
77 | static void iseries_dedicated_idle(void); | |
1da177e4 | 78 | |
1da177e4 | 79 | |
1da177e4 LT |
80 | struct MemoryBlock { |
81 | unsigned long absStart; | |
82 | unsigned long absEnd; | |
83 | unsigned long logicalStart; | |
84 | unsigned long logicalEnd; | |
85 | }; | |
86 | ||
87 | /* | |
88 | * Process the main store vpd to determine where the holes in memory are | |
89 | * and return the number of physical blocks and fill in the array of | |
90 | * block data. | |
91 | */ | |
92 | static unsigned long iSeries_process_Condor_mainstore_vpd( | |
93 | struct MemoryBlock *mb_array, unsigned long max_entries) | |
94 | { | |
95 | unsigned long holeFirstChunk, holeSizeChunks; | |
96 | unsigned long numMemoryBlocks = 1; | |
97 | struct IoHriMainStoreSegment4 *msVpd = | |
98 | (struct IoHriMainStoreSegment4 *)xMsVpd; | |
99 | unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr; | |
100 | unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr; | |
101 | unsigned long holeSize = holeEnd - holeStart; | |
102 | ||
103 | printk("Mainstore_VPD: Condor\n"); | |
104 | /* | |
105 | * Determine if absolute memory has any | |
106 | * holes so that we can interpret the | |
107 | * access map we get back from the hypervisor | |
108 | * correctly. | |
109 | */ | |
110 | mb_array[0].logicalStart = 0; | |
5db9abd9 | 111 | mb_array[0].logicalEnd = 0x100000000UL; |
1da177e4 | 112 | mb_array[0].absStart = 0; |
5db9abd9 | 113 | mb_array[0].absEnd = 0x100000000UL; |
1da177e4 LT |
114 | |
115 | if (holeSize) { | |
116 | numMemoryBlocks = 2; | |
5db9abd9 | 117 | holeStart = holeStart & 0x000fffffffffffffUL; |
1da177e4 LT |
118 | holeStart = addr_to_chunk(holeStart); |
119 | holeFirstChunk = holeStart; | |
120 | holeSize = addr_to_chunk(holeSize); | |
121 | holeSizeChunks = holeSize; | |
122 | printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n", | |
123 | holeFirstChunk, holeSizeChunks ); | |
124 | mb_array[0].logicalEnd = holeFirstChunk; | |
125 | mb_array[0].absEnd = holeFirstChunk; | |
126 | mb_array[1].logicalStart = holeFirstChunk; | |
5db9abd9 | 127 | mb_array[1].logicalEnd = 0x100000000UL - holeSizeChunks; |
1da177e4 | 128 | mb_array[1].absStart = holeFirstChunk + holeSizeChunks; |
5db9abd9 | 129 | mb_array[1].absEnd = 0x100000000UL; |
1da177e4 LT |
130 | } |
131 | return numMemoryBlocks; | |
132 | } | |
133 | ||
134 | #define MaxSegmentAreas 32 | |
135 | #define MaxSegmentAdrRangeBlocks 128 | |
136 | #define MaxAreaRangeBlocks 4 | |
137 | ||
138 | static unsigned long iSeries_process_Regatta_mainstore_vpd( | |
139 | struct MemoryBlock *mb_array, unsigned long max_entries) | |
140 | { | |
141 | struct IoHriMainStoreSegment5 *msVpdP = | |
142 | (struct IoHriMainStoreSegment5 *)xMsVpd; | |
143 | unsigned long numSegmentBlocks = 0; | |
144 | u32 existsBits = msVpdP->msAreaExists; | |
145 | unsigned long area_num; | |
146 | ||
147 | printk("Mainstore_VPD: Regatta\n"); | |
148 | ||
149 | for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) { | |
150 | unsigned long numAreaBlocks; | |
151 | struct IoHriMainStoreArea4 *currentArea; | |
152 | ||
153 | if (existsBits & 0x80000000) { | |
154 | unsigned long block_num; | |
155 | ||
156 | currentArea = &msVpdP->msAreaArray[area_num]; | |
157 | numAreaBlocks = currentArea->numAdrRangeBlocks; | |
158 | printk("ms_vpd: processing area %2ld blocks=%ld", | |
159 | area_num, numAreaBlocks); | |
160 | for (block_num = 0; block_num < numAreaBlocks; | |
161 | ++block_num ) { | |
162 | /* Process an address range block */ | |
163 | struct MemoryBlock tempBlock; | |
164 | unsigned long i; | |
165 | ||
166 | tempBlock.absStart = | |
167 | (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart; | |
168 | tempBlock.absEnd = | |
169 | (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd; | |
170 | tempBlock.logicalStart = 0; | |
171 | tempBlock.logicalEnd = 0; | |
172 | printk("\n block %ld absStart=%016lx absEnd=%016lx", | |
173 | block_num, tempBlock.absStart, | |
174 | tempBlock.absEnd); | |
175 | ||
176 | for (i = 0; i < numSegmentBlocks; ++i) { | |
177 | if (mb_array[i].absStart == | |
178 | tempBlock.absStart) | |
179 | break; | |
180 | } | |
181 | if (i == numSegmentBlocks) { | |
182 | if (numSegmentBlocks == max_entries) | |
183 | panic("iSeries_process_mainstore_vpd: too many memory blocks"); | |
184 | mb_array[numSegmentBlocks] = tempBlock; | |
185 | ++numSegmentBlocks; | |
186 | } else | |
187 | printk(" (duplicate)"); | |
188 | } | |
189 | printk("\n"); | |
190 | } | |
191 | existsBits <<= 1; | |
192 | } | |
193 | /* Now sort the blocks found into ascending sequence */ | |
194 | if (numSegmentBlocks > 1) { | |
195 | unsigned long m, n; | |
196 | ||
197 | for (m = 0; m < numSegmentBlocks - 1; ++m) { | |
198 | for (n = numSegmentBlocks - 1; m < n; --n) { | |
199 | if (mb_array[n].absStart < | |
200 | mb_array[n-1].absStart) { | |
201 | struct MemoryBlock tempBlock; | |
202 | ||
203 | tempBlock = mb_array[n]; | |
204 | mb_array[n] = mb_array[n-1]; | |
205 | mb_array[n-1] = tempBlock; | |
206 | } | |
207 | } | |
208 | } | |
209 | } | |
210 | /* | |
211 | * Assign "logical" addresses to each block. These | |
212 | * addresses correspond to the hypervisor "bitmap" space. | |
213 | * Convert all addresses into units of 256K chunks. | |
214 | */ | |
215 | { | |
216 | unsigned long i, nextBitmapAddress; | |
217 | ||
218 | printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks); | |
219 | nextBitmapAddress = 0; | |
220 | for (i = 0; i < numSegmentBlocks; ++i) { | |
221 | unsigned long length = mb_array[i].absEnd - | |
222 | mb_array[i].absStart; | |
223 | ||
224 | mb_array[i].logicalStart = nextBitmapAddress; | |
225 | mb_array[i].logicalEnd = nextBitmapAddress + length; | |
226 | nextBitmapAddress += length; | |
227 | printk(" Bitmap range: %016lx - %016lx\n" | |
228 | " Absolute range: %016lx - %016lx\n", | |
229 | mb_array[i].logicalStart, | |
230 | mb_array[i].logicalEnd, | |
231 | mb_array[i].absStart, mb_array[i].absEnd); | |
232 | mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart & | |
5db9abd9 | 233 | 0x000fffffffffffffUL); |
1da177e4 | 234 | mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd & |
5db9abd9 | 235 | 0x000fffffffffffffUL); |
1da177e4 LT |
236 | mb_array[i].logicalStart = |
237 | addr_to_chunk(mb_array[i].logicalStart); | |
238 | mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd); | |
239 | } | |
240 | } | |
241 | ||
242 | return numSegmentBlocks; | |
243 | } | |
244 | ||
245 | static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array, | |
246 | unsigned long max_entries) | |
247 | { | |
248 | unsigned long i; | |
249 | unsigned long mem_blocks = 0; | |
250 | ||
251 | if (cpu_has_feature(CPU_FTR_SLB)) | |
252 | mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array, | |
253 | max_entries); | |
254 | else | |
255 | mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array, | |
256 | max_entries); | |
257 | ||
258 | printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks); | |
259 | for (i = 0; i < mem_blocks; ++i) { | |
260 | printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n" | |
261 | " abs chunks %016lx - %016lx\n", | |
262 | i, mb_array[i].logicalStart, mb_array[i].logicalEnd, | |
263 | mb_array[i].absStart, mb_array[i].absEnd); | |
264 | } | |
265 | return mem_blocks; | |
266 | } | |
267 | ||
268 | static void __init iSeries_get_cmdline(void) | |
269 | { | |
270 | char *p, *q; | |
271 | ||
272 | /* copy the command line parameter from the primary VSP */ | |
273 | HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256, | |
274 | HvLpDma_Direction_RemoteToLocal); | |
275 | ||
276 | p = cmd_line; | |
277 | q = cmd_line + 255; | |
278 | while(p < q) { | |
279 | if (!*p || *p == '\n') | |
280 | break; | |
281 | ++p; | |
282 | } | |
283 | *p = 0; | |
284 | } | |
285 | ||
286 | static void __init iSeries_init_early(void) | |
287 | { | |
1da177e4 LT |
288 | DBG(" -> iSeries_init_early()\n"); |
289 | ||
71712b45 TB |
290 | /* Snapshot the timebase, for use in later recalibration */ |
291 | iSeries_time_init_early(); | |
1da177e4 | 292 | |
1da177e4 LT |
293 | /* |
294 | * Initialize the DMA/TCE management | |
295 | */ | |
296 | iommu_init_early_iSeries(); | |
297 | ||
1da177e4 LT |
298 | /* Initialize machine-dependency vectors */ |
299 | #ifdef CONFIG_SMP | |
300 | smp_init_iSeries(); | |
301 | #endif | |
1da177e4 LT |
302 | |
303 | /* Associate Lp Event Queue 0 with processor 0 */ | |
304 | HvCallEvent_setLpEventQueueInterruptProc(0, 0); | |
305 | ||
306 | mf_init(); | |
1da177e4 | 307 | |
1da177e4 LT |
308 | DBG(" <- iSeries_init_early()\n"); |
309 | } | |
310 | ||
56e97b71 | 311 | struct mschunks_map mschunks_map = { |
34c8f696 ME |
312 | /* XXX We don't use these, but Piranha might need them. */ |
313 | .chunk_size = MSCHUNKS_CHUNK_SIZE, | |
314 | .chunk_shift = MSCHUNKS_CHUNK_SHIFT, | |
315 | .chunk_mask = MSCHUNKS_OFFSET_MASK, | |
316 | }; | |
56e97b71 | 317 | EXPORT_SYMBOL(mschunks_map); |
34c8f696 | 318 | |
5db9abd9 | 319 | static void mschunks_alloc(unsigned long num_chunks) |
34c8f696 ME |
320 | { |
321 | klimit = _ALIGN(klimit, sizeof(u32)); | |
56e97b71 | 322 | mschunks_map.mapping = (u32 *)klimit; |
34c8f696 | 323 | klimit += num_chunks * sizeof(u32); |
56e97b71 | 324 | mschunks_map.num_chunks = num_chunks; |
34c8f696 ME |
325 | } |
326 | ||
1da177e4 LT |
327 | /* |
328 | * The iSeries may have very large memories ( > 128 GB ) and a partition | |
329 | * may get memory in "chunks" that may be anywhere in the 2**52 real | |
330 | * address space. The chunks are 256K in size. To map this to the | |
331 | * memory model Linux expects, the AS/400 specific code builds a | |
332 | * translation table to translate what Linux thinks are "physical" | |
333 | * addresses to the actual real addresses. This allows us to make | |
334 | * it appear to Linux that we have contiguous memory starting at | |
335 | * physical address zero while in fact this could be far from the truth. | |
336 | * To avoid confusion, I'll let the words physical and/or real address | |
337 | * apply to the Linux addresses while I'll use "absolute address" to | |
338 | * refer to the actual hardware real address. | |
339 | * | |
340 | * build_iSeries_Memory_Map gets information from the Hypervisor and | |
341 | * looks at the Main Store VPD to determine the absolute addresses | |
342 | * of the memory that has been assigned to our partition and builds | |
343 | * a table used to translate Linux's physical addresses to these | |
344 | * absolute addresses. Absolute addresses are needed when | |
345 | * communicating with the hypervisor (e.g. to build HPT entries) | |
799d6046 PM |
346 | * |
347 | * Returns the physical memory size | |
1da177e4 LT |
348 | */ |
349 | ||
799d6046 | 350 | static unsigned long __init build_iSeries_Memory_Map(void) |
1da177e4 LT |
351 | { |
352 | u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize; | |
353 | u32 nextPhysChunk; | |
354 | u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages; | |
1da177e4 LT |
355 | u32 totalChunks,moreChunks; |
356 | u32 currChunk, thisChunk, absChunk; | |
357 | u32 currDword; | |
358 | u32 chunkBit; | |
359 | u64 map; | |
360 | struct MemoryBlock mb[32]; | |
361 | unsigned long numMemoryBlocks, curBlock; | |
362 | ||
363 | /* Chunk size on iSeries is 256K bytes */ | |
364 | totalChunks = (u32)HvLpConfig_getMsChunks(); | |
56e97b71 | 365 | mschunks_alloc(totalChunks); |
1da177e4 LT |
366 | |
367 | /* | |
368 | * Get absolute address of our load area | |
369 | * and map it to physical address 0 | |
370 | * This guarantees that the loadarea ends up at physical 0 | |
371 | * otherwise, it might not be returned by PLIC as the first | |
372 | * chunks | |
373 | */ | |
374 | ||
375 | loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr); | |
376 | loadAreaSize = itLpNaca.xLoadAreaChunks; | |
377 | ||
378 | /* | |
379 | * Only add the pages already mapped here. | |
380 | * Otherwise we might add the hpt pages | |
381 | * The rest of the pages of the load area | |
382 | * aren't in the HPT yet and can still | |
383 | * be assigned an arbitrary physical address | |
384 | */ | |
385 | if ((loadAreaSize * 64) > HvPagesToMap) | |
386 | loadAreaSize = HvPagesToMap / 64; | |
387 | ||
388 | loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1; | |
389 | ||
390 | /* | |
391 | * TODO Do we need to do something if the HPT is in the 64MB load area? | |
392 | * This would be required if the itLpNaca.xLoadAreaChunks includes | |
393 | * the HPT size | |
394 | */ | |
395 | ||
396 | printk("Mapping load area - physical addr = 0000000000000000\n" | |
397 | " absolute addr = %016lx\n", | |
398 | chunk_to_addr(loadAreaFirstChunk)); | |
399 | printk("Load area size %dK\n", loadAreaSize * 256); | |
400 | ||
401 | for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk) | |
56e97b71 | 402 | mschunks_map.mapping[nextPhysChunk] = |
1da177e4 LT |
403 | loadAreaFirstChunk + nextPhysChunk; |
404 | ||
405 | /* | |
406 | * Get absolute address of our HPT and remember it so | |
407 | * we won't map it to any physical address | |
408 | */ | |
409 | hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress()); | |
410 | hptSizePages = (u32)HvCallHpt_getHptPages(); | |
3c726f8d BH |
411 | hptSizeChunks = hptSizePages >> |
412 | (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT); | |
1da177e4 LT |
413 | hptLastChunk = hptFirstChunk + hptSizeChunks - 1; |
414 | ||
415 | printk("HPT absolute addr = %016lx, size = %dK\n", | |
416 | chunk_to_addr(hptFirstChunk), hptSizeChunks * 256); | |
417 | ||
1da177e4 LT |
418 | /* |
419 | * Determine if absolute memory has any | |
420 | * holes so that we can interpret the | |
421 | * access map we get back from the hypervisor | |
422 | * correctly. | |
423 | */ | |
424 | numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32); | |
425 | ||
426 | /* | |
427 | * Process the main store access map from the hypervisor | |
428 | * to build up our physical -> absolute translation table | |
429 | */ | |
430 | curBlock = 0; | |
431 | currChunk = 0; | |
432 | currDword = 0; | |
433 | moreChunks = totalChunks; | |
434 | ||
435 | while (moreChunks) { | |
436 | map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex, | |
437 | currDword); | |
438 | thisChunk = currChunk; | |
439 | while (map) { | |
440 | chunkBit = map >> 63; | |
441 | map <<= 1; | |
442 | if (chunkBit) { | |
443 | --moreChunks; | |
444 | while (thisChunk >= mb[curBlock].logicalEnd) { | |
445 | ++curBlock; | |
446 | if (curBlock >= numMemoryBlocks) | |
447 | panic("out of memory blocks"); | |
448 | } | |
449 | if (thisChunk < mb[curBlock].logicalStart) | |
450 | panic("memory block error"); | |
451 | ||
452 | absChunk = mb[curBlock].absStart + | |
453 | (thisChunk - mb[curBlock].logicalStart); | |
454 | if (((absChunk < hptFirstChunk) || | |
455 | (absChunk > hptLastChunk)) && | |
456 | ((absChunk < loadAreaFirstChunk) || | |
457 | (absChunk > loadAreaLastChunk))) { | |
56e97b71 ME |
458 | mschunks_map.mapping[nextPhysChunk] = |
459 | absChunk; | |
1da177e4 LT |
460 | ++nextPhysChunk; |
461 | } | |
462 | } | |
463 | ++thisChunk; | |
464 | } | |
465 | ++currDword; | |
466 | currChunk += 64; | |
467 | } | |
468 | ||
469 | /* | |
470 | * main store size (in chunks) is | |
471 | * totalChunks - hptSizeChunks | |
472 | * which should be equal to | |
473 | * nextPhysChunk | |
474 | */ | |
799d6046 | 475 | return chunk_to_addr(nextPhysChunk); |
1da177e4 LT |
476 | } |
477 | ||
1da177e4 LT |
478 | /* |
479 | * Document me. | |
480 | */ | |
481 | static void __init iSeries_setup_arch(void) | |
482 | { | |
3356bb9f | 483 | if (get_lppaca()->shared_proc) { |
9f497581 | 484 | ppc_md.idle_loop = iseries_shared_idle; |
4baaf0cf | 485 | printk(KERN_DEBUG "Using shared processor idle loop\n"); |
9f497581 ME |
486 | } else { |
487 | ppc_md.idle_loop = iseries_dedicated_idle; | |
4baaf0cf | 488 | printk(KERN_DEBUG "Using dedicated idle loop\n"); |
9f497581 ME |
489 | } |
490 | ||
1da177e4 | 491 | /* Setup the Lp Event Queue */ |
512d31d6 | 492 | setup_hvlpevent_queue(); |
1da177e4 | 493 | |
1da177e4 LT |
494 | printk("Max logical processors = %d\n", |
495 | itVpdAreas.xSlicMaxLogicalProcs); | |
496 | printk("Max physical processors = %d\n", | |
497 | itVpdAreas.xSlicMaxPhysicalProcs); | |
cb993029 SR |
498 | |
499 | iSeries_pcibios_init(); | |
1da177e4 LT |
500 | } |
501 | ||
d8699e65 | 502 | static void iSeries_show_cpuinfo(struct seq_file *m) |
1da177e4 LT |
503 | { |
504 | seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n"); | |
505 | } | |
506 | ||
1da177e4 LT |
507 | static void __init iSeries_progress(char * st, unsigned short code) |
508 | { | |
509 | printk("Progress: [%04x] - %s\n", (unsigned)code, st); | |
260de22f | 510 | mf_display_progress(code); |
1da177e4 LT |
511 | } |
512 | ||
513 | static void __init iSeries_fixup_klimit(void) | |
514 | { | |
515 | /* | |
516 | * Change klimit to take into account any ram disk | |
517 | * that may be included | |
518 | */ | |
519 | if (naca.xRamDisk) | |
520 | klimit = KERNELBASE + (u64)naca.xRamDisk + | |
3c726f8d | 521 | (naca.xRamDiskSize * HW_PAGE_SIZE); |
1da177e4 LT |
522 | } |
523 | ||
524 | static int __init iSeries_src_init(void) | |
525 | { | |
526 | /* clear the progress line */ | |
e75b1717 SR |
527 | if (firmware_has_feature(FW_FEATURE_ISERIES)) |
528 | ppc_md.progress(" ", 0xffff); | |
1da177e4 LT |
529 | return 0; |
530 | } | |
531 | ||
532 | late_initcall(iSeries_src_init); | |
533 | ||
d200903e ME |
534 | static inline void process_iSeries_events(void) |
535 | { | |
536 | asm volatile ("li 0,0x5555; sc" : : : "r0", "r3"); | |
537 | } | |
538 | ||
539 | static void yield_shared_processor(void) | |
540 | { | |
541 | unsigned long tb; | |
d200903e ME |
542 | |
543 | HvCall_setEnabledInterrupts(HvCall_MaskIPI | | |
544 | HvCall_MaskLpEvent | | |
545 | HvCall_MaskLpProd | | |
546 | HvCall_MaskTimeout); | |
547 | ||
548 | tb = get_tb(); | |
549 | /* Compute future tb value when yield should expire */ | |
550 | HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy); | |
551 | ||
d200903e ME |
552 | /* |
553 | * The decrementer stops during the yield. Force a fake decrementer | |
554 | * here and let the timer_interrupt code sort out the actual time. | |
555 | */ | |
3356bb9f | 556 | get_lppaca()->int_dword.fields.decr_int = 1; |
cb2c9b27 | 557 | ppc64_runlatch_on(); |
d200903e ME |
558 | process_iSeries_events(); |
559 | } | |
560 | ||
143a1dec | 561 | static void iseries_shared_idle(void) |
d200903e | 562 | { |
3c57bb9f | 563 | while (1) { |
b8f8c3cf | 564 | tick_nohz_stop_sched_tick(1); |
3c57bb9f AB |
565 | while (!need_resched() && !hvlpevent_is_pending()) { |
566 | local_irq_disable(); | |
567 | ppc64_runlatch_off(); | |
568 | ||
569 | /* Recheck with irqs off */ | |
570 | if (!need_resched() && !hvlpevent_is_pending()) | |
571 | yield_shared_processor(); | |
d200903e | 572 | |
3c57bb9f AB |
573 | HMT_medium(); |
574 | local_irq_enable(); | |
575 | } | |
576 | ||
577 | ppc64_runlatch_on(); | |
1ad74998 | 578 | tick_nohz_restart_sched_tick(); |
d200903e | 579 | |
3c57bb9f AB |
580 | if (hvlpevent_is_pending()) |
581 | process_iSeries_events(); | |
582 | ||
5bfb5d69 | 583 | preempt_enable_no_resched(); |
3c57bb9f | 584 | schedule(); |
5bfb5d69 | 585 | preempt_disable(); |
3c57bb9f | 586 | } |
3c57bb9f AB |
587 | } |
588 | ||
143a1dec | 589 | static void iseries_dedicated_idle(void) |
3c57bb9f | 590 | { |
64c7c8f8 | 591 | set_thread_flag(TIF_POLLING_NRFLAG); |
d200903e ME |
592 | |
593 | while (1) { | |
b8f8c3cf | 594 | tick_nohz_stop_sched_tick(1); |
64c7c8f8 | 595 | if (!need_resched()) { |
3c57bb9f AB |
596 | while (!need_resched()) { |
597 | ppc64_runlatch_off(); | |
598 | HMT_low(); | |
599 | ||
600 | if (hvlpevent_is_pending()) { | |
d200903e | 601 | HMT_medium(); |
3c57bb9f AB |
602 | ppc64_runlatch_on(); |
603 | process_iSeries_events(); | |
d200903e | 604 | } |
d200903e | 605 | } |
3c57bb9f AB |
606 | |
607 | HMT_medium(); | |
d200903e ME |
608 | } |
609 | ||
610 | ppc64_runlatch_on(); | |
1ad74998 | 611 | tick_nohz_restart_sched_tick(); |
5bfb5d69 | 612 | preempt_enable_no_resched(); |
d200903e | 613 | schedule(); |
5bfb5d69 | 614 | preempt_disable(); |
d200903e | 615 | } |
d200903e ME |
616 | } |
617 | ||
68a64357 | 618 | static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size, |
4cb3cee0 BH |
619 | unsigned long flags) |
620 | { | |
621 | return (void __iomem *)address; | |
622 | } | |
623 | ||
68a64357 | 624 | static void iseries_iounmap(volatile void __iomem *token) |
4cb3cee0 BH |
625 | { |
626 | } | |
627 | ||
e8222502 | 628 | static int __init iseries_probe(void) |
4762713a | 629 | { |
e8222502 BH |
630 | unsigned long root = of_get_flat_dt_root(); |
631 | if (!of_flat_dt_is_compatible(root, "IBM,iSeries")) | |
57cfb814 ME |
632 | return 0; |
633 | ||
7d0daae4 | 634 | hpte_init_iSeries(); |
0470466d SR |
635 | /* iSeries does not support 16M pages */ |
636 | cur_cpu_spec->cpu_features &= ~CPU_FTR_16M_PAGE; | |
7d0daae4 | 637 | |
57cfb814 | 638 | return 1; |
4762713a ME |
639 | } |
640 | ||
e8222502 | 641 | define_machine(iseries) { |
50c9bc2f BH |
642 | .name = "iSeries", |
643 | .setup_arch = iSeries_setup_arch, | |
644 | .show_cpuinfo = iSeries_show_cpuinfo, | |
645 | .init_IRQ = iSeries_init_IRQ, | |
646 | .get_irq = iSeries_get_irq, | |
647 | .init_early = iSeries_init_early, | |
648 | .pcibios_fixup = iSeries_pci_final_fixup, | |
649 | .pcibios_fixup_resources= iSeries_pcibios_fixup_resources, | |
650 | .restart = mf_reboot, | |
651 | .power_off = mf_power_off, | |
652 | .halt = mf_power_off, | |
653 | .get_boot_time = iSeries_get_boot_time, | |
654 | .set_rtc_time = iSeries_set_rtc_time, | |
655 | .get_rtc_time = iSeries_get_rtc_time, | |
656 | .calibrate_decr = generic_calibrate_decr, | |
657 | .progress = iSeries_progress, | |
658 | .probe = iseries_probe, | |
659 | .ioremap = iseries_ioremap, | |
660 | .iounmap = iseries_iounmap, | |
9f497581 ME |
661 | /* XXX Implement enable_pmcs for iSeries */ |
662 | }; | |
663 | ||
4762713a | 664 | void * __init iSeries_early_setup(void) |
1da177e4 | 665 | { |
799d6046 PM |
666 | unsigned long phys_mem_size; |
667 | ||
42c4aaad BH |
668 | /* Identify CPU type. This is done again by the common code later |
669 | * on but calling this function multiple times is fine. | |
670 | */ | |
974a76f5 | 671 | identify_cpu(0, mfspr(SPRN_PVR)); |
42c4aaad | 672 | |
ef26a46f SR |
673 | powerpc_firmware_features |= FW_FEATURE_ISERIES; |
674 | powerpc_firmware_features |= FW_FEATURE_LPAR; | |
675 | ||
1da177e4 | 676 | iSeries_fixup_klimit(); |
c0a59491 | 677 | |
4762713a ME |
678 | /* |
679 | * Initialize the table which translate Linux physical addresses to | |
680 | * AS/400 absolute addresses | |
681 | */ | |
799d6046 | 682 | phys_mem_size = build_iSeries_Memory_Map(); |
4762713a | 683 | |
bec7c458 SR |
684 | iSeries_get_cmdline(); |
685 | ||
c81014f6 | 686 | return (void *) __pa(build_flat_dt(phys_mem_size)); |
1da177e4 | 687 | } |
bec7c458 | 688 | |
bf6a7112 ME |
689 | static void hvputc(char c) |
690 | { | |
691 | if (c == '\n') | |
692 | hvputc('\r'); | |
693 | ||
694 | HvCall_writeLogBuffer(&c, 1); | |
695 | } | |
696 | ||
697 | void __init udbg_init_iseries(void) | |
698 | { | |
699 | udbg_putc = hvputc; | |
700 | } |