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Merge git://git.infradead.org/~dwmw2/hdroneline
[deliverable/linux.git] / arch / powerpc / platforms / iseries / setup.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4 *
1da177e4
LT		 5 * Description:
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9 * <dan@net4x.com>.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
17#undef DEBUG
18
1da177e4
LT		 19#include <linux/init.h>
20#include <linux/threads.h>
21#include <linux/smp.h>
22#include <linux/param.h>
23#include <linux/string.h>
1da177e4
LT		 24#include <linux/initrd.h>
25#include <linux/seq_file.h>
26#include <linux/kdev_t.h>
27#include <linux/major.h>
28#include <linux/root_dev.h>
bec7c458 29#include <linux/kernel.h>
1da177e4
LT		 30
31#include <asm/processor.h>
32#include <asm/machdep.h>
33#include <asm/page.h>
34#include <asm/mmu.h>
35#include <asm/pgtable.h>
36#include <asm/mmu_context.h>
37#include <asm/cputable.h>
38#include <asm/sections.h>
39#include <asm/iommu.h>
aed31351 40#include <asm/firmware.h>
49b09853 41#include <asm/system.h>
1da177e4 42#include <asm/time.h>
1da177e4
LT		 43#include <asm/paca.h>
44#include <asm/cache.h>
45#include <asm/sections.h>
0bc0ffd5 46#include <asm/abs_addr.h>
15b17189 47#include <asm/iseries/hv_lp_config.h>
c0a8d05c 48#include <asm/iseries/hv_call_event.h>
8021b8a7 49#include <asm/iseries/hv_call_xm.h>
8875ccfb 50#include <asm/iseries/it_lp_queue.h>
bbc8b628 51#include <asm/iseries/mf.h>
e45423ea 52#include <asm/iseries/hv_lp_event.h>
c43a55ff 53#include <asm/iseries/lpar_map.h>
bf6a7112 54#include <asm/udbg.h>
7d01c880 55#include <asm/irq.h>
1da177e4 56
f11b7bd8 57#include "naca.h"
c8b84976 58#include "setup.h"
b08567cb
SR		 59#include "irq.h"
60#include "vpd_areas.h"
61#include "processor_vpd.h"
06a36db1 62#include "it_lp_naca.h"
b08567cb
SR		 63#include "main_store.h"
64#include "call_sm.h"
0e29bb1a 65#include "call_hpt.h"
c8b84976 66
1da177e4 67#ifdef DEBUG
bf6a7112 68#define DBG(fmt...) udbg_printf(fmt)
1da177e4
LT		 69#else
70#define DBG(fmt...)
71#endif
72
73/* Function Prototypes */
799d6046 74static unsigned long build_iSeries_Memory_Map(void);
143a1dec
PM		 75static void iseries_shared_idle(void);
76static void iseries_dedicated_idle(void);
145d01e4 77#ifdef CONFIG_PCI
1da177e4 78extern void iSeries_pci_final_fixup(void);
145d01e4
SR		 79#else
80static void iSeries_pci_final_fixup(void) { }
81#endif
1da177e4 82
1da177e4 83extern int rd_size; /* Defined in drivers/block/rd.c */
1da177e4
LT		 84
85extern unsigned long iSeries_recal_tb;
86extern unsigned long iSeries_recal_titan;
87
1da177e4
LT		 88struct MemoryBlock {
89 unsigned long absStart;
90 unsigned long absEnd;
91 unsigned long logicalStart;
92 unsigned long logicalEnd;
93};
94
95/*
96 * Process the main store vpd to determine where the holes in memory are
97 * and return the number of physical blocks and fill in the array of
98 * block data.
99 */
100static unsigned long iSeries_process_Condor_mainstore_vpd(
101 struct MemoryBlock *mb_array, unsigned long max_entries)
102{
103 unsigned long holeFirstChunk, holeSizeChunks;
104 unsigned long numMemoryBlocks = 1;
105 struct IoHriMainStoreSegment4 *msVpd =
106 (struct IoHriMainStoreSegment4 *)xMsVpd;
107 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
108 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
109 unsigned long holeSize = holeEnd - holeStart;
110
111 printk("Mainstore_VPD: Condor\n");
112 /*
113 * Determine if absolute memory has any
114 * holes so that we can interpret the
115 * access map we get back from the hypervisor
116 * correctly.
117 */
118 mb_array[0].logicalStart = 0;
119 mb_array[0].logicalEnd = 0x100000000;
120 mb_array[0].absStart = 0;
121 mb_array[0].absEnd = 0x100000000;
122
123 if (holeSize) {
124 numMemoryBlocks = 2;
125 holeStart = holeStart & 0x000fffffffffffff;
126 holeStart = addr_to_chunk(holeStart);
127 holeFirstChunk = holeStart;
128 holeSize = addr_to_chunk(holeSize);
129 holeSizeChunks = holeSize;
130 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
131 holeFirstChunk, holeSizeChunks );
132 mb_array[0].logicalEnd = holeFirstChunk;
133 mb_array[0].absEnd = holeFirstChunk;
134 mb_array[1].logicalStart = holeFirstChunk;
135 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
136 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
137 mb_array[1].absEnd = 0x100000000;
138 }
139 return numMemoryBlocks;
140}
141
142#define MaxSegmentAreas 32
143#define MaxSegmentAdrRangeBlocks 128
144#define MaxAreaRangeBlocks 4
145
146static unsigned long iSeries_process_Regatta_mainstore_vpd(
147 struct MemoryBlock *mb_array, unsigned long max_entries)
148{
149 struct IoHriMainStoreSegment5 *msVpdP =
150 (struct IoHriMainStoreSegment5 *)xMsVpd;
151 unsigned long numSegmentBlocks = 0;
152 u32 existsBits = msVpdP->msAreaExists;
153 unsigned long area_num;
154
155 printk("Mainstore_VPD: Regatta\n");
156
157 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
158 unsigned long numAreaBlocks;
159 struct IoHriMainStoreArea4 *currentArea;
160
161 if (existsBits & 0x80000000) {
162 unsigned long block_num;
163
164 currentArea = &msVpdP->msAreaArray[area_num];
165 numAreaBlocks = currentArea->numAdrRangeBlocks;
166 printk("ms_vpd: processing area %2ld blocks=%ld",
167 area_num, numAreaBlocks);
168 for (block_num = 0; block_num < numAreaBlocks;
169 ++block_num ) {
170 /* Process an address range block */
171 struct MemoryBlock tempBlock;
172 unsigned long i;
173
174 tempBlock.absStart =
175 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
176 tempBlock.absEnd =
177 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
178 tempBlock.logicalStart = 0;
179 tempBlock.logicalEnd = 0;
180 printk("\n block %ld absStart=%016lx absEnd=%016lx",
181 block_num, tempBlock.absStart,
182 tempBlock.absEnd);
183
184 for (i = 0; i < numSegmentBlocks; ++i) {
185 if (mb_array[i].absStart ==
186 tempBlock.absStart)
187 break;
188 }
189 if (i == numSegmentBlocks) {
190 if (numSegmentBlocks == max_entries)
191 panic("iSeries_process_mainstore_vpd: too many memory blocks");
192 mb_array[numSegmentBlocks] = tempBlock;
193 ++numSegmentBlocks;
194 } else
195 printk(" (duplicate)");
196 }
197 printk("\n");
198 }
199 existsBits <<= 1;
200 }
201 /* Now sort the blocks found into ascending sequence */
202 if (numSegmentBlocks > 1) {
203 unsigned long m, n;
204
205 for (m = 0; m < numSegmentBlocks - 1; ++m) {
206 for (n = numSegmentBlocks - 1; m < n; --n) {
207 if (mb_array[n].absStart <
208 mb_array[n-1].absStart) {
209 struct MemoryBlock tempBlock;
210
211 tempBlock = mb_array[n];
212 mb_array[n] = mb_array[n-1];
213 mb_array[n-1] = tempBlock;
214 }
215 }
216 }
217 }
218 /*
219 * Assign "logical" addresses to each block. These
220 * addresses correspond to the hypervisor "bitmap" space.
221 * Convert all addresses into units of 256K chunks.
222 */
223 {
224 unsigned long i, nextBitmapAddress;
225
226 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
227 nextBitmapAddress = 0;
228 for (i = 0; i < numSegmentBlocks; ++i) {
229 unsigned long length = mb_array[i].absEnd -
230 mb_array[i].absStart;
231
232 mb_array[i].logicalStart = nextBitmapAddress;
233 mb_array[i].logicalEnd = nextBitmapAddress + length;
234 nextBitmapAddress += length;
235 printk(" Bitmap range: %016lx - %016lx\n"
236 " Absolute range: %016lx - %016lx\n",
237 mb_array[i].logicalStart,
238 mb_array[i].logicalEnd,
239 mb_array[i].absStart, mb_array[i].absEnd);
240 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
241 0x000fffffffffffff);
242 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
243 0x000fffffffffffff);
244 mb_array[i].logicalStart =
245 addr_to_chunk(mb_array[i].logicalStart);
246 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
247 }
248 }
249
250 return numSegmentBlocks;
251}
252
253static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
254 unsigned long max_entries)
255{
256 unsigned long i;
257 unsigned long mem_blocks = 0;
258
259 if (cpu_has_feature(CPU_FTR_SLB))
260 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
261 max_entries);
262 else
263 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
264 max_entries);
265
266 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
267 for (i = 0; i < mem_blocks; ++i) {
268 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
269 " abs chunks %016lx - %016lx\n",
270 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
271 mb_array[i].absStart, mb_array[i].absEnd);
272 }
273 return mem_blocks;
274}
275
276static void __init iSeries_get_cmdline(void)
277{
278 char *p, *q;
279
280 /* copy the command line parameter from the primary VSP */
281 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
282 HvLpDma_Direction_RemoteToLocal);
283
284 p = cmd_line;
285 q = cmd_line + 255;
286 while(p < q) {
287 if (!*p || *p == '\n')
288 break;
289 ++p;
290 }
291 *p = 0;
292}
293
294static void __init iSeries_init_early(void)
295{
1da177e4
LT		 296 DBG(" -> iSeries_init_early()\n");
297
1da177e4
LT		 298#if defined(CONFIG_BLK_DEV_INITRD)
299 /*
300 * If the init RAM disk has been configured and there is
301 * a non-zero starting address for it, set it up
302 */
303 if (naca.xRamDisk) {
304 initrd_start = (unsigned long)__va(naca.xRamDisk);
3c726f8d 305 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
1da177e4
LT		 306 initrd_below_start_ok = 1; // ramdisk in kernel space
307 ROOT_DEV = Root_RAM0;
3c726f8d
BH		 308 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
309 rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
1da177e4
LT		 310 } else
311#endif /* CONFIG_BLK_DEV_INITRD */
312 {
313 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
314 }
315
316 iSeries_recal_tb = get_tb();
317 iSeries_recal_titan = HvCallXm_loadTod();
318
1da177e4
LT		 319 /*
320 * Initialize the DMA/TCE management
321 */
322 iommu_init_early_iSeries();
323
1da177e4
LT		 324 /* Initialize machine-dependency vectors */
325#ifdef CONFIG_SMP
326 smp_init_iSeries();
327#endif
1da177e4
LT		 328
329 /* Associate Lp Event Queue 0 with processor 0 */
330 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
331
332 mf_init();
1da177e4
LT		 333
334 /* If we were passed an initrd, set the ROOT_DEV properly if the values
335 * look sensible. If not, clear initrd reference.
336 */
337#ifdef CONFIG_BLK_DEV_INITRD
338 if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
339 initrd_end > initrd_start)
340 ROOT_DEV = Root_RAM0;
341 else
342 initrd_start = initrd_end = 0;
343#endif /* CONFIG_BLK_DEV_INITRD */
344
345 DBG(" <- iSeries_init_early()\n");
346}
347
56e97b71 348struct mschunks_map mschunks_map = {
34c8f696
ME		 349 /* XXX We don't use these, but Piranha might need them. */
350 .chunk_size = MSCHUNKS_CHUNK_SIZE,
351 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
352 .chunk_mask = MSCHUNKS_OFFSET_MASK,
353};
56e97b71 354EXPORT_SYMBOL(mschunks_map);
34c8f696 355
56e97b71 356void mschunks_alloc(unsigned long num_chunks)
34c8f696
ME		 357{
358 klimit = _ALIGN(klimit, sizeof(u32));
56e97b71 359 mschunks_map.mapping = (u32 *)klimit;
34c8f696 360 klimit += num_chunks * sizeof(u32);
56e97b71 361 mschunks_map.num_chunks = num_chunks;
34c8f696
ME		 362}
363
1da177e4
LT		 364/*
365 * The iSeries may have very large memories ( > 128 GB ) and a partition
366 * may get memory in "chunks" that may be anywhere in the 2**52 real
367 * address space. The chunks are 256K in size. To map this to the
368 * memory model Linux expects, the AS/400 specific code builds a
369 * translation table to translate what Linux thinks are "physical"
370 * addresses to the actual real addresses. This allows us to make
371 * it appear to Linux that we have contiguous memory starting at
372 * physical address zero while in fact this could be far from the truth.
373 * To avoid confusion, I'll let the words physical and/or real address
374 * apply to the Linux addresses while I'll use "absolute address" to
375 * refer to the actual hardware real address.
376 *
377 * build_iSeries_Memory_Map gets information from the Hypervisor and
378 * looks at the Main Store VPD to determine the absolute addresses
379 * of the memory that has been assigned to our partition and builds
380 * a table used to translate Linux's physical addresses to these
381 * absolute addresses. Absolute addresses are needed when
382 * communicating with the hypervisor (e.g. to build HPT entries)
799d6046
PM		 383 *
384 * Returns the physical memory size
1da177e4
LT		 385 */
386
799d6046 387static unsigned long __init build_iSeries_Memory_Map(void)
1da177e4
LT		 388{
389 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
390 u32 nextPhysChunk;
391 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
1da177e4
LT		 392 u32 totalChunks,moreChunks;
393 u32 currChunk, thisChunk, absChunk;
394 u32 currDword;
395 u32 chunkBit;
396 u64 map;
397 struct MemoryBlock mb[32];
398 unsigned long numMemoryBlocks, curBlock;
399
400 /* Chunk size on iSeries is 256K bytes */
401 totalChunks = (u32)HvLpConfig_getMsChunks();
56e97b71 402 mschunks_alloc(totalChunks);
1da177e4
LT		 403
404 /*
405 * Get absolute address of our load area
406 * and map it to physical address 0
407 * This guarantees that the loadarea ends up at physical 0
408 * otherwise, it might not be returned by PLIC as the first
409 * chunks
410 */
411
412 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
413 loadAreaSize = itLpNaca.xLoadAreaChunks;
414
415 /*
416 * Only add the pages already mapped here.
417 * Otherwise we might add the hpt pages
418 * The rest of the pages of the load area
419 * aren't in the HPT yet and can still
420 * be assigned an arbitrary physical address
421 */
422 if ((loadAreaSize * 64) > HvPagesToMap)
423 loadAreaSize = HvPagesToMap / 64;
424
425 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
426
427 /*
428 * TODO Do we need to do something if the HPT is in the 64MB load area?
429 * This would be required if the itLpNaca.xLoadAreaChunks includes
430 * the HPT size
431 */
432
433 printk("Mapping load area - physical addr = 0000000000000000\n"
434 " absolute addr = %016lx\n",
435 chunk_to_addr(loadAreaFirstChunk));
436 printk("Load area size %dK\n", loadAreaSize * 256);
437
438 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
56e97b71 439 mschunks_map.mapping[nextPhysChunk] =
1da177e4
LT		 440 loadAreaFirstChunk + nextPhysChunk;
441
442 /*
443 * Get absolute address of our HPT and remember it so
444 * we won't map it to any physical address
445 */
446 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
447 hptSizePages = (u32)HvCallHpt_getHptPages();
3c726f8d
BH		 448 hptSizeChunks = hptSizePages >>
449 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
1da177e4
LT		 450 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
451
452 printk("HPT absolute addr = %016lx, size = %dK\n",
453 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
454
1da177e4
LT		 455 /*
456 * Determine if absolute memory has any
457 * holes so that we can interpret the
458 * access map we get back from the hypervisor
459 * correctly.
460 */
461 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
462
463 /*
464 * Process the main store access map from the hypervisor
465 * to build up our physical -> absolute translation table
466 */
467 curBlock = 0;
468 currChunk = 0;
469 currDword = 0;
470 moreChunks = totalChunks;
471
472 while (moreChunks) {
473 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
474 currDword);
475 thisChunk = currChunk;
476 while (map) {
477 chunkBit = map >> 63;
478 map <<= 1;
479 if (chunkBit) {
480 --moreChunks;
481 while (thisChunk >= mb[curBlock].logicalEnd) {
482 ++curBlock;
483 if (curBlock >= numMemoryBlocks)
484 panic("out of memory blocks");
485 }
486 if (thisChunk < mb[curBlock].logicalStart)
487 panic("memory block error");
488
489 absChunk = mb[curBlock].absStart +
490 (thisChunk - mb[curBlock].logicalStart);
491 if (((absChunk < hptFirstChunk) ||
492 (absChunk > hptLastChunk)) &&
493 ((absChunk < loadAreaFirstChunk) ||
494 (absChunk > loadAreaLastChunk))) {
56e97b71
ME		 495 mschunks_map.mapping[nextPhysChunk] =
496 absChunk;
1da177e4
LT		 497 ++nextPhysChunk;
498 }
499 }
500 ++thisChunk;
501 }
502 ++currDword;
503 currChunk += 64;
504 }
505
506 /*
507 * main store size (in chunks) is
508 * totalChunks - hptSizeChunks
509 * which should be equal to
510 * nextPhysChunk
511 */
799d6046 512 return chunk_to_addr(nextPhysChunk);
1da177e4
LT		 513}
514
1da177e4
LT		 515/*
516 * Document me.
517 */
518static void __init iSeries_setup_arch(void)
519{
3356bb9f 520 if (get_lppaca()->shared_proc) {
9f497581 521 ppc_md.idle_loop = iseries_shared_idle;
4baaf0cf 522 printk(KERN_DEBUG "Using shared processor idle loop\n");
9f497581
ME		 523 } else {
524 ppc_md.idle_loop = iseries_dedicated_idle;
4baaf0cf 525 printk(KERN_DEBUG "Using dedicated idle loop\n");
9f497581
ME		 526 }
527
1da177e4 528 /* Setup the Lp Event Queue */
512d31d6 529 setup_hvlpevent_queue();
1da177e4 530
1da177e4
LT		 531 printk("Max logical processors = %d\n",
532 itVpdAreas.xSlicMaxLogicalProcs);
533 printk("Max physical processors = %d\n",
534 itVpdAreas.xSlicMaxPhysicalProcs);
1da177e4
LT		 535}
536
d8699e65 537static void iSeries_show_cpuinfo(struct seq_file *m)
1da177e4
LT		 538{
539 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
540}
541
1da177e4
LT		 542static void __init iSeries_progress(char * st, unsigned short code)
543{
544 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
260de22f 545 mf_display_progress(code);
1da177e4
LT		 546}
547
548static void __init iSeries_fixup_klimit(void)
549{
550 /*
551 * Change klimit to take into account any ram disk
552 * that may be included
553 */
554 if (naca.xRamDisk)
555 klimit = KERNELBASE + (u64)naca.xRamDisk +
3c726f8d 556 (naca.xRamDiskSize * HW_PAGE_SIZE);
1da177e4
LT		 557}
558
559static int __init iSeries_src_init(void)
560{
561 /* clear the progress line */
562 ppc_md.progress(" ", 0xffff);
563 return 0;
564}
565
566late_initcall(iSeries_src_init);
567
d200903e
ME		 568static inline void process_iSeries_events(void)
569{
570 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
571}
572
573static void yield_shared_processor(void)
574{
575 unsigned long tb;
d200903e
ME		 576
577 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
578 HvCall_MaskLpEvent |
579 HvCall_MaskLpProd |
580 HvCall_MaskTimeout);
581
582 tb = get_tb();
583 /* Compute future tb value when yield should expire */
584 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
585
d200903e
ME		 586 /*
587 * The decrementer stops during the yield. Force a fake decrementer
588 * here and let the timer_interrupt code sort out the actual time.
589 */
3356bb9f 590 get_lppaca()->int_dword.fields.decr_int = 1;
cb2c9b27 591 ppc64_runlatch_on();
d200903e
ME		 592 process_iSeries_events();
593}
594
143a1dec 595static void iseries_shared_idle(void)
d200903e 596{
3c57bb9f
AB		 597 while (1) {
598 while (!need_resched() && !hvlpevent_is_pending()) {
599 local_irq_disable();
600 ppc64_runlatch_off();
601
602 /* Recheck with irqs off */
603 if (!need_resched() && !hvlpevent_is_pending())
604 yield_shared_processor();
d200903e 605
3c57bb9f
AB		 606 HMT_medium();
607 local_irq_enable();
608 }
609
610 ppc64_runlatch_on();
d200903e 611
3c57bb9f
AB		 612 if (hvlpevent_is_pending())
613 process_iSeries_events();
614
5bfb5d69 615 preempt_enable_no_resched();
3c57bb9f 616 schedule();
5bfb5d69 617 preempt_disable();
3c57bb9f 618 }
3c57bb9f
AB		 619}
620
143a1dec 621static void iseries_dedicated_idle(void)
3c57bb9f 622{
64c7c8f8 623 set_thread_flag(TIF_POLLING_NRFLAG);
d200903e
ME		 624
625 while (1) {
64c7c8f8 626 if (!need_resched()) {
3c57bb9f
AB		 627 while (!need_resched()) {
628 ppc64_runlatch_off();
629 HMT_low();
630
631 if (hvlpevent_is_pending()) {
d200903e 632 HMT_medium();
3c57bb9f
AB		 633 ppc64_runlatch_on();
634 process_iSeries_events();
d200903e 635 }
d200903e 636 }
3c57bb9f
AB		 637
638 HMT_medium();
d200903e
ME		 639 }
640
641 ppc64_runlatch_on();
5bfb5d69 642 preempt_enable_no_resched();
d200903e 643 schedule();
5bfb5d69 644 preempt_disable();
d200903e 645 }
d200903e
ME		 646}
647
145d01e4
SR		 648#ifndef CONFIG_PCI
649void __init iSeries_init_IRQ(void) { }
650#endif
651
e8222502 652static int __init iseries_probe(void)
4762713a 653{
e8222502
BH		 654 unsigned long root = of_get_flat_dt_root();
655 if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
57cfb814
ME		 656 return 0;
657
d0160bf0
ME		 658 powerpc_firmware_features |= FW_FEATURE_ISERIES;
659 powerpc_firmware_features |= FW_FEATURE_LPAR;
57cfb814 660
7d0daae4
ME		 661 hpte_init_iSeries();
662
57cfb814 663 return 1;
4762713a
ME		 664}
665
e8222502
BH		 666define_machine(iseries) {
667 .name = "iSeries",
9f497581 668 .setup_arch = iSeries_setup_arch,
d8699e65 669 .show_cpuinfo = iSeries_show_cpuinfo,
9f497581
ME		 670 .init_IRQ = iSeries_init_IRQ,
671 .get_irq = iSeries_get_irq,
672 .init_early = iSeries_init_early,
673 .pcibios_fixup = iSeries_pci_final_fixup,
a9ea2101
ME		 674 .restart = mf_reboot,
675 .power_off = mf_power_off,
676 .halt = mf_power_off,
9f497581
ME		 677 .get_boot_time = iSeries_get_boot_time,
678 .set_rtc_time = iSeries_set_rtc_time,
679 .get_rtc_time = iSeries_get_rtc_time,
95b29380 680 .calibrate_decr = generic_calibrate_decr,
9f497581 681 .progress = iSeries_progress,
4762713a 682 .probe = iseries_probe,
9f497581
ME		 683 /* XXX Implement enable_pmcs for iSeries */
684};
685
4762713a 686void * __init iSeries_early_setup(void)
1da177e4 687{
799d6046
PM		 688 unsigned long phys_mem_size;
689
1da177e4 690 iSeries_fixup_klimit();
c0a59491 691
4762713a
ME		 692 /*
693 * Initialize the table which translate Linux physical addresses to
694 * AS/400 absolute addresses
695 */
799d6046 696 phys_mem_size = build_iSeries_Memory_Map();
4762713a 697
bec7c458
SR		 698 iSeries_get_cmdline();
699
c81014f6 700 return (void *) __pa(build_flat_dt(phys_mem_size));
1da177e4 701}
bec7c458 702
bf6a7112
ME		 703static void hvputc(char c)
704{
705 if (c == '\n')
706 hvputc('\r');
707
708 HvCall_writeLogBuffer(&c, 1);
709}
710
711void __init udbg_init_iseries(void)
712{
713 udbg_putc = hvputc;
714}
Linux kernel - Deliverables
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