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1e76875e OJ |
1 | /* |
2 | * Copyright (C) 2006 PA Semi, Inc | |
3 | * | |
4 | * Authors: Kip Walker, PA Semi | |
5 | * Olof Johansson, PA Semi | |
6 | * | |
7 | * Maintained by: Olof Johansson <olof@lixom.net> | |
8 | * | |
9 | * Based on arch/powerpc/platforms/maple/setup.c | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
23 | */ | |
24 | ||
1e76875e OJ |
25 | #include <linux/errno.h> |
26 | #include <linux/kernel.h> | |
27 | #include <linux/delay.h> | |
28 | #include <linux/console.h> | |
12d04eef | 29 | #include <linux/pci.h> |
1e76875e OJ |
30 | |
31 | #include <asm/prom.h> | |
32 | #include <asm/system.h> | |
33 | #include <asm/iommu.h> | |
34 | #include <asm/machdep.h> | |
35 | #include <asm/mpic.h> | |
36 | #include <asm/smp.h> | |
37 | #include <asm/time.h> | |
38 | ||
39 | #include "pasemi.h" | |
40 | ||
f620be99 | 41 | static void __iomem *reset_reg; |
1e76875e | 42 | |
f620be99 | 43 | static void pas_restart(char *cmd) |
1e76875e | 44 | { |
f620be99 OJ |
45 | printk("Restarting...\n"); |
46 | while (1) | |
47 | out_le32(reset_reg, 0x6000000); | |
1e76875e OJ |
48 | } |
49 | ||
50 | #ifdef CONFIG_SMP | |
c388cfeb OJ |
51 | static DEFINE_SPINLOCK(timebase_lock); |
52 | ||
53 | static void __devinit pas_give_timebase(void) | |
54 | { | |
55 | unsigned long tb; | |
56 | ||
57 | spin_lock(&timebase_lock); | |
58 | mtspr(SPRN_TBCTL, TBCTL_FREEZE); | |
59 | tb = mftb(); | |
60 | mtspr(SPRN_TBCTL, TBCTL_UPDATE_LOWER | (tb & 0xffffffff)); | |
61 | mtspr(SPRN_TBCTL, TBCTL_UPDATE_UPPER | (tb >> 32)); | |
62 | mtspr(SPRN_TBCTL, TBCTL_RESTART); | |
63 | spin_unlock(&timebase_lock); | |
64 | pr_debug("pas_give_timebase: cpu %d gave tb %lx\n", | |
65 | smp_processor_id(), tb); | |
66 | } | |
67 | ||
68 | static void __devinit pas_take_timebase(void) | |
69 | { | |
70 | pr_debug("pas_take_timebase: cpu %d has tb %lx\n", | |
71 | smp_processor_id(), mftb()); | |
72 | } | |
73 | ||
1e76875e OJ |
74 | struct smp_ops_t pas_smp_ops = { |
75 | .probe = smp_mpic_probe, | |
76 | .message_pass = smp_mpic_message_pass, | |
77 | .kick_cpu = smp_generic_kick_cpu, | |
78 | .setup_cpu = smp_mpic_setup_cpu, | |
c388cfeb OJ |
79 | .give_timebase = pas_give_timebase, |
80 | .take_timebase = pas_take_timebase, | |
1e76875e OJ |
81 | }; |
82 | #endif /* CONFIG_SMP */ | |
83 | ||
84 | void __init pas_setup_arch(void) | |
85 | { | |
86 | #ifdef CONFIG_SMP | |
87 | /* Setup SMP callback */ | |
88 | smp_ops = &pas_smp_ops; | |
89 | #endif | |
12d04eef BH |
90 | /* no iommu yet */ |
91 | pci_dma_ops = &dma_direct_ops; | |
92 | ||
1e76875e OJ |
93 | /* Lookup PCI hosts */ |
94 | pas_pci_init(); | |
95 | ||
96 | #ifdef CONFIG_DUMMY_CONSOLE | |
97 | conswitchp = &dummy_con; | |
98 | #endif | |
99 | ||
f620be99 OJ |
100 | /* Remap SDC register for doing reset */ |
101 | /* XXXOJN This should maybe come out of the device tree */ | |
102 | reset_reg = ioremap(0xfc101100, 4); | |
103 | ||
1199919b | 104 | pasemi_idle_init(); |
1e76875e OJ |
105 | } |
106 | ||
1e76875e OJ |
107 | /* No legacy IO on our parts */ |
108 | static int pas_check_legacy_ioport(unsigned int baseport) | |
109 | { | |
110 | return -ENODEV; | |
111 | } | |
112 | ||
113 | static __init void pas_init_IRQ(void) | |
114 | { | |
115 | struct device_node *np; | |
116 | struct device_node *root, *mpic_node; | |
117 | unsigned long openpic_addr; | |
118 | const unsigned int *opprop; | |
119 | int naddr, opplen; | |
120 | struct mpic *mpic; | |
121 | ||
122 | mpic_node = NULL; | |
123 | ||
124 | for_each_node_by_type(np, "interrupt-controller") | |
125 | if (device_is_compatible(np, "open-pic")) { | |
126 | mpic_node = np; | |
127 | break; | |
128 | } | |
129 | if (!mpic_node) | |
130 | for_each_node_by_type(np, "open-pic") { | |
131 | mpic_node = np; | |
132 | break; | |
133 | } | |
134 | if (!mpic_node) { | |
135 | printk(KERN_ERR | |
136 | "Failed to locate the MPIC interrupt controller\n"); | |
137 | return; | |
138 | } | |
139 | ||
140 | /* Find address list in /platform-open-pic */ | |
141 | root = of_find_node_by_path("/"); | |
142 | naddr = prom_n_addr_cells(root); | |
143 | opprop = get_property(root, "platform-open-pic", &opplen); | |
144 | if (!opprop) { | |
145 | printk(KERN_ERR "No platform-open-pic property.\n"); | |
146 | of_node_put(root); | |
147 | return; | |
148 | } | |
149 | openpic_addr = of_read_number(opprop, naddr); | |
150 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); | |
1e76875e | 151 | |
7df2457d OJ |
152 | mpic = mpic_alloc(mpic_node, openpic_addr, |
153 | MPIC_PRIMARY|MPIC_LARGE_VECTORS, | |
154 | 0, 0, " PAS-OPIC "); | |
1e76875e OJ |
155 | BUG_ON(!mpic); |
156 | ||
157 | mpic_assign_isu(mpic, 0, openpic_addr + 0x10000); | |
158 | mpic_init(mpic); | |
159 | of_node_put(mpic_node); | |
160 | of_node_put(root); | |
161 | } | |
162 | ||
163 | static void __init pas_progress(char *s, unsigned short hex) | |
164 | { | |
165 | printk("[%04x] : %s\n", hex, s ? s : ""); | |
166 | } | |
167 | ||
168 | ||
bfed9d32 OJ |
169 | static int pas_machine_check_handler(struct pt_regs *regs) |
170 | { | |
171 | int cpu = smp_processor_id(); | |
172 | unsigned long srr0, srr1, dsisr; | |
173 | ||
174 | srr0 = regs->nip; | |
175 | srr1 = regs->msr; | |
176 | dsisr = mfspr(SPRN_DSISR); | |
177 | printk(KERN_ERR "Machine Check on CPU %d\n", cpu); | |
178 | printk(KERN_ERR "SRR0 0x%016lx SRR1 0x%016lx\n", srr0, srr1); | |
179 | printk(KERN_ERR "DSISR 0x%016lx DAR 0x%016lx\n", dsisr, regs->dar); | |
180 | printk(KERN_ERR "Cause:\n"); | |
181 | ||
182 | if (srr1 & 0x200000) | |
183 | printk(KERN_ERR "Signalled by SDC\n"); | |
184 | if (srr1 & 0x100000) { | |
185 | printk(KERN_ERR "Load/Store detected error:\n"); | |
186 | if (dsisr & 0x8000) | |
187 | printk(KERN_ERR "D-cache ECC double-bit error or bus error\n"); | |
188 | if (dsisr & 0x4000) | |
189 | printk(KERN_ERR "LSU snoop response error\n"); | |
190 | if (dsisr & 0x2000) | |
191 | printk(KERN_ERR "MMU SLB multi-hit or invalid B field\n"); | |
192 | if (dsisr & 0x1000) | |
193 | printk(KERN_ERR "Recoverable Duptags\n"); | |
194 | if (dsisr & 0x800) | |
195 | printk(KERN_ERR "Recoverable D-cache parity error count overflow\n"); | |
196 | if (dsisr & 0x400) | |
197 | printk(KERN_ERR "TLB parity error count overflow\n"); | |
198 | } | |
199 | if (srr1 & 0x80000) | |
200 | printk(KERN_ERR "Bus Error\n"); | |
201 | if (srr1 & 0x40000) | |
202 | printk(KERN_ERR "I-side SLB multiple hit\n"); | |
203 | if (srr1 & 0x20000) | |
204 | printk(KERN_ERR "I-cache parity error hit\n"); | |
205 | ||
206 | /* SRR1[62] is from MSR[62] if recoverable, so pass that back */ | |
207 | return !!(srr1 & 0x2); | |
208 | } | |
209 | ||
210 | ||
1e76875e OJ |
211 | /* |
212 | * Called very early, MMU is off, device-tree isn't unflattened | |
213 | */ | |
214 | static int __init pas_probe(void) | |
215 | { | |
216 | unsigned long root = of_get_flat_dt_root(); | |
217 | ||
218 | if (!of_flat_dt_is_compatible(root, "PA6T-1682M")) | |
219 | return 0; | |
220 | ||
221 | hpte_init_native(); | |
222 | ||
223 | return 1; | |
224 | } | |
225 | ||
226 | define_machine(pas) { | |
227 | .name = "PA Semi PA6T-1682M", | |
228 | .probe = pas_probe, | |
229 | .setup_arch = pas_setup_arch, | |
1e76875e OJ |
230 | .init_IRQ = pas_init_IRQ, |
231 | .get_irq = mpic_get_irq, | |
1e76875e | 232 | .restart = pas_restart, |
1e76875e OJ |
233 | .get_boot_time = pas_get_boot_time, |
234 | .calibrate_decr = generic_calibrate_decr, | |
235 | .check_legacy_ioport = pas_check_legacy_ioport, | |
236 | .progress = pas_progress, | |
bfed9d32 | 237 | .machine_check_exception = pas_machine_check_handler, |
f9fba5b7 | 238 | .pci_irq_fixup = pas_pci_irq_fixup, |
1e76875e | 239 | }; |