Merge branch 'for-linus' of git://neil.brown.name/md
[deliverable/linux.git] / arch / powerpc / platforms / powermac / setup.c
CommitLineData
14cf11af 1/*
35499c01 2 * Powermac setup and early boot code plus other random bits.
14cf11af
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3 *
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 *
7 * Adapted for Power Macintosh by Paul Mackerras
35499c01 8 * Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
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9 *
10 * Derived from "arch/alpha/kernel/setup.c"
11 * Copyright (C) 1995 Linus Torvalds
12 *
13 * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 *
20 */
21
22/*
23 * bootup setup stuff..
24 */
25
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26#include <linux/init.h>
27#include <linux/errno.h>
28#include <linux/sched.h>
29#include <linux/kernel.h>
30#include <linux/mm.h>
31#include <linux/stddef.h>
32#include <linux/unistd.h>
33#include <linux/ptrace.h>
34#include <linux/slab.h>
35#include <linux/user.h>
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36#include <linux/tty.h>
37#include <linux/string.h>
38#include <linux/delay.h>
39#include <linux/ioport.h>
40#include <linux/major.h>
41#include <linux/initrd.h>
42#include <linux/vt_kern.h>
43#include <linux/console.h>
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44#include <linux/pci.h>
45#include <linux/adb.h>
46#include <linux/cuda.h>
47#include <linux/pmu.h>
48#include <linux/irq.h>
49#include <linux/seq_file.h>
50#include <linux/root_dev.h>
51#include <linux/bitops.h>
52#include <linux/suspend.h>
5f867dc7
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53#include <linux/of_device.h>
54#include <linux/of_platform.h>
d9b2b2a2 55#include <linux/lmb.h>
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56
57#include <asm/reg.h>
58#include <asm/sections.h>
59#include <asm/prom.h>
60#include <asm/system.h>
61#include <asm/pgtable.h>
62#include <asm/io.h>
63#include <asm/pci-bridge.h>
64#include <asm/ohare.h>
65#include <asm/mediabay.h>
66#include <asm/machdep.h>
67#include <asm/dma.h>
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68#include <asm/cputable.h>
69#include <asm/btext.h>
70#include <asm/pmac_feature.h>
71#include <asm/time.h>
14cf11af 72#include <asm/mmu_context.h>
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73#include <asm/iommu.h>
74#include <asm/smu.h>
75#include <asm/pmc.h>
51d3082f 76#include <asm/udbg.h>
14cf11af 77
3c3f42d6 78#include "pmac.h"
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79
80#undef SHOW_GATWICK_IRQS
81
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82int ppc_override_l2cr = 0;
83int ppc_override_l2cr_value;
84int has_l2cache = 0;
85
d2515c80 86int pmac_newworld;
9b6b563c 87
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88static int current_root_goodness = -1;
89
35499c01 90extern struct machdep_calls pmac_md;
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91
92#define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
93
35499c01 94#ifdef CONFIG_PPC64
35499c01 95int sccdbg;
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96#endif
97
98sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
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99EXPORT_SYMBOL(sys_ctrler);
100
101#ifdef CONFIG_PMAC_SMU
102unsigned long smu_cmdbuf_abs;
103EXPORT_SYMBOL(smu_cmdbuf_abs);
104#endif
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105
106#ifdef CONFIG_SMP
107extern struct smp_ops_t psurge_smp_ops;
108extern struct smp_ops_t core99_smp_ops;
109#endif /* CONFIG_SMP */
110
0dd194d0 111static void pmac_show_cpuinfo(struct seq_file *m)
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112{
113 struct device_node *np;
018a3d1d 114 const char *pp;
14cf11af 115 int plen;
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116 int mbmodel;
117 unsigned int mbflags;
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118 char* mbname;
119
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120 mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
121 PMAC_MB_INFO_MODEL, 0);
122 mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
123 PMAC_MB_INFO_FLAGS, 0);
124 if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
125 (long) &mbname) != 0)
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126 mbname = "Unknown";
127
128 /* find motherboard type */
129 seq_printf(m, "machine\t\t: ");
0dd194d0 130 np = of_find_node_by_path("/");
14cf11af 131 if (np != NULL) {
e2eb6392 132 pp = of_get_property(np, "model", NULL);
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133 if (pp != NULL)
134 seq_printf(m, "%s\n", pp);
135 else
136 seq_printf(m, "PowerMac\n");
e2eb6392 137 pp = of_get_property(np, "compatible", &plen);
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138 if (pp != NULL) {
139 seq_printf(m, "motherboard\t:");
140 while (plen > 0) {
141 int l = strlen(pp) + 1;
142 seq_printf(m, " %s", pp);
143 plen -= l;
144 pp += l;
145 }
146 seq_printf(m, "\n");
147 }
0dd194d0 148 of_node_put(np);
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149 } else
150 seq_printf(m, "PowerMac\n");
151
152 /* print parsed model */
153 seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
154 seq_printf(m, "pmac flags\t: %08x\n", mbflags);
155
156 /* find l2 cache info */
0dd194d0
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157 np = of_find_node_by_name(NULL, "l2-cache");
158 if (np == NULL)
159 np = of_find_node_by_type(NULL, "cache");
160 if (np != NULL) {
e2eb6392
SR
161 const unsigned int *ic =
162 of_get_property(np, "i-cache-size", NULL);
163 const unsigned int *dc =
164 of_get_property(np, "d-cache-size", NULL);
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165 seq_printf(m, "L2 cache\t:");
166 has_l2cache = 1;
e2eb6392 167 if (of_get_property(np, "cache-unified", NULL) != 0 && dc) {
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168 seq_printf(m, " %dK unified", *dc / 1024);
169 } else {
170 if (ic)
171 seq_printf(m, " %dK instruction", *ic / 1024);
172 if (dc)
173 seq_printf(m, "%s %dK data",
174 (ic? " +": ""), *dc / 1024);
175 }
e2eb6392 176 pp = of_get_property(np, "ram-type", NULL);
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177 if (pp)
178 seq_printf(m, " %s", pp);
179 seq_printf(m, "\n");
0dd194d0 180 of_node_put(np);
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181 }
182
183 /* Indicate newworld/oldworld */
184 seq_printf(m, "pmac-generation\t: %s\n",
185 pmac_newworld ? "NewWorld" : "OldWorld");
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186}
187
35499c01
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188#ifndef CONFIG_ADB_CUDA
189int find_via_cuda(void)
190{
30686ba6
SR
191 struct device_node *dn = of_find_node_by_name(NULL, "via-cuda");
192
193 if (!dn)
35499c01 194 return 0;
30686ba6 195 of_node_put(dn);
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196 printk("WARNING ! Your machine is CUDA-based but your kernel\n");
197 printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n");
198 return 0;
199}
200#endif
14cf11af 201
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202#ifndef CONFIG_ADB_PMU
203int find_via_pmu(void)
14cf11af 204{
30686ba6
SR
205 struct device_node *dn = of_find_node_by_name(NULL, "via-pmu");
206
207 if (!dn)
35499c01 208 return 0;
30686ba6 209 of_node_put(dn);
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210 printk("WARNING ! Your machine is PMU-based but your kernel\n");
211 printk(" wasn't compiled with CONFIG_ADB_PMU option !\n");
a575b807 212 return 0;
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213}
214#endif
14cf11af 215
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216#ifndef CONFIG_PMAC_SMU
217int smu_init(void)
218{
219 /* should check and warn if SMU is present */
220 return 0;
221}
222#endif
14cf11af 223
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224#ifdef CONFIG_PPC32
225static volatile u32 *sysctrl_regs;
14cf11af 226
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227static void __init ohare_init(void)
228{
30686ba6
SR
229 struct device_node *dn;
230
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231 /* this area has the CPU identification register
232 and some registers used by smp boards */
233 sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);
14cf11af 234
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235 /*
236 * Turn on the L2 cache.
237 * We assume that we have a PSX memory controller iff
238 * we have an ohare I/O controller.
239 */
30686ba6
SR
240 dn = of_find_node_by_name(NULL, "ohare");
241 if (dn) {
242 of_node_put(dn);
35499c01
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243 if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
244 if (sysctrl_regs[4] & 0x10)
245 sysctrl_regs[4] |= 0x04000020;
246 else
247 sysctrl_regs[4] |= 0x04000000;
248 if(has_l2cache)
249 printk(KERN_INFO "Level 2 cache enabled\n");
250 }
251 }
252}
14cf11af 253
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254static void __init l2cr_init(void)
255{
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256 /* Checks "l2cr-value" property in the registry */
257 if (cpu_has_feature(CPU_FTR_L2CR)) {
1658ab66 258 struct device_node *np = of_find_node_by_name(NULL, "cpus");
14cf11af 259 if (np == 0)
1658ab66 260 np = of_find_node_by_type(NULL, "cpu");
14cf11af 261 if (np != 0) {
018a3d1d 262 const unsigned int *l2cr =
e2eb6392 263 of_get_property(np, "l2cr-value", NULL);
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264 if (l2cr != 0) {
265 ppc_override_l2cr = 1;
266 ppc_override_l2cr_value = *l2cr;
267 _set_L2CR(0);
268 _set_L2CR(ppc_override_l2cr_value);
269 }
1658ab66 270 of_node_put(np);
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271 }
272 }
273
274 if (ppc_override_l2cr)
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275 printk(KERN_INFO "L2CR overridden (0x%x), "
276 "backside cache is %s\n",
277 ppc_override_l2cr_value,
278 (ppc_override_l2cr_value & 0x80000000)
14cf11af 279 ? "enabled" : "disabled");
35499c01
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280}
281#endif
282
ff38e7c8 283static void __init pmac_setup_arch(void)
35499c01 284{
a575b807 285 struct device_node *cpu, *ic;
018a3d1d 286 const int *fp;
35499c01
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287 unsigned long pvr;
288
289 pvr = PVR_VER(mfspr(SPRN_PVR));
290
291 /* Set loops_per_jiffy to a half-way reasonable value,
292 for use until calibrate_delay gets called. */
293 loops_per_jiffy = 50000000 / HZ;
294 cpu = of_find_node_by_type(NULL, "cpu");
295 if (cpu != NULL) {
e2eb6392 296 fp = of_get_property(cpu, "clock-frequency", NULL);
35499c01
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297 if (fp != NULL) {
298 if (pvr >= 0x30 && pvr < 0x80)
299 /* PPC970 etc. */
300 loops_per_jiffy = *fp / (3 * HZ);
301 else if (pvr == 4 || pvr >= 8)
302 /* 604, G3, G4 etc. */
303 loops_per_jiffy = *fp / HZ;
304 else
305 /* 601, 603, etc. */
306 loops_per_jiffy = *fp / (2 * HZ);
307 }
308 of_node_put(cpu);
309 }
310
a575b807 311 /* See if newworld or oldworld */
22059a90 312 ic = of_find_node_with_property(NULL, "interrupt-controller");
d2515c80
OH
313 if (ic) {
314 pmac_newworld = 1;
a575b807 315 of_node_put(ic);
d2515c80 316 }
a575b807 317
35499c01
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318 /* Lookup PCI hosts */
319 pmac_pci_init();
320
321#ifdef CONFIG_PPC32
322 ohare_init();
323 l2cr_init();
324#endif /* CONFIG_PPC32 */
325
14cf11af 326 find_via_cuda();
14cf11af 327 find_via_pmu();
35499c01
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328 smu_init();
329
21e38dfe
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330#if defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE) || \
331 defined(CONFIG_PPC64)
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332 pmac_nvram_init();
333#endif
35499c01
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334
335#ifdef CONFIG_PPC32
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336#ifdef CONFIG_BLK_DEV_INITRD
337 if (initrd_start)
338 ROOT_DEV = Root_RAM0;
339 else
340#endif
341 ROOT_DEV = DEFAULT_ROOT_DEVICE;
35499c01 342#endif
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343
344#ifdef CONFIG_SMP
345 /* Check for Core99 */
30686ba6
SR
346 ic = of_find_node_by_name(NULL, "uni-n");
347 if (!ic)
348 ic = of_find_node_by_name(NULL, "u3");
349 if (!ic)
350 ic = of_find_node_by_name(NULL, "u4");
351 if (ic) {
352 of_node_put(ic);
7ed476d1 353 smp_ops = &core99_smp_ops;
30686ba6 354 }
35499c01 355#ifdef CONFIG_PPC32
c63c4faa
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356 else {
357 /*
358 * We have to set bits in cpu_possible_map here since the
359 * secondary CPU(s) aren't in the device tree, and
360 * setup_per_cpu_areas only allocates per-cpu data for
361 * CPUs in the cpu_possible_map.
362 */
363 int cpu;
364
365 for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
366 cpu_set(cpu, cpu_possible_map);
7ed476d1 367 smp_ops = &psurge_smp_ops;
c63c4faa 368 }
35499c01 369#endif
14cf11af 370#endif /* CONFIG_SMP */
e8222502
BH
371
372#ifdef CONFIG_ADB
373 if (strstr(cmd_line, "adb_sync")) {
374 extern int __adb_probe_sync;
375 __adb_probe_sync = 1;
376 }
377#endif /* CONFIG_ADB */
14cf11af
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378}
379
14cf11af 380#ifdef CONFIG_SCSI
405861a0 381void note_scsi_host(struct device_node *node, void *host)
14cf11af 382{
14cf11af 383}
9b6b563c 384EXPORT_SYMBOL(note_scsi_host);
14cf11af
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385#endif
386
35499c01
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387static int initializing = 1;
388
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389static int pmac_late_init(void)
390{
391 initializing = 0;
d9333afd
JB
392 /* this is udbg (which is __init) and we can later use it during
393 * cpu hotplug (in smp_core99_kick_cpu) */
394 ppc_md.progress = NULL;
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395 return 0;
396}
d518b717 397machine_late_initcall(powermac, pmac_late_init);
14cf11af 398
d7418031
SR
399/*
400 * This is __init_refok because we check for "initializing" before
401 * touching any of the __init sensitive things and "initializing"
402 * will be false after __init time. This can't be __init because it
403 * can be called whenever a disk is first accessed.
404 */
405void __init_refok note_bootable_part(dev_t dev, int part, int goodness)
14cf11af 406{
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407 char *p;
408
409 if (!initializing)
410 return;
411 if ((goodness <= current_root_goodness) &&
412 ROOT_DEV != DEFAULT_ROOT_DEVICE)
413 return;
b8757b21
ABL
414 p = strstr(boot_command_line, "root=");
415 if (p != NULL && (p == boot_command_line || p[-1] == ' '))
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416 return;
417
6ee0d9f7
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418 ROOT_DEV = dev + part;
419 current_root_goodness = goodness;
14cf11af
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420}
421
14cf11af 422#ifdef CONFIG_ADB_CUDA
35499c01
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423static void cuda_restart(void)
424{
14cf11af 425 struct adb_request req;
14cf11af 426
35499c01
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427 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
428 for (;;)
429 cuda_poll();
430}
431
432static void cuda_shutdown(void)
433{
434 struct adb_request req;
435
436 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
437 for (;;)
438 cuda_poll();
439}
440
441#else
442#define cuda_restart()
443#define cuda_shutdown()
444#endif
445
446#ifndef CONFIG_ADB_PMU
447#define pmu_restart()
448#define pmu_shutdown()
449#endif
450
451#ifndef CONFIG_PMAC_SMU
452#define smu_restart()
453#define smu_shutdown()
454#endif
455
456static void pmac_restart(char *cmd)
457{
14cf11af 458 switch (sys_ctrler) {
14cf11af 459 case SYS_CTRLER_CUDA:
35499c01 460 cuda_restart();
14cf11af 461 break;
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462 case SYS_CTRLER_PMU:
463 pmu_restart();
464 break;
35499c01
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465 case SYS_CTRLER_SMU:
466 smu_restart();
467 break;
14cf11af
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468 default: ;
469 }
470}
471
35499c01 472static void pmac_power_off(void)
14cf11af 473{
14cf11af 474 switch (sys_ctrler) {
14cf11af 475 case SYS_CTRLER_CUDA:
35499c01 476 cuda_shutdown();
14cf11af 477 break;
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478 case SYS_CTRLER_PMU:
479 pmu_shutdown();
480 break;
35499c01
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481 case SYS_CTRLER_SMU:
482 smu_shutdown();
483 break;
14cf11af
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484 default: ;
485 }
486}
487
488static void
489pmac_halt(void)
490{
491 pmac_power_off();
492}
493
35499c01
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494/*
495 * Early initialization.
496 */
497static void __init pmac_init_early(void)
498{
51d3082f
BH
499 /* Enable early btext debug if requested */
500 if (strstr(cmd_line, "btextdbg")) {
501 udbg_adb_init_early();
502 register_early_udbg_console();
35499c01
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503 }
504
51d3082f
BH
505 /* Probe motherboard chipset */
506 pmac_feature_init();
507
51d3082f
BH
508 /* Initialize debug stuff */
509 udbg_scc_init(!!strstr(cmd_line, "sccdbg"));
510 udbg_adb_init(!!strstr(cmd_line, "btextdbg"));
511
512#ifdef CONFIG_PPC64
1beb6a7d 513 iommu_init_early_dart();
35499c01
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514#endif
515}
516
35499c01 517static int __init pmac_declare_of_platform_devices(void)
14cf11af 518{
a28d3af2 519 struct device_node *np;
14cf11af 520
e8222502
BH
521 if (machine_is(chrp))
522 return -1;
523
730745a5 524 np = of_find_node_by_name(NULL, "valkyrie");
35499c01
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525 if (np)
526 of_platform_device_create(np, "valkyrie", NULL);
730745a5 527 np = of_find_node_by_name(NULL, "platinum");
35499c01
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528 if (np)
529 of_platform_device_create(np, "platinum", NULL);
35499c01
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530 np = of_find_node_by_type(NULL, "smu");
531 if (np) {
532 of_platform_device_create(np, "smu", NULL);
533 of_node_put(np);
534 }
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535
536 return 0;
537}
d518b717 538machine_device_initcall(powermac, pmac_declare_of_platform_devices);
35499c01 539
025d7917
BH
540#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
541/*
542 * This is called very early, as part of console_init() (typically just after
543 * time_init()). This function is respondible for trying to find a good
544 * default console on serial ports. It tries to match the open firmware
545 * default output with one of the available serial console drivers.
546 */
547static int __init check_pmac_serial_console(void)
548{
549 struct device_node *prom_stdout = NULL;
550 int offset = 0;
551 const char *name;
552#ifdef CONFIG_SERIAL_PMACZILOG_TTYS
553 char *devname = "ttyS";
554#else
555 char *devname = "ttyPZ";
556#endif
557
558 pr_debug(" -> check_pmac_serial_console()\n");
559
560 /* The user has requested a console so this is already set up. */
561 if (strstr(boot_command_line, "console=")) {
562 pr_debug(" console was specified !\n");
563 return -EBUSY;
564 }
565
566 if (!of_chosen) {
567 pr_debug(" of_chosen is NULL !\n");
568 return -ENODEV;
569 }
570
571 /* We are getting a weird phandle from OF ... */
572 /* ... So use the full path instead */
573 name = of_get_property(of_chosen, "linux,stdout-path", NULL);
574 if (name == NULL) {
575 pr_debug(" no linux,stdout-path !\n");
576 return -ENODEV;
577 }
578 prom_stdout = of_find_node_by_path(name);
579 if (!prom_stdout) {
580 pr_debug(" can't find stdout package %s !\n", name);
581 return -ENODEV;
582 }
583 pr_debug("stdout is %s\n", prom_stdout->full_name);
584
585 name = of_get_property(prom_stdout, "name", NULL);
586 if (!name) {
587 pr_debug(" stdout package has no name !\n");
588 goto not_found;
589 }
590
591 if (strcmp(name, "ch-a") == 0)
592 offset = 0;
593 else if (strcmp(name, "ch-b") == 0)
594 offset = 1;
595 else
596 goto not_found;
597 of_node_put(prom_stdout);
598
599 pr_debug("Found serial console at %s%d\n", devname, offset);
600
601 return add_preferred_console(devname, offset, NULL);
602
603 not_found:
604 pr_debug("No preferred console found !\n");
605 of_node_put(prom_stdout);
606 return -ENODEV;
607}
608console_initcall(check_pmac_serial_console);
609
610#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
611
35499c01
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612/*
613 * Called very early, MMU is off, device-tree isn't unflattened
614 */
e8222502 615static int __init pmac_probe(void)
35499c01 616{
e8222502
BH
617 unsigned long root = of_get_flat_dt_root();
618
619 if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
620 !of_flat_dt_is_compatible(root, "MacRISC"))
35499c01
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621 return 0;
622
e8222502 623#ifdef CONFIG_PPC64
35499c01
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624 /*
625 * On U3, the DART (iommu) must be allocated now since it
626 * has an impact on htab_initialize (due to the large page it
627 * occupies having to be broken up so the DART itself is not
628 * part of the cacheable linar mapping
629 */
1beb6a7d 630 alloc_dart_table();
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631
632 hpte_init_native();
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633#endif
634
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635#ifdef CONFIG_PPC32
636 /* isa_io_base gets set in pmac_pci_init */
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637 ISA_DMA_THRESHOLD = ~0L;
638 DMA_MODE_READ = 1;
639 DMA_MODE_WRITE = 2;
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640#endif /* CONFIG_PPC32 */
641
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642#ifdef CONFIG_PMAC_SMU
643 /*
644 * SMU based G5s need some memory below 2Gb, at least the current
645 * driver needs that. We have to allocate it now. We allocate 4k
646 * (1 small page) for now.
647 */
648 smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
649#endif /* CONFIG_PMAC_SMU */
650
651 return 1;
652}
653
654#ifdef CONFIG_PPC64
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655/* Move that to pci.c */
656static int pmac_pci_probe_mode(struct pci_bus *bus)
35499c01 657{
95272262 658 struct device_node *node = pci_bus_to_OF_node(bus);
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659
660 /* We need to use normal PCI probing for the AGP bus,
1beb6a7d 661 * since the device for the AGP bridge isn't in the tree.
444532d4 662 * Same for the PCIe host on U4 and the HT host bridge.
1beb6a7d 663 */
55b61fec 664 if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") ||
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665 of_device_is_compatible(node, "u4-pcie") ||
666 of_device_is_compatible(node, "u3-ht")))
35499c01 667 return PCI_PROBE_NORMAL;
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668 return PCI_PROBE_DEVTREE;
669}
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670
671#ifdef CONFIG_HOTPLUG_CPU
672/* access per cpu vars from generic smp.c */
673DECLARE_PER_CPU(int, cpu_state);
674
675static void pmac_cpu_die(void)
676{
677 /*
678 * turn off as much as possible, we'll be
679 * kicked out as this will only be invoked
680 * on core99 platforms for now ...
681 */
682
683 printk(KERN_INFO "CPU#%d offline\n", smp_processor_id());
684 __get_cpu_var(cpu_state) = CPU_DEAD;
685 smp_wmb();
686
687 /*
688 * during the path that leads here preemption is disabled,
689 * reenable it now so that when coming up preempt count is
690 * zero correctly
691 */
692 preempt_enable();
693
694 /*
695 * hard-disable interrupts for the non-NAP case, the NAP code
696 * needs to re-enable interrupts (but soft-disables them)
697 */
698 hard_irq_disable();
699
700 while (1) {
701 /* let's not take timer interrupts too often ... */
702 set_dec(0x7fffffff);
703
704 /* should always be true at this point */
705 if (cpu_has_feature(CPU_FTR_CAN_NAP))
706 power4_cpu_offline_powersave();
707 else {
708 HMT_low();
709 HMT_very_low();
710 }
711 }
712}
713#endif /* CONFIG_HOTPLUG_CPU */
714
715#endif /* CONFIG_PPC64 */
35499c01 716
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717define_machine(powermac) {
718 .name = "PowerMac",
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719 .probe = pmac_probe,
720 .setup_arch = pmac_setup_arch,
721 .init_early = pmac_init_early,
722 .show_cpuinfo = pmac_show_cpuinfo,
35499c01 723 .init_IRQ = pmac_pic_init,
cc5d0189 724 .get_irq = NULL, /* changed later */
f90bb153 725 .pci_irq_fixup = pmac_pci_irq_fixup,
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726 .restart = pmac_restart,
727 .power_off = pmac_power_off,
728 .halt = pmac_halt,
729 .time_init = pmac_time_init,
730 .get_boot_time = pmac_get_boot_time,
731 .set_rtc_time = pmac_set_rtc_time,
732 .get_rtc_time = pmac_get_rtc_time,
733 .calibrate_decr = pmac_calibrate_decr,
734 .feature_call = pmac_do_feature_call,
be6b8439 735 .progress = udbg_progress,
35499c01 736#ifdef CONFIG_PPC64
51d3082f 737 .pci_probe_mode = pmac_pci_probe_mode,
a0652fc9 738 .power_save = power4_idle,
35499c01 739 .enable_pmcs = power4_enable_pmcs,
3d1229d6 740#endif /* CONFIG_PPC64 */
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741#ifdef CONFIG_PPC32
742 .pcibios_enable_device_hook = pmac_pci_enable_device_hook,
743 .pcibios_after_init = pmac_pcibios_after_init,
744 .phys_mem_access_prot = pci_phys_mem_access_prot,
745#endif
e8222502 746#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
d9333afd 747 .cpu_die = pmac_cpu_die,
e8222502 748#endif
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749#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32)
750 .cpu_die = generic_mach_cpu_die,
751#endif
35499c01 752};
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