Commit | Line | Data |
---|---|---|
14cf11af | 1 | /* |
35499c01 | 2 | * Powermac setup and early boot code plus other random bits. |
14cf11af PM |
3 | * |
4 | * PowerPC version | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
6 | * | |
7 | * Adapted for Power Macintosh by Paul Mackerras | |
35499c01 | 8 | * Copyright (C) 1996 Paul Mackerras (paulus@samba.org) |
14cf11af PM |
9 | * |
10 | * Derived from "arch/alpha/kernel/setup.c" | |
11 | * Copyright (C) 1995 Linus Torvalds | |
12 | * | |
13 | * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org) | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License | |
17 | * as published by the Free Software Foundation; either version | |
18 | * 2 of the License, or (at your option) any later version. | |
19 | * | |
20 | */ | |
21 | ||
22 | /* | |
23 | * bootup setup stuff.. | |
24 | */ | |
25 | ||
26 | #include <linux/config.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/errno.h> | |
29 | #include <linux/sched.h> | |
30 | #include <linux/kernel.h> | |
31 | #include <linux/mm.h> | |
32 | #include <linux/stddef.h> | |
33 | #include <linux/unistd.h> | |
34 | #include <linux/ptrace.h> | |
35 | #include <linux/slab.h> | |
36 | #include <linux/user.h> | |
37 | #include <linux/a.out.h> | |
38 | #include <linux/tty.h> | |
39 | #include <linux/string.h> | |
40 | #include <linux/delay.h> | |
41 | #include <linux/ioport.h> | |
42 | #include <linux/major.h> | |
43 | #include <linux/initrd.h> | |
44 | #include <linux/vt_kern.h> | |
45 | #include <linux/console.h> | |
46 | #include <linux/ide.h> | |
47 | #include <linux/pci.h> | |
48 | #include <linux/adb.h> | |
49 | #include <linux/cuda.h> | |
50 | #include <linux/pmu.h> | |
51 | #include <linux/irq.h> | |
52 | #include <linux/seq_file.h> | |
53 | #include <linux/root_dev.h> | |
54 | #include <linux/bitops.h> | |
55 | #include <linux/suspend.h> | |
56 | ||
57 | #include <asm/reg.h> | |
58 | #include <asm/sections.h> | |
59 | #include <asm/prom.h> | |
60 | #include <asm/system.h> | |
61 | #include <asm/pgtable.h> | |
62 | #include <asm/io.h> | |
3d1229d6 | 63 | #include <asm/kexec.h> |
14cf11af PM |
64 | #include <asm/pci-bridge.h> |
65 | #include <asm/ohare.h> | |
66 | #include <asm/mediabay.h> | |
67 | #include <asm/machdep.h> | |
68 | #include <asm/dma.h> | |
14cf11af PM |
69 | #include <asm/cputable.h> |
70 | #include <asm/btext.h> | |
71 | #include <asm/pmac_feature.h> | |
72 | #include <asm/time.h> | |
73 | #include <asm/of_device.h> | |
74 | #include <asm/mmu_context.h> | |
35499c01 PM |
75 | #include <asm/iommu.h> |
76 | #include <asm/smu.h> | |
77 | #include <asm/pmc.h> | |
fbf1769d | 78 | #include <asm/lmb.h> |
51d3082f | 79 | #include <asm/udbg.h> |
14cf11af | 80 | |
3c3f42d6 | 81 | #include "pmac.h" |
14cf11af PM |
82 | |
83 | #undef SHOW_GATWICK_IRQS | |
84 | ||
14cf11af PM |
85 | unsigned char drive_info; |
86 | ||
87 | int ppc_override_l2cr = 0; | |
88 | int ppc_override_l2cr_value; | |
89 | int has_l2cache = 0; | |
90 | ||
9b6b563c PM |
91 | int pmac_newworld = 1; |
92 | ||
14cf11af PM |
93 | static int current_root_goodness = -1; |
94 | ||
95 | extern int pmac_newworld; | |
35499c01 | 96 | extern struct machdep_calls pmac_md; |
14cf11af PM |
97 | |
98 | #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */ | |
99 | ||
35499c01 PM |
100 | #ifdef CONFIG_PPC64 |
101 | #include <asm/udbg.h> | |
102 | int sccdbg; | |
14cf11af PM |
103 | #endif |
104 | ||
35499c01 PM |
105 | extern void zs_kgdb_hook(int tty_num); |
106 | ||
14cf11af | 107 | sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN; |
35499c01 PM |
108 | EXPORT_SYMBOL(sys_ctrler); |
109 | ||
110 | #ifdef CONFIG_PMAC_SMU | |
111 | unsigned long smu_cmdbuf_abs; | |
112 | EXPORT_SYMBOL(smu_cmdbuf_abs); | |
113 | #endif | |
14cf11af PM |
114 | |
115 | #ifdef CONFIG_SMP | |
116 | extern struct smp_ops_t psurge_smp_ops; | |
117 | extern struct smp_ops_t core99_smp_ops; | |
118 | #endif /* CONFIG_SMP */ | |
119 | ||
0dd194d0 | 120 | static void pmac_show_cpuinfo(struct seq_file *m) |
14cf11af PM |
121 | { |
122 | struct device_node *np; | |
123 | char *pp; | |
124 | int plen; | |
0dd194d0 PM |
125 | int mbmodel; |
126 | unsigned int mbflags; | |
14cf11af PM |
127 | char* mbname; |
128 | ||
0dd194d0 PM |
129 | mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, |
130 | PMAC_MB_INFO_MODEL, 0); | |
131 | mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, | |
132 | PMAC_MB_INFO_FLAGS, 0); | |
133 | if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME, | |
134 | (long) &mbname) != 0) | |
14cf11af PM |
135 | mbname = "Unknown"; |
136 | ||
137 | /* find motherboard type */ | |
138 | seq_printf(m, "machine\t\t: "); | |
0dd194d0 | 139 | np = of_find_node_by_path("/"); |
14cf11af PM |
140 | if (np != NULL) { |
141 | pp = (char *) get_property(np, "model", NULL); | |
142 | if (pp != NULL) | |
143 | seq_printf(m, "%s\n", pp); | |
144 | else | |
145 | seq_printf(m, "PowerMac\n"); | |
146 | pp = (char *) get_property(np, "compatible", &plen); | |
147 | if (pp != NULL) { | |
148 | seq_printf(m, "motherboard\t:"); | |
149 | while (plen > 0) { | |
150 | int l = strlen(pp) + 1; | |
151 | seq_printf(m, " %s", pp); | |
152 | plen -= l; | |
153 | pp += l; | |
154 | } | |
155 | seq_printf(m, "\n"); | |
156 | } | |
0dd194d0 | 157 | of_node_put(np); |
14cf11af PM |
158 | } else |
159 | seq_printf(m, "PowerMac\n"); | |
160 | ||
161 | /* print parsed model */ | |
162 | seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname); | |
163 | seq_printf(m, "pmac flags\t: %08x\n", mbflags); | |
164 | ||
165 | /* find l2 cache info */ | |
0dd194d0 PM |
166 | np = of_find_node_by_name(NULL, "l2-cache"); |
167 | if (np == NULL) | |
168 | np = of_find_node_by_type(NULL, "cache"); | |
169 | if (np != NULL) { | |
14cf11af PM |
170 | unsigned int *ic = (unsigned int *) |
171 | get_property(np, "i-cache-size", NULL); | |
172 | unsigned int *dc = (unsigned int *) | |
173 | get_property(np, "d-cache-size", NULL); | |
174 | seq_printf(m, "L2 cache\t:"); | |
175 | has_l2cache = 1; | |
176 | if (get_property(np, "cache-unified", NULL) != 0 && dc) { | |
177 | seq_printf(m, " %dK unified", *dc / 1024); | |
178 | } else { | |
179 | if (ic) | |
180 | seq_printf(m, " %dK instruction", *ic / 1024); | |
181 | if (dc) | |
182 | seq_printf(m, "%s %dK data", | |
183 | (ic? " +": ""), *dc / 1024); | |
184 | } | |
185 | pp = get_property(np, "ram-type", NULL); | |
186 | if (pp) | |
187 | seq_printf(m, " %s", pp); | |
188 | seq_printf(m, "\n"); | |
0dd194d0 | 189 | of_node_put(np); |
14cf11af PM |
190 | } |
191 | ||
192 | /* Indicate newworld/oldworld */ | |
193 | seq_printf(m, "pmac-generation\t: %s\n", | |
194 | pmac_newworld ? "NewWorld" : "OldWorld"); | |
14cf11af PM |
195 | } |
196 | ||
35499c01 PM |
197 | #ifndef CONFIG_ADB_CUDA |
198 | int find_via_cuda(void) | |
199 | { | |
200 | if (!find_devices("via-cuda")) | |
201 | return 0; | |
202 | printk("WARNING ! Your machine is CUDA-based but your kernel\n"); | |
203 | printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n"); | |
204 | return 0; | |
205 | } | |
206 | #endif | |
14cf11af | 207 | |
35499c01 PM |
208 | #ifndef CONFIG_ADB_PMU |
209 | int find_via_pmu(void) | |
14cf11af | 210 | { |
35499c01 PM |
211 | if (!find_devices("via-pmu")) |
212 | return 0; | |
213 | printk("WARNING ! Your machine is PMU-based but your kernel\n"); | |
214 | printk(" wasn't compiled with CONFIG_ADB_PMU option !\n"); | |
a575b807 | 215 | return 0; |
35499c01 PM |
216 | } |
217 | #endif | |
14cf11af | 218 | |
35499c01 PM |
219 | #ifndef CONFIG_PMAC_SMU |
220 | int smu_init(void) | |
221 | { | |
222 | /* should check and warn if SMU is present */ | |
223 | return 0; | |
224 | } | |
225 | #endif | |
14cf11af | 226 | |
35499c01 PM |
227 | #ifdef CONFIG_PPC32 |
228 | static volatile u32 *sysctrl_regs; | |
14cf11af | 229 | |
35499c01 PM |
230 | static void __init ohare_init(void) |
231 | { | |
14cf11af PM |
232 | /* this area has the CPU identification register |
233 | and some registers used by smp boards */ | |
234 | sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000); | |
14cf11af | 235 | |
35499c01 PM |
236 | /* |
237 | * Turn on the L2 cache. | |
238 | * We assume that we have a PSX memory controller iff | |
239 | * we have an ohare I/O controller. | |
240 | */ | |
241 | if (find_devices("ohare") != NULL) { | |
242 | if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) { | |
243 | if (sysctrl_regs[4] & 0x10) | |
244 | sysctrl_regs[4] |= 0x04000020; | |
245 | else | |
246 | sysctrl_regs[4] |= 0x04000000; | |
247 | if(has_l2cache) | |
248 | printk(KERN_INFO "Level 2 cache enabled\n"); | |
249 | } | |
250 | } | |
251 | } | |
14cf11af | 252 | |
35499c01 PM |
253 | static void __init l2cr_init(void) |
254 | { | |
14cf11af PM |
255 | /* Checks "l2cr-value" property in the registry */ |
256 | if (cpu_has_feature(CPU_FTR_L2CR)) { | |
257 | struct device_node *np = find_devices("cpus"); | |
258 | if (np == 0) | |
259 | np = find_type_devices("cpu"); | |
260 | if (np != 0) { | |
261 | unsigned int *l2cr = (unsigned int *) | |
262 | get_property(np, "l2cr-value", NULL); | |
263 | if (l2cr != 0) { | |
264 | ppc_override_l2cr = 1; | |
265 | ppc_override_l2cr_value = *l2cr; | |
266 | _set_L2CR(0); | |
267 | _set_L2CR(ppc_override_l2cr_value); | |
268 | } | |
269 | } | |
270 | } | |
271 | ||
272 | if (ppc_override_l2cr) | |
35499c01 PM |
273 | printk(KERN_INFO "L2CR overridden (0x%x), " |
274 | "backside cache is %s\n", | |
275 | ppc_override_l2cr_value, | |
276 | (ppc_override_l2cr_value & 0x80000000) | |
14cf11af | 277 | ? "enabled" : "disabled"); |
35499c01 PM |
278 | } |
279 | #endif | |
280 | ||
281 | void __init pmac_setup_arch(void) | |
282 | { | |
a575b807 | 283 | struct device_node *cpu, *ic; |
35499c01 PM |
284 | int *fp; |
285 | unsigned long pvr; | |
286 | ||
287 | pvr = PVR_VER(mfspr(SPRN_PVR)); | |
288 | ||
289 | /* Set loops_per_jiffy to a half-way reasonable value, | |
290 | for use until calibrate_delay gets called. */ | |
291 | loops_per_jiffy = 50000000 / HZ; | |
292 | cpu = of_find_node_by_type(NULL, "cpu"); | |
293 | if (cpu != NULL) { | |
294 | fp = (int *) get_property(cpu, "clock-frequency", NULL); | |
295 | if (fp != NULL) { | |
296 | if (pvr >= 0x30 && pvr < 0x80) | |
297 | /* PPC970 etc. */ | |
298 | loops_per_jiffy = *fp / (3 * HZ); | |
299 | else if (pvr == 4 || pvr >= 8) | |
300 | /* 604, G3, G4 etc. */ | |
301 | loops_per_jiffy = *fp / HZ; | |
302 | else | |
303 | /* 601, 603, etc. */ | |
304 | loops_per_jiffy = *fp / (2 * HZ); | |
305 | } | |
306 | of_node_put(cpu); | |
307 | } | |
308 | ||
a575b807 | 309 | /* See if newworld or oldworld */ |
bfab1019 PM |
310 | for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; ) |
311 | if (get_property(ic, "interrupt-controller", NULL)) | |
312 | break; | |
a575b807 PM |
313 | pmac_newworld = (ic != NULL); |
314 | if (ic) | |
315 | of_node_put(ic); | |
316 | ||
35499c01 PM |
317 | /* Lookup PCI hosts */ |
318 | pmac_pci_init(); | |
319 | ||
320 | #ifdef CONFIG_PPC32 | |
321 | ohare_init(); | |
322 | l2cr_init(); | |
323 | #endif /* CONFIG_PPC32 */ | |
324 | ||
14cf11af PM |
325 | #ifdef CONFIG_KGDB |
326 | zs_kgdb_hook(0); | |
327 | #endif | |
328 | ||
14cf11af | 329 | find_via_cuda(); |
14cf11af | 330 | find_via_pmu(); |
35499c01 PM |
331 | smu_init(); |
332 | ||
91c33d28 | 333 | #if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64) |
14cf11af PM |
334 | pmac_nvram_init(); |
335 | #endif | |
35499c01 PM |
336 | |
337 | #ifdef CONFIG_PPC32 | |
14cf11af PM |
338 | #ifdef CONFIG_BLK_DEV_INITRD |
339 | if (initrd_start) | |
340 | ROOT_DEV = Root_RAM0; | |
341 | else | |
342 | #endif | |
343 | ROOT_DEV = DEFAULT_ROOT_DEVICE; | |
35499c01 | 344 | #endif |
14cf11af PM |
345 | |
346 | #ifdef CONFIG_SMP | |
347 | /* Check for Core99 */ | |
1beb6a7d | 348 | if (find_devices("uni-n") || find_devices("u3") || find_devices("u4")) |
7ed476d1 | 349 | smp_ops = &core99_smp_ops; |
35499c01 | 350 | #ifdef CONFIG_PPC32 |
14cf11af | 351 | else |
7ed476d1 | 352 | smp_ops = &psurge_smp_ops; |
35499c01 | 353 | #endif |
14cf11af | 354 | #endif /* CONFIG_SMP */ |
14cf11af PM |
355 | } |
356 | ||
9b6b563c PM |
357 | char *bootpath; |
358 | char *bootdevice; | |
14cf11af PM |
359 | void *boot_host; |
360 | int boot_target; | |
361 | int boot_part; | |
362 | extern dev_t boot_dev; | |
363 | ||
364 | #ifdef CONFIG_SCSI | |
35499c01 | 365 | void __init note_scsi_host(struct device_node *node, void *host) |
14cf11af PM |
366 | { |
367 | int l; | |
368 | char *p; | |
369 | ||
370 | l = strlen(node->full_name); | |
371 | if (bootpath != NULL && bootdevice != NULL | |
372 | && strncmp(node->full_name, bootdevice, l) == 0 | |
373 | && (bootdevice[l] == '/' || bootdevice[l] == 0)) { | |
374 | boot_host = host; | |
375 | /* | |
376 | * There's a bug in OF 1.0.5. (Why am I not surprised.) | |
377 | * If you pass a path like scsi/sd@1:0 to canon, it returns | |
378 | * something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0 | |
379 | * That is, the scsi target number doesn't get preserved. | |
380 | * So we pick the target number out of bootpath and use that. | |
381 | */ | |
382 | p = strstr(bootpath, "/sd@"); | |
383 | if (p != NULL) { | |
384 | p += 4; | |
385 | boot_target = simple_strtoul(p, NULL, 10); | |
386 | p = strchr(p, ':'); | |
387 | if (p != NULL) | |
388 | boot_part = simple_strtoul(p + 1, NULL, 10); | |
389 | } | |
390 | } | |
391 | } | |
9b6b563c | 392 | EXPORT_SYMBOL(note_scsi_host); |
14cf11af PM |
393 | #endif |
394 | ||
395 | #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) | |
35499c01 | 396 | static dev_t __init find_ide_boot(void) |
14cf11af PM |
397 | { |
398 | char *p; | |
399 | int n; | |
400 | dev_t __init pmac_find_ide_boot(char *bootdevice, int n); | |
401 | ||
402 | if (bootdevice == NULL) | |
403 | return 0; | |
404 | p = strrchr(bootdevice, '/'); | |
405 | if (p == NULL) | |
406 | return 0; | |
407 | n = p - bootdevice; | |
408 | ||
409 | return pmac_find_ide_boot(bootdevice, n); | |
410 | } | |
411 | #endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */ | |
412 | ||
35499c01 | 413 | static void __init find_boot_device(void) |
14cf11af PM |
414 | { |
415 | #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) | |
416 | boot_dev = find_ide_boot(); | |
417 | #endif | |
418 | } | |
419 | ||
14cf11af PM |
420 | /* TODO: Merge the suspend-to-ram with the common code !!! |
421 | * currently, this is a stub implementation for suspend-to-disk | |
422 | * only | |
423 | */ | |
424 | ||
425 | #ifdef CONFIG_SOFTWARE_SUSPEND | |
426 | ||
427 | static int pmac_pm_prepare(suspend_state_t state) | |
428 | { | |
429 | printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); | |
430 | ||
431 | return 0; | |
432 | } | |
433 | ||
434 | static int pmac_pm_enter(suspend_state_t state) | |
435 | { | |
436 | printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); | |
437 | ||
438 | /* Giveup the lazy FPU & vec so we don't have to back them | |
439 | * up from the low level code | |
440 | */ | |
441 | enable_kernel_fp(); | |
442 | ||
443 | #ifdef CONFIG_ALTIVEC | |
400d2212 | 444 | if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC) |
14cf11af PM |
445 | enable_kernel_altivec(); |
446 | #endif /* CONFIG_ALTIVEC */ | |
447 | ||
448 | return 0; | |
449 | } | |
450 | ||
451 | static int pmac_pm_finish(suspend_state_t state) | |
452 | { | |
453 | printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); | |
454 | ||
455 | /* Restore userland MMU context */ | |
456 | set_context(current->active_mm->context, current->active_mm->pgd); | |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
461 | static struct pm_ops pmac_pm_ops = { | |
462 | .pm_disk_mode = PM_DISK_SHUTDOWN, | |
463 | .prepare = pmac_pm_prepare, | |
464 | .enter = pmac_pm_enter, | |
465 | .finish = pmac_pm_finish, | |
466 | }; | |
467 | ||
468 | #endif /* CONFIG_SOFTWARE_SUSPEND */ | |
469 | ||
35499c01 PM |
470 | static int initializing = 1; |
471 | ||
14cf11af PM |
472 | static int pmac_late_init(void) |
473 | { | |
474 | initializing = 0; | |
475 | #ifdef CONFIG_SOFTWARE_SUSPEND | |
476 | pm_set_ops(&pmac_pm_ops); | |
477 | #endif /* CONFIG_SOFTWARE_SUSPEND */ | |
478 | return 0; | |
479 | } | |
480 | ||
481 | late_initcall(pmac_late_init); | |
482 | ||
483 | /* can't be __init - can be called whenever a disk is first accessed */ | |
35499c01 | 484 | void note_bootable_part(dev_t dev, int part, int goodness) |
14cf11af PM |
485 | { |
486 | static int found_boot = 0; | |
487 | char *p; | |
488 | ||
489 | if (!initializing) | |
490 | return; | |
491 | if ((goodness <= current_root_goodness) && | |
492 | ROOT_DEV != DEFAULT_ROOT_DEVICE) | |
493 | return; | |
494 | p = strstr(saved_command_line, "root="); | |
495 | if (p != NULL && (p == saved_command_line || p[-1] == ' ')) | |
496 | return; | |
497 | ||
498 | if (!found_boot) { | |
499 | find_boot_device(); | |
500 | found_boot = 1; | |
501 | } | |
502 | if (!boot_dev || dev == boot_dev) { | |
503 | ROOT_DEV = dev + part; | |
504 | boot_dev = 0; | |
505 | current_root_goodness = goodness; | |
506 | } | |
507 | } | |
508 | ||
14cf11af | 509 | #ifdef CONFIG_ADB_CUDA |
35499c01 PM |
510 | static void cuda_restart(void) |
511 | { | |
14cf11af | 512 | struct adb_request req; |
14cf11af | 513 | |
35499c01 PM |
514 | cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM); |
515 | for (;;) | |
516 | cuda_poll(); | |
517 | } | |
518 | ||
519 | static void cuda_shutdown(void) | |
520 | { | |
521 | struct adb_request req; | |
522 | ||
523 | cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN); | |
524 | for (;;) | |
525 | cuda_poll(); | |
526 | } | |
527 | ||
528 | #else | |
529 | #define cuda_restart() | |
530 | #define cuda_shutdown() | |
531 | #endif | |
532 | ||
533 | #ifndef CONFIG_ADB_PMU | |
534 | #define pmu_restart() | |
535 | #define pmu_shutdown() | |
536 | #endif | |
537 | ||
538 | #ifndef CONFIG_PMAC_SMU | |
539 | #define smu_restart() | |
540 | #define smu_shutdown() | |
541 | #endif | |
542 | ||
543 | static void pmac_restart(char *cmd) | |
544 | { | |
14cf11af | 545 | switch (sys_ctrler) { |
14cf11af | 546 | case SYS_CTRLER_CUDA: |
35499c01 | 547 | cuda_restart(); |
14cf11af | 548 | break; |
14cf11af PM |
549 | case SYS_CTRLER_PMU: |
550 | pmu_restart(); | |
551 | break; | |
35499c01 PM |
552 | case SYS_CTRLER_SMU: |
553 | smu_restart(); | |
554 | break; | |
14cf11af PM |
555 | default: ; |
556 | } | |
557 | } | |
558 | ||
35499c01 | 559 | static void pmac_power_off(void) |
14cf11af | 560 | { |
14cf11af | 561 | switch (sys_ctrler) { |
14cf11af | 562 | case SYS_CTRLER_CUDA: |
35499c01 | 563 | cuda_shutdown(); |
14cf11af | 564 | break; |
14cf11af PM |
565 | case SYS_CTRLER_PMU: |
566 | pmu_shutdown(); | |
567 | break; | |
35499c01 PM |
568 | case SYS_CTRLER_SMU: |
569 | smu_shutdown(); | |
570 | break; | |
14cf11af PM |
571 | default: ; |
572 | } | |
573 | } | |
574 | ||
575 | static void | |
576 | pmac_halt(void) | |
577 | { | |
578 | pmac_power_off(); | |
579 | } | |
580 | ||
35499c01 | 581 | #ifdef CONFIG_PPC32 |
9b6b563c | 582 | void __init pmac_init(void) |
14cf11af | 583 | { |
35499c01 | 584 | /* isa_io_base gets set in pmac_pci_init */ |
14cf11af PM |
585 | isa_mem_base = PMAC_ISA_MEM_BASE; |
586 | pci_dram_offset = PMAC_PCI_DRAM_OFFSET; | |
587 | ISA_DMA_THRESHOLD = ~0L; | |
588 | DMA_MODE_READ = 1; | |
589 | DMA_MODE_WRITE = 2; | |
590 | ||
35499c01 | 591 | ppc_md = pmac_md; |
14cf11af PM |
592 | |
593 | #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) | |
594 | #ifdef CONFIG_BLK_DEV_IDE_PMAC | |
595 | ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports; | |
596 | ppc_ide_md.default_io_base = pmac_ide_get_base; | |
597 | #endif /* CONFIG_BLK_DEV_IDE_PMAC */ | |
598 | #endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */ | |
599 | ||
14cf11af PM |
600 | if (ppc_md.progress) ppc_md.progress("pmac_init(): exit", 0); |
601 | ||
602 | } | |
35499c01 | 603 | #endif |
14cf11af | 604 | |
35499c01 PM |
605 | /* |
606 | * Early initialization. | |
607 | */ | |
608 | static void __init pmac_init_early(void) | |
609 | { | |
610 | #ifdef CONFIG_PPC64 | |
611 | /* Initialize hash table, from now on, we can take hash faults | |
612 | * and call ioremap | |
613 | */ | |
614 | hpte_init_native(); | |
51d3082f | 615 | #endif |
35499c01 | 616 | |
51d3082f BH |
617 | /* Enable early btext debug if requested */ |
618 | if (strstr(cmd_line, "btextdbg")) { | |
619 | udbg_adb_init_early(); | |
620 | register_early_udbg_console(); | |
35499c01 PM |
621 | } |
622 | ||
51d3082f BH |
623 | /* Probe motherboard chipset */ |
624 | pmac_feature_init(); | |
625 | ||
626 | /* We can NAP */ | |
627 | powersave_nap = 1; | |
628 | printk(KERN_INFO "Using native/NAP idle loop\n"); | |
629 | ||
630 | /* Initialize debug stuff */ | |
631 | udbg_scc_init(!!strstr(cmd_line, "sccdbg")); | |
632 | udbg_adb_init(!!strstr(cmd_line, "btextdbg")); | |
633 | ||
634 | #ifdef CONFIG_PPC64 | |
35499c01 PM |
635 | /* Setup interrupt mapping options */ |
636 | ppc64_interrupt_controller = IC_OPEN_PIC; | |
637 | ||
1beb6a7d | 638 | iommu_init_early_dart(); |
35499c01 PM |
639 | #endif |
640 | } | |
641 | ||
35499c01 PM |
642 | /* |
643 | * pmac has no legacy IO, anything calling this function has to | |
644 | * fail or bad things will happen | |
645 | */ | |
646 | static int pmac_check_legacy_ioport(unsigned int baseport) | |
647 | { | |
648 | return -ENODEV; | |
649 | } | |
650 | ||
651 | static int __init pmac_declare_of_platform_devices(void) | |
14cf11af | 652 | { |
a28d3af2 | 653 | struct device_node *np; |
14cf11af | 654 | |
730745a5 | 655 | np = of_find_node_by_name(NULL, "valkyrie"); |
35499c01 PM |
656 | if (np) |
657 | of_platform_device_create(np, "valkyrie", NULL); | |
730745a5 | 658 | np = of_find_node_by_name(NULL, "platinum"); |
35499c01 PM |
659 | if (np) |
660 | of_platform_device_create(np, "platinum", NULL); | |
35499c01 PM |
661 | np = of_find_node_by_type(NULL, "smu"); |
662 | if (np) { | |
663 | of_platform_device_create(np, "smu", NULL); | |
664 | of_node_put(np); | |
665 | } | |
14cf11af PM |
666 | |
667 | return 0; | |
668 | } | |
669 | ||
670 | device_initcall(pmac_declare_of_platform_devices); | |
35499c01 PM |
671 | |
672 | /* | |
673 | * Called very early, MMU is off, device-tree isn't unflattened | |
674 | */ | |
675 | static int __init pmac_probe(int platform) | |
676 | { | |
677 | #ifdef CONFIG_PPC64 | |
678 | if (platform != PLATFORM_POWERMAC) | |
679 | return 0; | |
680 | ||
681 | /* | |
682 | * On U3, the DART (iommu) must be allocated now since it | |
683 | * has an impact on htab_initialize (due to the large page it | |
684 | * occupies having to be broken up so the DART itself is not | |
685 | * part of the cacheable linar mapping | |
686 | */ | |
1beb6a7d | 687 | alloc_dart_table(); |
35499c01 PM |
688 | #endif |
689 | ||
690 | #ifdef CONFIG_PMAC_SMU | |
691 | /* | |
692 | * SMU based G5s need some memory below 2Gb, at least the current | |
693 | * driver needs that. We have to allocate it now. We allocate 4k | |
694 | * (1 small page) for now. | |
695 | */ | |
696 | smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL); | |
697 | #endif /* CONFIG_PMAC_SMU */ | |
698 | ||
699 | return 1; | |
700 | } | |
701 | ||
702 | #ifdef CONFIG_PPC64 | |
51d3082f BH |
703 | /* Move that to pci.c */ |
704 | static int pmac_pci_probe_mode(struct pci_bus *bus) | |
35499c01 PM |
705 | { |
706 | struct device_node *node = bus->sysdata; | |
707 | ||
708 | /* We need to use normal PCI probing for the AGP bus, | |
1beb6a7d BH |
709 | * since the device for the AGP bridge isn't in the tree. |
710 | */ | |
711 | if (bus->self == NULL && (device_is_compatible(node, "u3-agp") || | |
712 | device_is_compatible(node, "u4-pcie"))) | |
35499c01 | 713 | return PCI_PROBE_NORMAL; |
35499c01 PM |
714 | return PCI_PROBE_DEVTREE; |
715 | } | |
716 | #endif | |
717 | ||
718 | struct machdep_calls __initdata pmac_md = { | |
719 | #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) | |
720 | .cpu_die = generic_mach_cpu_die, | |
721 | #endif | |
722 | .probe = pmac_probe, | |
723 | .setup_arch = pmac_setup_arch, | |
724 | .init_early = pmac_init_early, | |
725 | .show_cpuinfo = pmac_show_cpuinfo, | |
35499c01 | 726 | .init_IRQ = pmac_pic_init, |
cc5d0189 | 727 | .get_irq = NULL, /* changed later */ |
35499c01 PM |
728 | .pcibios_fixup = pmac_pcibios_fixup, |
729 | .restart = pmac_restart, | |
730 | .power_off = pmac_power_off, | |
731 | .halt = pmac_halt, | |
732 | .time_init = pmac_time_init, | |
733 | .get_boot_time = pmac_get_boot_time, | |
734 | .set_rtc_time = pmac_set_rtc_time, | |
735 | .get_rtc_time = pmac_get_rtc_time, | |
736 | .calibrate_decr = pmac_calibrate_decr, | |
737 | .feature_call = pmac_do_feature_call, | |
738 | .check_legacy_ioport = pmac_check_legacy_ioport, | |
be6b8439 | 739 | .progress = udbg_progress, |
35499c01 | 740 | #ifdef CONFIG_PPC64 |
51d3082f | 741 | .pci_probe_mode = pmac_pci_probe_mode, |
35499c01 PM |
742 | .idle_loop = native_idle, |
743 | .enable_pmcs = power4_enable_pmcs, | |
3d1229d6 ME |
744 | #ifdef CONFIG_KEXEC |
745 | .machine_kexec = default_machine_kexec, | |
746 | .machine_kexec_prepare = default_machine_kexec_prepare, | |
cc532915 | 747 | .machine_crash_shutdown = default_machine_crash_shutdown, |
35499c01 | 748 | #endif |
3d1229d6 | 749 | #endif /* CONFIG_PPC64 */ |
35499c01 PM |
750 | #ifdef CONFIG_PPC32 |
751 | .pcibios_enable_device_hook = pmac_pci_enable_device_hook, | |
752 | .pcibios_after_init = pmac_pcibios_after_init, | |
753 | .phys_mem_access_prot = pci_phys_mem_access_prot, | |
754 | #endif | |
755 | }; |