Merge tag 'spi-v3.15-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
[deliverable/linux.git] / arch / powerpc / platforms / ps3 / mm.c
CommitLineData
f58a9d17
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1/*
2 * PS3 address space management.
3 *
4 * Copyright (C) 2006 Sony Computer Entertainment Inc.
5 * Copyright 2006 Sony Corp.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/kernel.h>
4b16f8e2 22#include <linux/export.h>
95f72d1e 23#include <linux/memblock.h>
5a0e3ad6 24#include <linux/slab.h>
f58a9d17 25
9413c883 26#include <asm/cell-regs.h>
e22ba7e3 27#include <asm/firmware.h>
d9b2b2a2 28#include <asm/prom.h>
f58a9d17 29#include <asm/udbg.h>
f58a9d17 30#include <asm/lv1call.h>
ae3a197e 31#include <asm/setup.h>
f58a9d17
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32
33#include "platform.h"
34
35#if defined(DEBUG)
83bb643d 36#define DBG udbg_printf
f58a9d17 37#else
7424639a 38#define DBG pr_devel
f58a9d17
GL
39#endif
40
41enum {
f58a9d17
GL
42#if defined(CONFIG_PS3_DYNAMIC_DMA)
43 USE_DYNAMIC_DMA = 1,
44#else
45 USE_DYNAMIC_DMA = 0,
46#endif
47};
48
49enum {
50 PAGE_SHIFT_4K = 12U,
51 PAGE_SHIFT_64K = 16U,
52 PAGE_SHIFT_16M = 24U,
53};
54
55static unsigned long make_page_sizes(unsigned long a, unsigned long b)
56{
57 return (a << 56) | (b << 48);
58}
59
60enum {
61 ALLOCATE_MEMORY_TRY_ALT_UNIT = 0X04,
62 ALLOCATE_MEMORY_ADDR_ZERO = 0X08,
63};
64
65/* valid htab sizes are {18,19,20} = 256K, 512K, 1M */
66
67enum {
68 HTAB_SIZE_MAX = 20U, /* HV limit of 1MB */
69 HTAB_SIZE_MIN = 18U, /* CPU limit of 256KB */
70};
71
72/*============================================================================*/
73/* virtual address space routines */
74/*============================================================================*/
75
76/**
77 * struct mem_region - memory region structure
78 * @base: base address
79 * @size: size in bytes
80 * @offset: difference between base and rm.size
1e755c09 81 * @destroy: flag if region should be destroyed upon shutdown
f58a9d17
GL
82 */
83
84struct mem_region {
b17b3df1 85 u64 base;
5418b9c6 86 u64 size;
f58a9d17 87 unsigned long offset;
1e755c09 88 int destroy;
f58a9d17
GL
89};
90
91/**
92 * struct map - address space state variables holder
93 * @total: total memory available as reported by HV
94 * @vas_id - HV virtual address space id
95 * @htab_size: htab size in bytes
96 *
97 * The HV virtual address space (vas) allows for hotplug memory regions.
98 * Memory regions can be created and destroyed in the vas at runtime.
99 * @rm: real mode (bootmem) region
8ac5fd11 100 * @r1: highmem region(s)
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101 *
102 * ps3 addresses
103 * virt_addr: a cpu 'translated' effective address
104 * phys_addr: an address in what Linux thinks is the physical address space
105 * lpar_addr: an address in the HV virtual address space
106 * bus_addr: an io controller 'translated' address on a device bus
107 */
108
109struct map {
5418b9c6 110 u64 total;
b17b3df1
SR
111 u64 vas_id;
112 u64 htab_size;
f58a9d17
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113 struct mem_region rm;
114 struct mem_region r1;
115};
116
117#define debug_dump_map(x) _debug_dump_map(x, __func__, __LINE__)
6bb5cf10
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118static void __maybe_unused _debug_dump_map(const struct map *m,
119 const char *func, int line)
f58a9d17 120{
5418b9c6
SR
121 DBG("%s:%d: map.total = %llxh\n", func, line, m->total);
122 DBG("%s:%d: map.rm.size = %llxh\n", func, line, m->rm.size);
b17b3df1
SR
123 DBG("%s:%d: map.vas_id = %llu\n", func, line, m->vas_id);
124 DBG("%s:%d: map.htab_size = %llxh\n", func, line, m->htab_size);
125 DBG("%s:%d: map.r1.base = %llxh\n", func, line, m->r1.base);
f58a9d17 126 DBG("%s:%d: map.r1.offset = %lxh\n", func, line, m->r1.offset);
5418b9c6 127 DBG("%s:%d: map.r1.size = %llxh\n", func, line, m->r1.size);
f58a9d17
GL
128}
129
130static struct map map;
131
132/**
133 * ps3_mm_phys_to_lpar - translate a linux physical address to lpar address
134 * @phys_addr: linux physical address
135 */
136
137unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr)
138{
139 BUG_ON(is_kernel_addr(phys_addr));
a628df1e
GL
140 return (phys_addr < map.rm.size || phys_addr >= map.total)
141 ? phys_addr : phys_addr + map.r1.offset;
f58a9d17
GL
142}
143
144EXPORT_SYMBOL(ps3_mm_phys_to_lpar);
145
146/**
147 * ps3_mm_vas_create - create the virtual address space
148 */
149
150void __init ps3_mm_vas_create(unsigned long* htab_size)
151{
152 int result;
b17b3df1
SR
153 u64 start_address;
154 u64 size;
155 u64 access_right;
156 u64 max_page_size;
157 u64 flags;
f58a9d17
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158
159 result = lv1_query_logical_partition_address_region_info(0,
160 &start_address, &size, &access_right, &max_page_size,
161 &flags);
162
163 if (result) {
164 DBG("%s:%d: lv1_query_logical_partition_address_region_info "
165 "failed: %s\n", __func__, __LINE__,
166 ps3_result(result));
167 goto fail;
168 }
169
170 if (max_page_size < PAGE_SHIFT_16M) {
b17b3df1 171 DBG("%s:%d: bad max_page_size %llxh\n", __func__, __LINE__,
f58a9d17
GL
172 max_page_size);
173 goto fail;
174 }
175
176 BUILD_BUG_ON(CONFIG_PS3_HTAB_SIZE > HTAB_SIZE_MAX);
177 BUILD_BUG_ON(CONFIG_PS3_HTAB_SIZE < HTAB_SIZE_MIN);
178
179 result = lv1_construct_virtual_address_space(CONFIG_PS3_HTAB_SIZE,
180 2, make_page_sizes(PAGE_SHIFT_16M, PAGE_SHIFT_64K),
181 &map.vas_id, &map.htab_size);
182
183 if (result) {
184 DBG("%s:%d: lv1_construct_virtual_address_space failed: %s\n",
185 __func__, __LINE__, ps3_result(result));
186 goto fail;
187 }
188
189 result = lv1_select_virtual_address_space(map.vas_id);
190
191 if (result) {
192 DBG("%s:%d: lv1_select_virtual_address_space failed: %s\n",
193 __func__, __LINE__, ps3_result(result));
194 goto fail;
195 }
196
197 *htab_size = map.htab_size;
198
199 debug_dump_map(&map);
200
201 return;
202
203fail:
204 panic("ps3_mm_vas_create failed");
205}
206
207/**
208 * ps3_mm_vas_destroy -
209 */
210
211void ps3_mm_vas_destroy(void)
212{
6bb5cf10
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213 int result;
214
b17b3df1 215 DBG("%s:%d: map.vas_id = %llu\n", __func__, __LINE__, map.vas_id);
6bb5cf10 216
f58a9d17 217 if (map.vas_id) {
6bb5cf10
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218 result = lv1_select_virtual_address_space(0);
219 BUG_ON(result);
220 result = lv1_destruct_virtual_address_space(map.vas_id);
221 BUG_ON(result);
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222 map.vas_id = 0;
223 }
224}
225
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226/**
227 * ps3_mm_region_create - create a memory region in the vas
228 * @r: pointer to a struct mem_region to accept initialized values
229 * @size: requested region size
230 *
231 * This implementation creates the region with the vas large page size.
232 * @size is rounded down to a multiple of the vas large page size.
233 */
234
32f44a12 235static int ps3_mm_region_create(struct mem_region *r, unsigned long size)
f58a9d17
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236{
237 int result;
b17b3df1 238 u64 muid;
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239
240 r->size = _ALIGN_DOWN(size, 1 << PAGE_SHIFT_16M);
241
242 DBG("%s:%d requested %lxh\n", __func__, __LINE__, size);
5418b9c6
SR
243 DBG("%s:%d actual %llxh\n", __func__, __LINE__, r->size);
244 DBG("%s:%d difference %llxh (%lluMB)\n", __func__, __LINE__,
245 size - r->size, (size - r->size) / 1024 / 1024);
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246
247 if (r->size == 0) {
248 DBG("%s:%d: size == 0\n", __func__, __LINE__);
249 result = -1;
250 goto zero_region;
251 }
252
253 result = lv1_allocate_memory(r->size, PAGE_SHIFT_16M, 0,
254 ALLOCATE_MEMORY_TRY_ALT_UNIT, &r->base, &muid);
255
256 if (result || r->base < map.rm.size) {
257 DBG("%s:%d: lv1_allocate_memory failed: %s\n",
258 __func__, __LINE__, ps3_result(result));
259 goto zero_region;
260 }
261
1e755c09 262 r->destroy = 1;
f58a9d17
GL
263 r->offset = r->base - map.rm.size;
264 return result;
265
266zero_region:
267 r->size = r->base = r->offset = 0;
268 return result;
269}
270
271/**
272 * ps3_mm_region_destroy - destroy a memory region
273 * @r: pointer to struct mem_region
274 */
275
32f44a12 276static void ps3_mm_region_destroy(struct mem_region *r)
f58a9d17 277{
6bb5cf10
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278 int result;
279
1e755c09
AH
280 if (!r->destroy) {
281 pr_info("%s:%d: Not destroying high region: %llxh %llxh\n",
282 __func__, __LINE__, r->base, r->size);
283 return;
284 }
285
b17b3df1 286 DBG("%s:%d: r->base = %llxh\n", __func__, __LINE__, r->base);
1e755c09 287
f58a9d17 288 if (r->base) {
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289 result = lv1_release_memory(r->base);
290 BUG_ON(result);
f58a9d17
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291 r->size = r->base = r->offset = 0;
292 map.total = map.rm.size;
293 }
294}
295
1e755c09
AH
296static int ps3_mm_get_repository_highmem(struct mem_region *r)
297{
298 int result;
299
300 /* Assume a single highmem region. */
301
302 result = ps3_repository_read_highmem_info(0, &r->base, &r->size);
303
304 if (result)
305 goto zero_region;
306
307 if (!r->base || !r->size) {
308 result = -1;
309 goto zero_region;
310 }
311
312 r->offset = r->base - map.rm.size;
313
314 DBG("%s:%d: Found high region in repository: %llxh %llxh\n",
315 __func__, __LINE__, r->base, r->size);
316
317 return 0;
318
319zero_region:
320 DBG("%s:%d: No high region in repository.\n", __func__, __LINE__);
321
322 r->size = r->base = r->offset = 0;
323 return result;
324}
325
f58a9d17
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326/*============================================================================*/
327/* dma routines */
328/*============================================================================*/
329
330/**
6bb5cf10 331 * dma_sb_lpar_to_bus - Translate an lpar address to ioc mapped bus address.
f58a9d17
GL
332 * @r: pointer to dma region structure
333 * @lpar_addr: HV lpar address
334 */
335
6bb5cf10 336static unsigned long dma_sb_lpar_to_bus(struct ps3_dma_region *r,
f58a9d17
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337 unsigned long lpar_addr)
338{
6bb5cf10
GL
339 if (lpar_addr >= map.rm.size)
340 lpar_addr -= map.r1.offset;
341 BUG_ON(lpar_addr < r->offset);
342 BUG_ON(lpar_addr >= r->offset + r->len);
343 return r->bus_addr + lpar_addr - r->offset;
f58a9d17
GL
344}
345
346#define dma_dump_region(_a) _dma_dump_region(_a, __func__, __LINE__)
6bb5cf10
GL
347static void __maybe_unused _dma_dump_region(const struct ps3_dma_region *r,
348 const char *func, int line)
f58a9d17 349{
5c949070 350 DBG("%s:%d: dev %llu:%llu\n", func, line, r->dev->bus_id,
6bb5cf10 351 r->dev->dev_id);
f58a9d17
GL
352 DBG("%s:%d: page_size %u\n", func, line, r->page_size);
353 DBG("%s:%d: bus_addr %lxh\n", func, line, r->bus_addr);
354 DBG("%s:%d: len %lxh\n", func, line, r->len);
6bb5cf10 355 DBG("%s:%d: offset %lxh\n", func, line, r->offset);
f58a9d17
GL
356}
357
6bb5cf10 358 /**
f58a9d17
GL
359 * dma_chunk - A chunk of dma pages mapped by the io controller.
360 * @region - The dma region that owns this chunk.
361 * @lpar_addr: Starting lpar address of the area to map.
362 * @bus_addr: Starting ioc bus address of the area to map.
363 * @len: Length in bytes of the area to map.
364 * @link: A struct list_head used with struct ps3_dma_region.chunk_list, the
365 * list of all chuncks owned by the region.
366 *
367 * This implementation uses a very simple dma page manager
368 * based on the dma_chunk structure. This scheme assumes
369 * that all drivers use very well behaved dma ops.
370 */
371
372struct dma_chunk {
373 struct ps3_dma_region *region;
374 unsigned long lpar_addr;
375 unsigned long bus_addr;
376 unsigned long len;
377 struct list_head link;
378 unsigned int usage_count;
379};
380
381#define dma_dump_chunk(_a) _dma_dump_chunk(_a, __func__, __LINE__)
382static void _dma_dump_chunk (const struct dma_chunk* c, const char* func,
383 int line)
384{
5c949070 385 DBG("%s:%d: r.dev %llu:%llu\n", func, line,
6bb5cf10 386 c->region->dev->bus_id, c->region->dev->dev_id);
f58a9d17
GL
387 DBG("%s:%d: r.bus_addr %lxh\n", func, line, c->region->bus_addr);
388 DBG("%s:%d: r.page_size %u\n", func, line, c->region->page_size);
389 DBG("%s:%d: r.len %lxh\n", func, line, c->region->len);
6bb5cf10 390 DBG("%s:%d: r.offset %lxh\n", func, line, c->region->offset);
f58a9d17
GL
391 DBG("%s:%d: c.lpar_addr %lxh\n", func, line, c->lpar_addr);
392 DBG("%s:%d: c.bus_addr %lxh\n", func, line, c->bus_addr);
393 DBG("%s:%d: c.len %lxh\n", func, line, c->len);
394}
395
396static struct dma_chunk * dma_find_chunk(struct ps3_dma_region *r,
397 unsigned long bus_addr, unsigned long len)
398{
399 struct dma_chunk *c;
400 unsigned long aligned_bus = _ALIGN_DOWN(bus_addr, 1 << r->page_size);
6bb5cf10
GL
401 unsigned long aligned_len = _ALIGN_UP(len+bus_addr-aligned_bus,
402 1 << r->page_size);
f58a9d17
GL
403
404 list_for_each_entry(c, &r->chunk_list.head, link) {
405 /* intersection */
6bb5cf10
GL
406 if (aligned_bus >= c->bus_addr &&
407 aligned_bus + aligned_len <= c->bus_addr + c->len)
f58a9d17 408 return c;
6bb5cf10 409
f58a9d17 410 /* below */
6bb5cf10 411 if (aligned_bus + aligned_len <= c->bus_addr)
f58a9d17 412 continue;
6bb5cf10 413
f58a9d17 414 /* above */
6bb5cf10 415 if (aligned_bus >= c->bus_addr + c->len)
f58a9d17 416 continue;
f58a9d17
GL
417
418 /* we don't handle the multi-chunk case for now */
f58a9d17
GL
419 dma_dump_chunk(c);
420 BUG();
421 }
422 return NULL;
423}
424
6bb5cf10
GL
425static struct dma_chunk *dma_find_chunk_lpar(struct ps3_dma_region *r,
426 unsigned long lpar_addr, unsigned long len)
427{
428 struct dma_chunk *c;
429 unsigned long aligned_lpar = _ALIGN_DOWN(lpar_addr, 1 << r->page_size);
430 unsigned long aligned_len = _ALIGN_UP(len + lpar_addr - aligned_lpar,
431 1 << r->page_size);
432
433 list_for_each_entry(c, &r->chunk_list.head, link) {
434 /* intersection */
435 if (c->lpar_addr <= aligned_lpar &&
436 aligned_lpar < c->lpar_addr + c->len) {
437 if (aligned_lpar + aligned_len <= c->lpar_addr + c->len)
438 return c;
439 else {
440 dma_dump_chunk(c);
441 BUG();
442 }
443 }
444 /* below */
445 if (aligned_lpar + aligned_len <= c->lpar_addr) {
446 continue;
447 }
448 /* above */
449 if (c->lpar_addr + c->len <= aligned_lpar) {
450 continue;
451 }
452 }
453 return NULL;
454}
455
456static int dma_sb_free_chunk(struct dma_chunk *c)
f58a9d17
GL
457{
458 int result = 0;
459
460 if (c->bus_addr) {
6bb5cf10
GL
461 result = lv1_unmap_device_dma_region(c->region->dev->bus_id,
462 c->region->dev->dev_id, c->bus_addr, c->len);
f58a9d17
GL
463 BUG_ON(result);
464 }
465
466 kfree(c);
467 return result;
468}
469
6bb5cf10
GL
470static int dma_ioc0_free_chunk(struct dma_chunk *c)
471{
472 int result = 0;
473 int iopage;
474 unsigned long offset;
475 struct ps3_dma_region *r = c->region;
476
477 DBG("%s:start\n", __func__);
478 for (iopage = 0; iopage < (c->len >> r->page_size); iopage++) {
479 offset = (1 << r->page_size) * iopage;
480 /* put INVALID entry */
481 result = lv1_put_iopte(0,
482 c->bus_addr + offset,
483 c->lpar_addr + offset,
484 r->ioid,
485 0);
486 DBG("%s: bus=%#lx, lpar=%#lx, ioid=%d\n", __func__,
487 c->bus_addr + offset,
488 c->lpar_addr + offset,
489 r->ioid);
490
491 if (result) {
492 DBG("%s:%d: lv1_put_iopte failed: %s\n", __func__,
493 __LINE__, ps3_result(result));
494 }
495 }
496 kfree(c);
497 DBG("%s:end\n", __func__);
498 return result;
499}
500
f58a9d17 501/**
6bb5cf10 502 * dma_sb_map_pages - Maps dma pages into the io controller bus address space.
f58a9d17
GL
503 * @r: Pointer to a struct ps3_dma_region.
504 * @phys_addr: Starting physical address of the area to map.
505 * @len: Length in bytes of the area to map.
506 * c_out: A pointer to receive an allocated struct dma_chunk for this area.
507 *
508 * This is the lowest level dma mapping routine, and is the one that will
509 * make the HV call to add the pages into the io controller address space.
510 */
511
6bb5cf10
GL
512static int dma_sb_map_pages(struct ps3_dma_region *r, unsigned long phys_addr,
513 unsigned long len, struct dma_chunk **c_out, u64 iopte_flag)
f58a9d17
GL
514{
515 int result;
516 struct dma_chunk *c;
517
518 c = kzalloc(sizeof(struct dma_chunk), GFP_ATOMIC);
519
520 if (!c) {
521 result = -ENOMEM;
522 goto fail_alloc;
523 }
524
525 c->region = r;
526 c->lpar_addr = ps3_mm_phys_to_lpar(phys_addr);
6bb5cf10 527 c->bus_addr = dma_sb_lpar_to_bus(r, c->lpar_addr);
f58a9d17
GL
528 c->len = len;
529
6bb5cf10
GL
530 BUG_ON(iopte_flag != 0xf800000000000000UL);
531 result = lv1_map_device_dma_region(c->region->dev->bus_id,
532 c->region->dev->dev_id, c->lpar_addr,
533 c->bus_addr, c->len, iopte_flag);
f58a9d17
GL
534 if (result) {
535 DBG("%s:%d: lv1_map_device_dma_region failed: %s\n",
536 __func__, __LINE__, ps3_result(result));
537 goto fail_map;
538 }
539
540 list_add(&c->link, &r->chunk_list.head);
541
542 *c_out = c;
543 return 0;
544
545fail_map:
546 kfree(c);
547fail_alloc:
548 *c_out = NULL;
549 DBG(" <- %s:%d\n", __func__, __LINE__);
550 return result;
551}
552
6bb5cf10
GL
553static int dma_ioc0_map_pages(struct ps3_dma_region *r, unsigned long phys_addr,
554 unsigned long len, struct dma_chunk **c_out,
555 u64 iopte_flag)
556{
557 int result;
558 struct dma_chunk *c, *last;
559 int iopage, pages;
560 unsigned long offset;
561
562 DBG(KERN_ERR "%s: phy=%#lx, lpar%#lx, len=%#lx\n", __func__,
563 phys_addr, ps3_mm_phys_to_lpar(phys_addr), len);
564 c = kzalloc(sizeof(struct dma_chunk), GFP_ATOMIC);
565
566 if (!c) {
567 result = -ENOMEM;
568 goto fail_alloc;
569 }
570
571 c->region = r;
572 c->len = len;
573 c->lpar_addr = ps3_mm_phys_to_lpar(phys_addr);
574 /* allocate IO address */
575 if (list_empty(&r->chunk_list.head)) {
576 /* first one */
577 c->bus_addr = r->bus_addr;
578 } else {
579 /* derive from last bus addr*/
580 last = list_entry(r->chunk_list.head.next,
581 struct dma_chunk, link);
582 c->bus_addr = last->bus_addr + last->len;
583 DBG("%s: last bus=%#lx, len=%#lx\n", __func__,
584 last->bus_addr, last->len);
585 }
586
587 /* FIXME: check whether length exceeds region size */
588
589 /* build ioptes for the area */
590 pages = len >> r->page_size;
5c949070 591 DBG("%s: pgsize=%#x len=%#lx pages=%#x iopteflag=%#llx\n", __func__,
6bb5cf10
GL
592 r->page_size, r->len, pages, iopte_flag);
593 for (iopage = 0; iopage < pages; iopage++) {
594 offset = (1 << r->page_size) * iopage;
595 result = lv1_put_iopte(0,
596 c->bus_addr + offset,
597 c->lpar_addr + offset,
598 r->ioid,
599 iopte_flag);
600 if (result) {
7e28060a
GU
601 pr_warning("%s:%d: lv1_put_iopte failed: %s\n",
602 __func__, __LINE__, ps3_result(result));
6bb5cf10
GL
603 goto fail_map;
604 }
605 DBG("%s: pg=%d bus=%#lx, lpar=%#lx, ioid=%#x\n", __func__,
606 iopage, c->bus_addr + offset, c->lpar_addr + offset,
607 r->ioid);
608 }
609
610 /* be sure that last allocated one is inserted at head */
611 list_add(&c->link, &r->chunk_list.head);
612
613 *c_out = c;
614 DBG("%s: end\n", __func__);
615 return 0;
616
617fail_map:
618 for (iopage--; 0 <= iopage; iopage--) {
619 lv1_put_iopte(0,
620 c->bus_addr + offset,
621 c->lpar_addr + offset,
622 r->ioid,
623 0);
624 }
625 kfree(c);
626fail_alloc:
627 *c_out = NULL;
628 return result;
629}
630
f58a9d17 631/**
6bb5cf10 632 * dma_sb_region_create - Create a device dma region.
f58a9d17
GL
633 * @r: Pointer to a struct ps3_dma_region.
634 *
635 * This is the lowest level dma region create routine, and is the one that
636 * will make the HV call to create the region.
637 */
638
6bb5cf10 639static int dma_sb_region_create(struct ps3_dma_region *r)
f58a9d17
GL
640{
641 int result;
b17b3df1 642 u64 bus_addr;
f58a9d17 643
62d80749 644 DBG(" -> %s:%d:\n", __func__, __LINE__);
6bb5cf10
GL
645
646 BUG_ON(!r);
647
648 if (!r->dev->bus_id) {
5c949070 649 pr_info("%s:%d: %llu:%llu no dma\n", __func__, __LINE__,
6bb5cf10
GL
650 r->dev->bus_id, r->dev->dev_id);
651 return 0;
652 }
653
654 DBG("%s:%u: len = 0x%lx, page_size = %u, offset = 0x%lx\n", __func__,
655 __LINE__, r->len, r->page_size, r->offset);
656
657 BUG_ON(!r->len);
658 BUG_ON(!r->page_size);
659 BUG_ON(!r->region_ops);
660
f58a9d17
GL
661 INIT_LIST_HEAD(&r->chunk_list.head);
662 spin_lock_init(&r->chunk_list.lock);
663
6bb5cf10
GL
664 result = lv1_allocate_device_dma_region(r->dev->bus_id, r->dev->dev_id,
665 roundup_pow_of_two(r->len), r->page_size, r->region_type,
b17b3df1
SR
666 &bus_addr);
667 r->bus_addr = bus_addr;
f58a9d17
GL
668
669 if (result) {
670 DBG("%s:%d: lv1_allocate_device_dma_region failed: %s\n",
671 __func__, __LINE__, ps3_result(result));
672 r->len = r->bus_addr = 0;
673 }
674
675 return result;
676}
677
6bb5cf10
GL
678static int dma_ioc0_region_create(struct ps3_dma_region *r)
679{
680 int result;
b17b3df1 681 u64 bus_addr;
6bb5cf10
GL
682
683 INIT_LIST_HEAD(&r->chunk_list.head);
684 spin_lock_init(&r->chunk_list.lock);
685
686 result = lv1_allocate_io_segment(0,
687 r->len,
688 r->page_size,
b17b3df1
SR
689 &bus_addr);
690 r->bus_addr = bus_addr;
6bb5cf10
GL
691 if (result) {
692 DBG("%s:%d: lv1_allocate_io_segment failed: %s\n",
693 __func__, __LINE__, ps3_result(result));
694 r->len = r->bus_addr = 0;
695 }
696 DBG("%s: len=%#lx, pg=%d, bus=%#lx\n", __func__,
697 r->len, r->page_size, r->bus_addr);
698 return result;
699}
700
f58a9d17
GL
701/**
702 * dma_region_free - Free a device dma region.
703 * @r: Pointer to a struct ps3_dma_region.
704 *
705 * This is the lowest level dma region free routine, and is the one that
706 * will make the HV call to free the region.
707 */
708
6bb5cf10 709static int dma_sb_region_free(struct ps3_dma_region *r)
f58a9d17
GL
710{
711 int result;
712 struct dma_chunk *c;
713 struct dma_chunk *tmp;
714
6bb5cf10
GL
715 BUG_ON(!r);
716
717 if (!r->dev->bus_id) {
5c949070 718 pr_info("%s:%d: %llu:%llu no dma\n", __func__, __LINE__,
6bb5cf10
GL
719 r->dev->bus_id, r->dev->dev_id);
720 return 0;
721 }
722
f58a9d17
GL
723 list_for_each_entry_safe(c, tmp, &r->chunk_list.head, link) {
724 list_del(&c->link);
6bb5cf10 725 dma_sb_free_chunk(c);
f58a9d17
GL
726 }
727
6bb5cf10 728 result = lv1_free_device_dma_region(r->dev->bus_id, r->dev->dev_id,
f58a9d17
GL
729 r->bus_addr);
730
731 if (result)
732 DBG("%s:%d: lv1_free_device_dma_region failed: %s\n",
733 __func__, __LINE__, ps3_result(result));
734
6bb5cf10
GL
735 r->bus_addr = 0;
736
737 return result;
738}
739
740static int dma_ioc0_region_free(struct ps3_dma_region *r)
741{
742 int result;
743 struct dma_chunk *c, *n;
744
745 DBG("%s: start\n", __func__);
746 list_for_each_entry_safe(c, n, &r->chunk_list.head, link) {
747 list_del(&c->link);
748 dma_ioc0_free_chunk(c);
749 }
750
751 result = lv1_release_io_segment(0, r->bus_addr);
752
753 if (result)
754 DBG("%s:%d: lv1_free_device_dma_region failed: %s\n",
755 __func__, __LINE__, ps3_result(result));
756
757 r->bus_addr = 0;
758 DBG("%s: end\n", __func__);
f58a9d17
GL
759
760 return result;
761}
762
763/**
6bb5cf10 764 * dma_sb_map_area - Map an area of memory into a device dma region.
f58a9d17
GL
765 * @r: Pointer to a struct ps3_dma_region.
766 * @virt_addr: Starting virtual address of the area to map.
767 * @len: Length in bytes of the area to map.
768 * @bus_addr: A pointer to return the starting ioc bus address of the area to
769 * map.
770 *
771 * This is the common dma mapping routine.
772 */
773
6bb5cf10 774static int dma_sb_map_area(struct ps3_dma_region *r, unsigned long virt_addr,
494fd07a 775 unsigned long len, dma_addr_t *bus_addr,
6bb5cf10 776 u64 iopte_flag)
f58a9d17
GL
777{
778 int result;
779 unsigned long flags;
780 struct dma_chunk *c;
781 unsigned long phys_addr = is_kernel_addr(virt_addr) ? __pa(virt_addr)
782 : virt_addr;
6bb5cf10
GL
783 unsigned long aligned_phys = _ALIGN_DOWN(phys_addr, 1 << r->page_size);
784 unsigned long aligned_len = _ALIGN_UP(len + phys_addr - aligned_phys,
785 1 << r->page_size);
786 *bus_addr = dma_sb_lpar_to_bus(r, ps3_mm_phys_to_lpar(phys_addr));
f58a9d17
GL
787
788 if (!USE_DYNAMIC_DMA) {
789 unsigned long lpar_addr = ps3_mm_phys_to_lpar(phys_addr);
790 DBG(" -> %s:%d\n", __func__, __LINE__);
791 DBG("%s:%d virt_addr %lxh\n", __func__, __LINE__,
792 virt_addr);
793 DBG("%s:%d phys_addr %lxh\n", __func__, __LINE__,
794 phys_addr);
795 DBG("%s:%d lpar_addr %lxh\n", __func__, __LINE__,
796 lpar_addr);
797 DBG("%s:%d len %lxh\n", __func__, __LINE__, len);
494fd07a 798 DBG("%s:%d bus_addr %llxh (%lxh)\n", __func__, __LINE__,
f58a9d17
GL
799 *bus_addr, len);
800 }
801
802 spin_lock_irqsave(&r->chunk_list.lock, flags);
803 c = dma_find_chunk(r, *bus_addr, len);
804
805 if (c) {
6bb5cf10
GL
806 DBG("%s:%d: reusing mapped chunk", __func__, __LINE__);
807 dma_dump_chunk(c);
f58a9d17
GL
808 c->usage_count++;
809 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
810 return 0;
811 }
812
6bb5cf10 813 result = dma_sb_map_pages(r, aligned_phys, aligned_len, &c, iopte_flag);
f58a9d17
GL
814
815 if (result) {
816 *bus_addr = 0;
6bb5cf10 817 DBG("%s:%d: dma_sb_map_pages failed (%d)\n",
f58a9d17
GL
818 __func__, __LINE__, result);
819 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
820 return result;
821 }
822
823 c->usage_count = 1;
824
825 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
826 return result;
827}
828
6bb5cf10 829static int dma_ioc0_map_area(struct ps3_dma_region *r, unsigned long virt_addr,
494fd07a 830 unsigned long len, dma_addr_t *bus_addr,
6bb5cf10
GL
831 u64 iopte_flag)
832{
833 int result;
834 unsigned long flags;
835 struct dma_chunk *c;
836 unsigned long phys_addr = is_kernel_addr(virt_addr) ? __pa(virt_addr)
837 : virt_addr;
838 unsigned long aligned_phys = _ALIGN_DOWN(phys_addr, 1 << r->page_size);
839 unsigned long aligned_len = _ALIGN_UP(len + phys_addr - aligned_phys,
840 1 << r->page_size);
841
842 DBG(KERN_ERR "%s: vaddr=%#lx, len=%#lx\n", __func__,
843 virt_addr, len);
844 DBG(KERN_ERR "%s: ph=%#lx a_ph=%#lx a_l=%#lx\n", __func__,
845 phys_addr, aligned_phys, aligned_len);
846
847 spin_lock_irqsave(&r->chunk_list.lock, flags);
848 c = dma_find_chunk_lpar(r, ps3_mm_phys_to_lpar(phys_addr), len);
849
850 if (c) {
851 /* FIXME */
852 BUG();
853 *bus_addr = c->bus_addr + phys_addr - aligned_phys;
854 c->usage_count++;
855 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
856 return 0;
857 }
858
859 result = dma_ioc0_map_pages(r, aligned_phys, aligned_len, &c,
860 iopte_flag);
861
862 if (result) {
863 *bus_addr = 0;
864 DBG("%s:%d: dma_ioc0_map_pages failed (%d)\n",
865 __func__, __LINE__, result);
866 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
867 return result;
868 }
869 *bus_addr = c->bus_addr + phys_addr - aligned_phys;
494fd07a 870 DBG("%s: va=%#lx pa=%#lx a_pa=%#lx bus=%#llx\n", __func__,
6bb5cf10
GL
871 virt_addr, phys_addr, aligned_phys, *bus_addr);
872 c->usage_count = 1;
873
874 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
875 return result;
876}
877
f58a9d17 878/**
6bb5cf10 879 * dma_sb_unmap_area - Unmap an area of memory from a device dma region.
f58a9d17
GL
880 * @r: Pointer to a struct ps3_dma_region.
881 * @bus_addr: The starting ioc bus address of the area to unmap.
882 * @len: Length in bytes of the area to unmap.
883 *
884 * This is the common dma unmap routine.
885 */
886
494fd07a 887static int dma_sb_unmap_area(struct ps3_dma_region *r, dma_addr_t bus_addr,
f58a9d17
GL
888 unsigned long len)
889{
890 unsigned long flags;
891 struct dma_chunk *c;
892
893 spin_lock_irqsave(&r->chunk_list.lock, flags);
894 c = dma_find_chunk(r, bus_addr, len);
895
896 if (!c) {
897 unsigned long aligned_bus = _ALIGN_DOWN(bus_addr,
898 1 << r->page_size);
6bb5cf10
GL
899 unsigned long aligned_len = _ALIGN_UP(len + bus_addr
900 - aligned_bus, 1 << r->page_size);
494fd07a 901 DBG("%s:%d: not found: bus_addr %llxh\n",
f58a9d17
GL
902 __func__, __LINE__, bus_addr);
903 DBG("%s:%d: not found: len %lxh\n",
904 __func__, __LINE__, len);
905 DBG("%s:%d: not found: aligned_bus %lxh\n",
906 __func__, __LINE__, aligned_bus);
907 DBG("%s:%d: not found: aligned_len %lxh\n",
908 __func__, __LINE__, aligned_len);
909 BUG();
910 }
911
912 c->usage_count--;
913
914 if (!c->usage_count) {
915 list_del(&c->link);
6bb5cf10 916 dma_sb_free_chunk(c);
f58a9d17
GL
917 }
918
919 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
920 return 0;
921}
922
32f44a12 923static int dma_ioc0_unmap_area(struct ps3_dma_region *r,
494fd07a 924 dma_addr_t bus_addr, unsigned long len)
6bb5cf10
GL
925{
926 unsigned long flags;
927 struct dma_chunk *c;
928
494fd07a 929 DBG("%s: start a=%#llx l=%#lx\n", __func__, bus_addr, len);
6bb5cf10
GL
930 spin_lock_irqsave(&r->chunk_list.lock, flags);
931 c = dma_find_chunk(r, bus_addr, len);
932
933 if (!c) {
934 unsigned long aligned_bus = _ALIGN_DOWN(bus_addr,
935 1 << r->page_size);
936 unsigned long aligned_len = _ALIGN_UP(len + bus_addr
937 - aligned_bus,
938 1 << r->page_size);
494fd07a 939 DBG("%s:%d: not found: bus_addr %llxh\n",
6bb5cf10
GL
940 __func__, __LINE__, bus_addr);
941 DBG("%s:%d: not found: len %lxh\n",
942 __func__, __LINE__, len);
943 DBG("%s:%d: not found: aligned_bus %lxh\n",
944 __func__, __LINE__, aligned_bus);
945 DBG("%s:%d: not found: aligned_len %lxh\n",
946 __func__, __LINE__, aligned_len);
947 BUG();
948 }
949
950 c->usage_count--;
951
952 if (!c->usage_count) {
953 list_del(&c->link);
954 dma_ioc0_free_chunk(c);
955 }
956
957 spin_unlock_irqrestore(&r->chunk_list.lock, flags);
958 DBG("%s: end\n", __func__);
959 return 0;
960}
961
f58a9d17 962/**
6bb5cf10 963 * dma_sb_region_create_linear - Setup a linear dma mapping for a device.
f58a9d17
GL
964 * @r: Pointer to a struct ps3_dma_region.
965 *
966 * This routine creates an HV dma region for the device and maps all available
967 * ram into the io controller bus address space.
968 */
969
6bb5cf10 970static int dma_sb_region_create_linear(struct ps3_dma_region *r)
f58a9d17
GL
971{
972 int result;
494fd07a
SR
973 unsigned long virt_addr, len;
974 dma_addr_t tmp;
6bb5cf10
GL
975
976 if (r->len > 16*1024*1024) { /* FIXME: need proper fix */
977 /* force 16M dma pages for linear mapping */
978 if (r->page_size != PS3_DMA_16M) {
979 pr_info("%s:%d: forcing 16M pages for linear map\n",
980 __func__, __LINE__);
981 r->page_size = PS3_DMA_16M;
982 r->len = _ALIGN_UP(r->len, 1 << r->page_size);
983 }
f58a9d17
GL
984 }
985
6bb5cf10 986 result = dma_sb_region_create(r);
f58a9d17
GL
987 BUG_ON(result);
988
6bb5cf10
GL
989 if (r->offset < map.rm.size) {
990 /* Map (part of) 1st RAM chunk */
991 virt_addr = map.rm.base + r->offset;
992 len = map.rm.size - r->offset;
993 if (len > r->len)
994 len = r->len;
995 result = dma_sb_map_area(r, virt_addr, len, &tmp,
5c6fc8db
GU
996 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_SO_RW |
997 CBE_IOPTE_M);
6bb5cf10
GL
998 BUG_ON(result);
999 }
f58a9d17 1000
6bb5cf10
GL
1001 if (r->offset + r->len > map.rm.size) {
1002 /* Map (part of) 2nd RAM chunk */
a628df1e 1003 virt_addr = map.rm.size;
6bb5cf10
GL
1004 len = r->len;
1005 if (r->offset >= map.rm.size)
1006 virt_addr += r->offset - map.rm.size;
1007 else
1008 len -= map.rm.size - r->offset;
1009 result = dma_sb_map_area(r, virt_addr, len, &tmp,
5c6fc8db
GU
1010 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_SO_RW |
1011 CBE_IOPTE_M);
6bb5cf10
GL
1012 BUG_ON(result);
1013 }
f58a9d17
GL
1014
1015 return result;
1016}
1017
1018/**
6bb5cf10 1019 * dma_sb_region_free_linear - Free a linear dma mapping for a device.
f58a9d17
GL
1020 * @r: Pointer to a struct ps3_dma_region.
1021 *
1022 * This routine will unmap all mapped areas and free the HV dma region.
1023 */
1024
6bb5cf10 1025static int dma_sb_region_free_linear(struct ps3_dma_region *r)
f58a9d17
GL
1026{
1027 int result;
494fd07a
SR
1028 dma_addr_t bus_addr;
1029 unsigned long len, lpar_addr;
6bb5cf10
GL
1030
1031 if (r->offset < map.rm.size) {
1032 /* Unmap (part of) 1st RAM chunk */
1033 lpar_addr = map.rm.base + r->offset;
1034 len = map.rm.size - r->offset;
1035 if (len > r->len)
1036 len = r->len;
1037 bus_addr = dma_sb_lpar_to_bus(r, lpar_addr);
1038 result = dma_sb_unmap_area(r, bus_addr, len);
1039 BUG_ON(result);
1040 }
f58a9d17 1041
6bb5cf10
GL
1042 if (r->offset + r->len > map.rm.size) {
1043 /* Unmap (part of) 2nd RAM chunk */
1044 lpar_addr = map.r1.base;
1045 len = r->len;
1046 if (r->offset >= map.rm.size)
1047 lpar_addr += r->offset - map.rm.size;
1048 else
1049 len -= map.rm.size - r->offset;
1050 bus_addr = dma_sb_lpar_to_bus(r, lpar_addr);
1051 result = dma_sb_unmap_area(r, bus_addr, len);
1052 BUG_ON(result);
1053 }
f58a9d17 1054
6bb5cf10 1055 result = dma_sb_region_free(r);
f58a9d17
GL
1056 BUG_ON(result);
1057
1058 return result;
1059}
1060
1061/**
6bb5cf10 1062 * dma_sb_map_area_linear - Map an area of memory into a device dma region.
f58a9d17
GL
1063 * @r: Pointer to a struct ps3_dma_region.
1064 * @virt_addr: Starting virtual address of the area to map.
1065 * @len: Length in bytes of the area to map.
1066 * @bus_addr: A pointer to return the starting ioc bus address of the area to
1067 * map.
1068 *
6bb5cf10 1069 * This routine just returns the corresponding bus address. Actual mapping
f58a9d17
GL
1070 * occurs in dma_region_create_linear().
1071 */
1072
6bb5cf10 1073static int dma_sb_map_area_linear(struct ps3_dma_region *r,
494fd07a 1074 unsigned long virt_addr, unsigned long len, dma_addr_t *bus_addr,
6bb5cf10 1075 u64 iopte_flag)
f58a9d17
GL
1076{
1077 unsigned long phys_addr = is_kernel_addr(virt_addr) ? __pa(virt_addr)
1078 : virt_addr;
6bb5cf10 1079 *bus_addr = dma_sb_lpar_to_bus(r, ps3_mm_phys_to_lpar(phys_addr));
f58a9d17
GL
1080 return 0;
1081}
1082
1083/**
1084 * dma_unmap_area_linear - Unmap an area of memory from a device dma region.
1085 * @r: Pointer to a struct ps3_dma_region.
1086 * @bus_addr: The starting ioc bus address of the area to unmap.
1087 * @len: Length in bytes of the area to unmap.
1088 *
6bb5cf10 1089 * This routine does nothing. Unmapping occurs in dma_sb_region_free_linear().
f58a9d17
GL
1090 */
1091
6bb5cf10 1092static int dma_sb_unmap_area_linear(struct ps3_dma_region *r,
494fd07a 1093 dma_addr_t bus_addr, unsigned long len)
f58a9d17
GL
1094{
1095 return 0;
6bb5cf10
GL
1096};
1097
1098static const struct ps3_dma_region_ops ps3_dma_sb_region_ops = {
1099 .create = dma_sb_region_create,
1100 .free = dma_sb_region_free,
1101 .map = dma_sb_map_area,
1102 .unmap = dma_sb_unmap_area
1103};
1104
1105static const struct ps3_dma_region_ops ps3_dma_sb_region_linear_ops = {
1106 .create = dma_sb_region_create_linear,
1107 .free = dma_sb_region_free_linear,
1108 .map = dma_sb_map_area_linear,
1109 .unmap = dma_sb_unmap_area_linear
1110};
1111
1112static const struct ps3_dma_region_ops ps3_dma_ioc0_region_ops = {
1113 .create = dma_ioc0_region_create,
1114 .free = dma_ioc0_region_free,
1115 .map = dma_ioc0_map_area,
1116 .unmap = dma_ioc0_unmap_area
1117};
1118
1119int ps3_dma_region_init(struct ps3_system_bus_device *dev,
1120 struct ps3_dma_region *r, enum ps3_dma_page_size page_size,
1121 enum ps3_dma_region_type region_type, void *addr, unsigned long len)
1122{
1123 unsigned long lpar_addr;
1124
1125 lpar_addr = addr ? ps3_mm_phys_to_lpar(__pa(addr)) : 0;
1126
1127 r->dev = dev;
1128 r->page_size = page_size;
1129 r->region_type = region_type;
1130 r->offset = lpar_addr;
1131 if (r->offset >= map.rm.size)
1132 r->offset -= map.r1.offset;
1133 r->len = len ? len : _ALIGN_UP(map.total, 1 << r->page_size);
1134
1135 switch (dev->dev_type) {
1136 case PS3_DEVICE_TYPE_SB:
1137 r->region_ops = (USE_DYNAMIC_DMA)
1138 ? &ps3_dma_sb_region_ops
1139 : &ps3_dma_sb_region_linear_ops;
1140 break;
1141 case PS3_DEVICE_TYPE_IOC0:
1142 r->region_ops = &ps3_dma_ioc0_region_ops;
1143 break;
1144 default:
1145 BUG();
1146 return -EINVAL;
1147 }
1148 return 0;
f58a9d17 1149}
6bb5cf10 1150EXPORT_SYMBOL(ps3_dma_region_init);
f58a9d17
GL
1151
1152int ps3_dma_region_create(struct ps3_dma_region *r)
1153{
6bb5cf10
GL
1154 BUG_ON(!r);
1155 BUG_ON(!r->region_ops);
1156 BUG_ON(!r->region_ops->create);
1157 return r->region_ops->create(r);
f58a9d17 1158}
6bb5cf10 1159EXPORT_SYMBOL(ps3_dma_region_create);
f58a9d17
GL
1160
1161int ps3_dma_region_free(struct ps3_dma_region *r)
1162{
6bb5cf10
GL
1163 BUG_ON(!r);
1164 BUG_ON(!r->region_ops);
1165 BUG_ON(!r->region_ops->free);
1166 return r->region_ops->free(r);
f58a9d17 1167}
6bb5cf10 1168EXPORT_SYMBOL(ps3_dma_region_free);
f58a9d17
GL
1169
1170int ps3_dma_map(struct ps3_dma_region *r, unsigned long virt_addr,
494fd07a 1171 unsigned long len, dma_addr_t *bus_addr,
6bb5cf10 1172 u64 iopte_flag)
f58a9d17 1173{
6bb5cf10 1174 return r->region_ops->map(r, virt_addr, len, bus_addr, iopte_flag);
f58a9d17
GL
1175}
1176
494fd07a 1177int ps3_dma_unmap(struct ps3_dma_region *r, dma_addr_t bus_addr,
f58a9d17
GL
1178 unsigned long len)
1179{
6bb5cf10 1180 return r->region_ops->unmap(r, bus_addr, len);
f58a9d17
GL
1181}
1182
1183/*============================================================================*/
1184/* system startup routines */
1185/*============================================================================*/
1186
1187/**
1188 * ps3_mm_init - initialize the address space state variables
1189 */
1190
1191void __init ps3_mm_init(void)
1192{
1193 int result;
1194
1195 DBG(" -> %s:%d\n", __func__, __LINE__);
1196
1197 result = ps3_repository_read_mm_info(&map.rm.base, &map.rm.size,
1198 &map.total);
1199
1200 if (result)
1201 panic("ps3_repository_read_mm_info() failed");
1202
1203 map.rm.offset = map.rm.base;
1204 map.vas_id = map.htab_size = 0;
1205
1206 /* this implementation assumes map.rm.base is zero */
1207
1208 BUG_ON(map.rm.base);
1209 BUG_ON(!map.rm.size);
1210
1e755c09 1211 /* Check if we got the highmem region from an earlier boot step */
f58a9d17 1212
1e755c09
AH
1213 if (ps3_mm_get_repository_highmem(&map.r1))
1214 ps3_mm_region_create(&map.r1, map.total - map.rm.size);
f58a9d17 1215
6bb5cf10
GL
1216 /* correct map.total for the real total amount of memory we use */
1217 map.total = map.rm.size + map.r1.size;
1218
8ac5fd11
HM
1219 if (!map.r1.size) {
1220 DBG("%s:%d: No highmem region found\n", __func__, __LINE__);
1221 } else {
1222 DBG("%s:%d: Adding highmem region: %llxh %llxh\n",
1223 __func__, __LINE__, map.rm.size,
1224 map.total - map.rm.size);
1225 memblock_add(map.rm.size, map.total - map.rm.size);
1226 }
1227
f58a9d17
GL
1228 DBG(" <- %s:%d\n", __func__, __LINE__);
1229}
1230
1231/**
1232 * ps3_mm_shutdown - final cleanup of address space
1233 */
1234
1235void ps3_mm_shutdown(void)
1236{
1237 ps3_mm_region_destroy(&map.r1);
f58a9d17 1238}
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