Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * eeh.c | |
3 | * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation | |
69376502 | 4 | * |
1da177e4 LT |
5 | * This program is free software; you can redistribute it and/or modify |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
69376502 | 9 | * |
1da177e4 LT |
10 | * This program is distributed in the hope that it will be useful, |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
69376502 | 14 | * |
1da177e4 LT |
15 | * You should have received a copy of the GNU General Public License |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
6dee3fb9 | 20 | #include <linux/delay.h> |
1da177e4 LT |
21 | #include <linux/init.h> |
22 | #include <linux/list.h> | |
1da177e4 LT |
23 | #include <linux/pci.h> |
24 | #include <linux/proc_fs.h> | |
25 | #include <linux/rbtree.h> | |
26 | #include <linux/seq_file.h> | |
27 | #include <linux/spinlock.h> | |
69376502 | 28 | #include <asm/atomic.h> |
1da177e4 | 29 | #include <asm/eeh.h> |
172ca926 | 30 | #include <asm/eeh_event.h> |
1da177e4 LT |
31 | #include <asm/io.h> |
32 | #include <asm/machdep.h> | |
172ca926 | 33 | #include <asm/ppc-pci.h> |
1da177e4 | 34 | #include <asm/rtas.h> |
1da177e4 LT |
35 | |
36 | #undef DEBUG | |
37 | ||
38 | /** Overview: | |
39 | * EEH, or "Extended Error Handling" is a PCI bridge technology for | |
40 | * dealing with PCI bus errors that can't be dealt with within the | |
41 | * usual PCI framework, except by check-stopping the CPU. Systems | |
42 | * that are designed for high-availability/reliability cannot afford | |
43 | * to crash due to a "mere" PCI error, thus the need for EEH. | |
44 | * An EEH-capable bridge operates by converting a detected error | |
45 | * into a "slot freeze", taking the PCI adapter off-line, making | |
46 | * the slot behave, from the OS'es point of view, as if the slot | |
47 | * were "empty": all reads return 0xff's and all writes are silently | |
48 | * ignored. EEH slot isolation events can be triggered by parity | |
49 | * errors on the address or data busses (e.g. during posted writes), | |
69376502 LV |
50 | * which in turn might be caused by low voltage on the bus, dust, |
51 | * vibration, humidity, radioactivity or plain-old failed hardware. | |
1da177e4 LT |
52 | * |
53 | * Note, however, that one of the leading causes of EEH slot | |
54 | * freeze events are buggy device drivers, buggy device microcode, | |
55 | * or buggy device hardware. This is because any attempt by the | |
56 | * device to bus-master data to a memory address that is not | |
57 | * assigned to the device will trigger a slot freeze. (The idea | |
58 | * is to prevent devices-gone-wild from corrupting system memory). | |
59 | * Buggy hardware/drivers will have a miserable time co-existing | |
60 | * with EEH. | |
61 | * | |
62 | * Ideally, a PCI device driver, when suspecting that an isolation | |
63 | * event has occured (e.g. by reading 0xff's), will then ask EEH | |
64 | * whether this is the case, and then take appropriate steps to | |
65 | * reset the PCI slot, the PCI device, and then resume operations. | |
66 | * However, until that day, the checking is done here, with the | |
67 | * eeh_check_failure() routine embedded in the MMIO macros. If | |
68 | * the slot is found to be isolated, an "EEH Event" is synthesized | |
69 | * and sent out for processing. | |
70 | */ | |
71 | ||
5c1344e9 | 72 | /* If a device driver keeps reading an MMIO register in an interrupt |
1da177e4 LT |
73 | * handler after a slot isolation event has occurred, we assume it |
74 | * is broken and panic. This sets the threshold for how many read | |
75 | * attempts we allow before panicking. | |
76 | */ | |
2fd30be8 | 77 | #define EEH_MAX_FAILS 2100000 |
1da177e4 | 78 | |
9c547768 LV |
79 | /* Time to wait for a PCI slot to retport status, in milliseconds */ |
80 | #define PCI_BUS_RESET_WAIT_MSEC (60*1000) | |
81 | ||
1da177e4 LT |
82 | /* RTAS tokens */ |
83 | static int ibm_set_eeh_option; | |
84 | static int ibm_set_slot_reset; | |
85 | static int ibm_read_slot_reset_state; | |
86 | static int ibm_read_slot_reset_state2; | |
87 | static int ibm_slot_error_detail; | |
25e591f6 | 88 | static int ibm_get_config_addr_info; |
147d6a37 | 89 | static int ibm_get_config_addr_info2; |
21e464dd | 90 | static int ibm_configure_bridge; |
1da177e4 | 91 | |
1e28a7dd DW |
92 | int eeh_subsystem_enabled; |
93 | EXPORT_SYMBOL(eeh_subsystem_enabled); | |
1da177e4 | 94 | |
fd761fd8 LV |
95 | /* Lock to avoid races due to multiple reports of an error */ |
96 | static DEFINE_SPINLOCK(confirm_error_lock); | |
97 | ||
1da177e4 LT |
98 | /* Buffer for reporting slot-error-detail rtas calls */ |
99 | static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX]; | |
100 | static DEFINE_SPINLOCK(slot_errbuf_lock); | |
101 | static int eeh_error_buf_size; | |
102 | ||
103 | /* System monitoring statistics */ | |
257ffc64 LV |
104 | static unsigned long no_device; |
105 | static unsigned long no_dn; | |
106 | static unsigned long no_cfg_addr; | |
107 | static unsigned long ignored_check; | |
108 | static unsigned long total_mmio_ffs; | |
109 | static unsigned long false_positives; | |
110 | static unsigned long ignored_failures; | |
111 | static unsigned long slot_resets; | |
1da177e4 | 112 | |
7684b40c LV |
113 | #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE) |
114 | ||
1da177e4 | 115 | /* --------------------------------------------------------------- */ |
5d5a0936 | 116 | /* Below lies the EEH event infrastructure */ |
1da177e4 | 117 | |
df7242b1 LV |
118 | void eeh_slot_error_detail (struct pci_dn *pdn, int severity) |
119 | { | |
fcb7543e | 120 | int config_addr; |
df7242b1 LV |
121 | unsigned long flags; |
122 | int rc; | |
123 | ||
124 | /* Log the error with the rtas logger */ | |
125 | spin_lock_irqsave(&slot_errbuf_lock, flags); | |
126 | memset(slot_errbuf, 0, eeh_error_buf_size); | |
127 | ||
fcb7543e LV |
128 | /* Use PE configuration address, if present */ |
129 | config_addr = pdn->eeh_config_addr; | |
130 | if (pdn->eeh_pe_config_addr) | |
131 | config_addr = pdn->eeh_pe_config_addr; | |
132 | ||
df7242b1 | 133 | rc = rtas_call(ibm_slot_error_detail, |
fcb7543e | 134 | 8, 1, NULL, config_addr, |
df7242b1 LV |
135 | BUID_HI(pdn->phb->buid), |
136 | BUID_LO(pdn->phb->buid), NULL, 0, | |
137 | virt_to_phys(slot_errbuf), | |
138 | eeh_error_buf_size, | |
139 | severity); | |
140 | ||
141 | if (rc == 0) | |
142 | log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0); | |
143 | spin_unlock_irqrestore(&slot_errbuf_lock, flags); | |
144 | } | |
145 | ||
1da177e4 LT |
146 | /** |
147 | * read_slot_reset_state - Read the reset state of a device node's slot | |
148 | * @dn: device node to read | |
149 | * @rets: array to return results in | |
150 | */ | |
69376502 | 151 | static int read_slot_reset_state(struct pci_dn *pdn, int rets[]) |
1da177e4 LT |
152 | { |
153 | int token, outputs; | |
fcb7543e | 154 | int config_addr; |
1da177e4 LT |
155 | |
156 | if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) { | |
157 | token = ibm_read_slot_reset_state2; | |
158 | outputs = 4; | |
159 | } else { | |
160 | token = ibm_read_slot_reset_state; | |
69376502 | 161 | rets[2] = 0; /* fake PE Unavailable info */ |
1da177e4 LT |
162 | outputs = 3; |
163 | } | |
164 | ||
fcb7543e LV |
165 | /* Use PE configuration address, if present */ |
166 | config_addr = pdn->eeh_config_addr; | |
167 | if (pdn->eeh_pe_config_addr) | |
168 | config_addr = pdn->eeh_pe_config_addr; | |
169 | ||
170 | return rtas_call(token, 3, outputs, rets, config_addr, | |
1635317f | 171 | BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid)); |
1da177e4 LT |
172 | } |
173 | ||
9c547768 LV |
174 | /** |
175 | * eeh_wait_for_slot_status - returns error status of slot | |
176 | * @pdn pci device node | |
177 | * @max_wait_msecs maximum number to millisecs to wait | |
178 | * | |
179 | * Return negative value if a permanent error, else return | |
180 | * Partition Endpoint (PE) status value. | |
181 | * | |
182 | * If @max_wait_msecs is positive, then this routine will | |
183 | * sleep until a valid status can be obtained, or until | |
184 | * the max allowed wait time is exceeded, in which case | |
185 | * a -2 is returned. | |
186 | */ | |
187 | int | |
188 | eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs) | |
189 | { | |
190 | int rc; | |
191 | int rets[3]; | |
192 | int mwait; | |
193 | ||
194 | while (1) { | |
195 | rc = read_slot_reset_state(pdn, rets); | |
196 | if (rc) return rc; | |
197 | if (rets[1] == 0) return -1; /* EEH is not supported */ | |
198 | ||
199 | if (rets[0] != 5) return rets[0]; /* return actual status */ | |
200 | ||
201 | if (rets[2] == 0) return -1; /* permanently unavailable */ | |
202 | ||
203 | if (max_wait_msecs <= 0) return -1; | |
204 | ||
205 | mwait = rets[2]; | |
206 | if (mwait <= 0) { | |
207 | printk (KERN_WARNING | |
208 | "EEH: Firmware returned bad wait value=%d\n", mwait); | |
209 | mwait = 1000; | |
210 | } else if (mwait > 300*1000) { | |
211 | printk (KERN_WARNING | |
212 | "EEH: Firmware is taking too long, time=%d\n", mwait); | |
213 | mwait = 300*1000; | |
214 | } | |
215 | max_wait_msecs -= mwait; | |
216 | msleep (mwait); | |
217 | } | |
218 | ||
219 | printk(KERN_WARNING "EEH: Timed out waiting for slot status\n"); | |
220 | return -2; | |
221 | } | |
222 | ||
1da177e4 LT |
223 | /** |
224 | * eeh_token_to_phys - convert EEH address token to phys address | |
69376502 | 225 | * @token i/o token, should be address in the form 0xA.... |
1da177e4 LT |
226 | */ |
227 | static inline unsigned long eeh_token_to_phys(unsigned long token) | |
228 | { | |
229 | pte_t *ptep; | |
230 | unsigned long pa; | |
231 | ||
20cee16c | 232 | ptep = find_linux_pte(init_mm.pgd, token); |
1da177e4 LT |
233 | if (!ptep) |
234 | return token; | |
235 | pa = pte_pfn(*ptep) << PAGE_SHIFT; | |
236 | ||
237 | return pa | (token & (PAGE_SIZE-1)); | |
238 | } | |
239 | ||
fd761fd8 LV |
240 | /** |
241 | * Return the "partitionable endpoint" (pe) under which this device lies | |
242 | */ | |
9fb40eb8 | 243 | struct device_node * find_device_pe(struct device_node *dn) |
fd761fd8 LV |
244 | { |
245 | while ((dn->parent) && PCI_DN(dn->parent) && | |
246 | (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) { | |
247 | dn = dn->parent; | |
248 | } | |
249 | return dn; | |
250 | } | |
251 | ||
252 | /** Mark all devices that are peers of this device as failed. | |
253 | * Mark the device driver too, so that it can see the failure | |
254 | * immediately; this is critical, since some drivers poll | |
255 | * status registers in interrupts ... If a driver is polling, | |
256 | * and the slot is frozen, then the driver can deadlock in | |
257 | * an interrupt context, which is bad. | |
258 | */ | |
259 | ||
d9564ad1 | 260 | static void __eeh_mark_slot (struct device_node *dn, int mode_flag) |
fd761fd8 LV |
261 | { |
262 | while (dn) { | |
d9564ad1 | 263 | if (PCI_DN(dn)) { |
77bd7415 LV |
264 | /* Mark the pci device driver too */ |
265 | struct pci_dev *dev = PCI_DN(dn)->pcidev; | |
ea183a95 OJ |
266 | |
267 | PCI_DN(dn)->eeh_mode |= mode_flag; | |
268 | ||
77bd7415 LV |
269 | if (dev && dev->driver) |
270 | dev->error_state = pci_channel_io_frozen; | |
271 | ||
d9564ad1 LV |
272 | if (dn->child) |
273 | __eeh_mark_slot (dn->child, mode_flag); | |
274 | } | |
fd761fd8 LV |
275 | dn = dn->sibling; |
276 | } | |
277 | } | |
278 | ||
d9564ad1 LV |
279 | void eeh_mark_slot (struct device_node *dn, int mode_flag) |
280 | { | |
022d51b1 | 281 | struct pci_dev *dev; |
d9564ad1 | 282 | dn = find_device_pe (dn); |
3914ac7b LV |
283 | |
284 | /* Back up one, since config addrs might be shared */ | |
4980d5eb | 285 | if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent)) |
3914ac7b LV |
286 | dn = dn->parent; |
287 | ||
d9564ad1 | 288 | PCI_DN(dn)->eeh_mode |= mode_flag; |
022d51b1 LV |
289 | |
290 | /* Mark the pci device too */ | |
291 | dev = PCI_DN(dn)->pcidev; | |
292 | if (dev) | |
293 | dev->error_state = pci_channel_io_frozen; | |
294 | ||
d9564ad1 LV |
295 | __eeh_mark_slot (dn->child, mode_flag); |
296 | } | |
297 | ||
298 | static void __eeh_clear_slot (struct device_node *dn, int mode_flag) | |
fd761fd8 LV |
299 | { |
300 | while (dn) { | |
d9564ad1 LV |
301 | if (PCI_DN(dn)) { |
302 | PCI_DN(dn)->eeh_mode &= ~mode_flag; | |
303 | PCI_DN(dn)->eeh_check_count = 0; | |
304 | if (dn->child) | |
305 | __eeh_clear_slot (dn->child, mode_flag); | |
306 | } | |
fd761fd8 LV |
307 | dn = dn->sibling; |
308 | } | |
309 | } | |
310 | ||
d9564ad1 | 311 | void eeh_clear_slot (struct device_node *dn, int mode_flag) |
fd761fd8 LV |
312 | { |
313 | unsigned long flags; | |
314 | spin_lock_irqsave(&confirm_error_lock, flags); | |
3914ac7b | 315 | |
d9564ad1 | 316 | dn = find_device_pe (dn); |
3914ac7b LV |
317 | |
318 | /* Back up one, since config addrs might be shared */ | |
4980d5eb | 319 | if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent)) |
3914ac7b LV |
320 | dn = dn->parent; |
321 | ||
d9564ad1 LV |
322 | PCI_DN(dn)->eeh_mode &= ~mode_flag; |
323 | PCI_DN(dn)->eeh_check_count = 0; | |
324 | __eeh_clear_slot (dn->child, mode_flag); | |
fd761fd8 LV |
325 | spin_unlock_irqrestore(&confirm_error_lock, flags); |
326 | } | |
327 | ||
1da177e4 LT |
328 | /** |
329 | * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze | |
330 | * @dn device node | |
331 | * @dev pci device, if known | |
332 | * | |
333 | * Check for an EEH failure for the given device node. Call this | |
334 | * routine if the result of a read was all 0xff's and you want to | |
335 | * find out if this is due to an EEH slot freeze. This routine | |
336 | * will query firmware for the EEH status. | |
337 | * | |
338 | * Returns 0 if there has not been an EEH error; otherwise returns | |
69376502 | 339 | * a non-zero value and queues up a slot isolation event notification. |
1da177e4 LT |
340 | * |
341 | * It is safe to call this routine in an interrupt context. | |
342 | */ | |
343 | int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) | |
344 | { | |
345 | int ret; | |
346 | int rets[3]; | |
347 | unsigned long flags; | |
1635317f | 348 | struct pci_dn *pdn; |
fd761fd8 | 349 | int rc = 0; |
1da177e4 | 350 | |
257ffc64 | 351 | total_mmio_ffs++; |
1da177e4 LT |
352 | |
353 | if (!eeh_subsystem_enabled) | |
354 | return 0; | |
355 | ||
177bc936 | 356 | if (!dn) { |
257ffc64 | 357 | no_dn++; |
1da177e4 | 358 | return 0; |
177bc936 | 359 | } |
69376502 | 360 | pdn = PCI_DN(dn); |
1da177e4 LT |
361 | |
362 | /* Access to IO BARs might get this far and still not want checking. */ | |
f8632c82 | 363 | if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) || |
1635317f | 364 | pdn->eeh_mode & EEH_MODE_NOCHECK) { |
257ffc64 | 365 | ignored_check++; |
177bc936 | 366 | #ifdef DEBUG |
f8632c82 LV |
367 | printk ("EEH:ignored check (%x) for %s %s\n", |
368 | pdn->eeh_mode, pci_name (dev), dn->full_name); | |
177bc936 | 369 | #endif |
1da177e4 LT |
370 | return 0; |
371 | } | |
372 | ||
fcb7543e | 373 | if (!pdn->eeh_config_addr && !pdn->eeh_pe_config_addr) { |
257ffc64 | 374 | no_cfg_addr++; |
1da177e4 LT |
375 | return 0; |
376 | } | |
377 | ||
fd761fd8 LV |
378 | /* If we already have a pending isolation event for this |
379 | * slot, we know it's bad already, we don't need to check. | |
380 | * Do this checking under a lock; as multiple PCI devices | |
381 | * in one slot might report errors simultaneously, and we | |
382 | * only want one error recovery routine running. | |
1da177e4 | 383 | */ |
fd761fd8 LV |
384 | spin_lock_irqsave(&confirm_error_lock, flags); |
385 | rc = 1; | |
1635317f | 386 | if (pdn->eeh_mode & EEH_MODE_ISOLATED) { |
5c1344e9 LV |
387 | pdn->eeh_check_count ++; |
388 | if (pdn->eeh_check_count >= EEH_MAX_FAILS) { | |
389 | printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n", | |
390 | pdn->eeh_check_count); | |
391 | dump_stack(); | |
d0e70341 | 392 | msleep(5000); |
5c1344e9 | 393 | |
1da177e4 | 394 | /* re-read the slot reset state */ |
69376502 | 395 | if (read_slot_reset_state(pdn, rets) != 0) |
1da177e4 | 396 | rets[0] = -1; /* reset state unknown */ |
5c1344e9 LV |
397 | |
398 | /* If we are here, then we hit an infinite loop. Stop. */ | |
399 | panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev)); | |
1da177e4 | 400 | } |
fd761fd8 | 401 | goto dn_unlock; |
1da177e4 LT |
402 | } |
403 | ||
404 | /* | |
405 | * Now test for an EEH failure. This is VERY expensive. | |
406 | * Note that the eeh_config_addr may be a parent device | |
407 | * in the case of a device behind a bridge, or it may be | |
408 | * function zero of a multi-function device. | |
409 | * In any case they must share a common PHB. | |
410 | */ | |
69376502 | 411 | ret = read_slot_reset_state(pdn, rets); |
76e6faf7 LV |
412 | |
413 | /* If the call to firmware failed, punt */ | |
414 | if (ret != 0) { | |
415 | printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n", | |
416 | ret, dn->full_name); | |
257ffc64 | 417 | false_positives++; |
fd761fd8 LV |
418 | rc = 0; |
419 | goto dn_unlock; | |
76e6faf7 LV |
420 | } |
421 | ||
39d16e29 LV |
422 | /* Note that config-io to empty slots may fail; |
423 | * they are empty when they don't have children. */ | |
424 | if ((rets[0] == 5) && (dn->child == NULL)) { | |
425 | false_positives++; | |
426 | rc = 0; | |
427 | goto dn_unlock; | |
428 | } | |
429 | ||
76e6faf7 LV |
430 | /* If EEH is not supported on this device, punt. */ |
431 | if (rets[1] != 1) { | |
432 | printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n", | |
433 | ret, dn->full_name); | |
257ffc64 | 434 | false_positives++; |
fd761fd8 LV |
435 | rc = 0; |
436 | goto dn_unlock; | |
76e6faf7 LV |
437 | } |
438 | ||
439 | /* If not the kind of error we know about, punt. */ | |
90375f53 | 440 | if (rets[0] != 1 && rets[0] != 2 && rets[0] != 4 && rets[0] != 5) { |
257ffc64 | 441 | false_positives++; |
fd761fd8 LV |
442 | rc = 0; |
443 | goto dn_unlock; | |
76e6faf7 LV |
444 | } |
445 | ||
257ffc64 | 446 | slot_resets++; |
fd761fd8 LV |
447 | |
448 | /* Avoid repeated reports of this failure, including problems | |
449 | * with other functions on this device, and functions under | |
450 | * bridges. */ | |
d9564ad1 | 451 | eeh_mark_slot (dn, EEH_MODE_ISOLATED); |
fd761fd8 | 452 | spin_unlock_irqrestore(&confirm_error_lock, flags); |
1da177e4 | 453 | |
d0ab95ca | 454 | eeh_send_failure_event (dn, dev); |
77bd7415 | 455 | |
1da177e4 LT |
456 | /* Most EEH events are due to device driver bugs. Having |
457 | * a stack trace will help the device-driver authors figure | |
458 | * out what happened. So print that out. */ | |
90375f53 | 459 | dump_stack(); |
fd761fd8 LV |
460 | return 1; |
461 | ||
462 | dn_unlock: | |
463 | spin_unlock_irqrestore(&confirm_error_lock, flags); | |
464 | return rc; | |
1da177e4 LT |
465 | } |
466 | ||
fd761fd8 | 467 | EXPORT_SYMBOL_GPL(eeh_dn_check_failure); |
1da177e4 LT |
468 | |
469 | /** | |
470 | * eeh_check_failure - check if all 1's data is due to EEH slot freeze | |
471 | * @token i/o token, should be address in the form 0xA.... | |
472 | * @val value, should be all 1's (XXX why do we need this arg??) | |
473 | * | |
1da177e4 LT |
474 | * Check for an EEH failure at the given token address. Call this |
475 | * routine if the result of a read was all 0xff's and you want to | |
476 | * find out if this is due to an EEH slot freeze event. This routine | |
477 | * will query firmware for the EEH status. | |
478 | * | |
479 | * Note this routine is safe to call in an interrupt context. | |
480 | */ | |
481 | unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val) | |
482 | { | |
483 | unsigned long addr; | |
484 | struct pci_dev *dev; | |
485 | struct device_node *dn; | |
486 | ||
487 | /* Finding the phys addr + pci device; this is pretty quick. */ | |
488 | addr = eeh_token_to_phys((unsigned long __force) token); | |
489 | dev = pci_get_device_by_addr(addr); | |
177bc936 | 490 | if (!dev) { |
257ffc64 | 491 | no_device++; |
1da177e4 | 492 | return val; |
177bc936 | 493 | } |
1da177e4 LT |
494 | |
495 | dn = pci_device_to_OF_node(dev); | |
496 | eeh_dn_check_failure (dn, dev); | |
497 | ||
498 | pci_dev_put(dev); | |
499 | return val; | |
500 | } | |
501 | ||
502 | EXPORT_SYMBOL(eeh_check_failure); | |
503 | ||
6dee3fb9 LV |
504 | /* ------------------------------------------------------------- */ |
505 | /* The code below deals with error recovery */ | |
506 | ||
47b5c838 LV |
507 | /** |
508 | * rtas_pci_enable - enable MMIO or DMA transfers for this slot | |
509 | * @pdn pci device node | |
510 | */ | |
511 | ||
512 | int | |
513 | rtas_pci_enable(struct pci_dn *pdn, int function) | |
514 | { | |
515 | int config_addr; | |
516 | int rc; | |
517 | ||
518 | /* Use PE configuration address, if present */ | |
519 | config_addr = pdn->eeh_config_addr; | |
520 | if (pdn->eeh_pe_config_addr) | |
521 | config_addr = pdn->eeh_pe_config_addr; | |
522 | ||
523 | rc = rtas_call(ibm_set_eeh_option, 4, 1, NULL, | |
524 | config_addr, | |
525 | BUID_HI(pdn->phb->buid), | |
526 | BUID_LO(pdn->phb->buid), | |
527 | function); | |
528 | ||
529 | if (rc) | |
fa1be476 | 530 | printk(KERN_WARNING "EEH: Unexpected state change %d, err=%d dn=%s\n", |
47b5c838 LV |
531 | function, rc, pdn->node->full_name); |
532 | ||
fa1be476 LV |
533 | rc = eeh_wait_for_slot_status (pdn, PCI_BUS_RESET_WAIT_MSEC); |
534 | if ((rc == 4) && (function == EEH_THAW_MMIO)) | |
535 | return 0; | |
536 | ||
47b5c838 LV |
537 | return rc; |
538 | } | |
539 | ||
cb5b5624 LV |
540 | /** |
541 | * rtas_pci_slot_reset - raises/lowers the pci #RST line | |
542 | * @pdn pci device node | |
543 | * @state: 1/0 to raise/lower the #RST | |
6dee3fb9 LV |
544 | * |
545 | * Clear the EEH-frozen condition on a slot. This routine | |
546 | * asserts the PCI #RST line if the 'state' argument is '1', | |
547 | * and drops the #RST line if 'state is '0'. This routine is | |
548 | * safe to call in an interrupt context. | |
549 | * | |
550 | */ | |
551 | ||
552 | static void | |
553 | rtas_pci_slot_reset(struct pci_dn *pdn, int state) | |
554 | { | |
25e591f6 | 555 | int config_addr; |
6dee3fb9 LV |
556 | int rc; |
557 | ||
558 | BUG_ON (pdn==NULL); | |
559 | ||
560 | if (!pdn->phb) { | |
561 | printk (KERN_WARNING "EEH: in slot reset, device node %s has no phb\n", | |
562 | pdn->node->full_name); | |
563 | return; | |
564 | } | |
565 | ||
25e591f6 LV |
566 | /* Use PE configuration address, if present */ |
567 | config_addr = pdn->eeh_config_addr; | |
568 | if (pdn->eeh_pe_config_addr) | |
569 | config_addr = pdn->eeh_pe_config_addr; | |
570 | ||
6dee3fb9 | 571 | rc = rtas_call(ibm_set_slot_reset,4,1, NULL, |
25e591f6 | 572 | config_addr, |
6dee3fb9 LV |
573 | BUID_HI(pdn->phb->buid), |
574 | BUID_LO(pdn->phb->buid), | |
575 | state); | |
e1029263 LV |
576 | if (rc) |
577 | printk (KERN_WARNING "EEH: Unable to reset the failed slot," | |
578 | " (%d) #RST=%d dn=%s\n", | |
6dee3fb9 | 579 | rc, state, pdn->node->full_name); |
6dee3fb9 LV |
580 | } |
581 | ||
cb5b5624 LV |
582 | /** |
583 | * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second | |
584 | * @pdn: pci device node to be reset. | |
b6495c0c LV |
585 | * |
586 | * Return 0 if success, else a non-zero value. | |
6dee3fb9 LV |
587 | */ |
588 | ||
e1029263 | 589 | static void __rtas_set_slot_reset(struct pci_dn *pdn) |
6dee3fb9 | 590 | { |
6dee3fb9 LV |
591 | rtas_pci_slot_reset (pdn, 1); |
592 | ||
593 | /* The PCI bus requires that the reset be held high for at least | |
594 | * a 100 milliseconds. We wait a bit longer 'just in case'. */ | |
595 | ||
596 | #define PCI_BUS_RST_HOLD_TIME_MSEC 250 | |
597 | msleep (PCI_BUS_RST_HOLD_TIME_MSEC); | |
d9564ad1 LV |
598 | |
599 | /* We might get hit with another EEH freeze as soon as the | |
600 | * pci slot reset line is dropped. Make sure we don't miss | |
601 | * these, and clear the flag now. */ | |
602 | eeh_clear_slot (pdn->node, EEH_MODE_ISOLATED); | |
603 | ||
6dee3fb9 LV |
604 | rtas_pci_slot_reset (pdn, 0); |
605 | ||
606 | /* After a PCI slot has been reset, the PCI Express spec requires | |
607 | * a 1.5 second idle time for the bus to stabilize, before starting | |
608 | * up traffic. */ | |
609 | #define PCI_BUS_SETTLE_TIME_MSEC 1800 | |
610 | msleep (PCI_BUS_SETTLE_TIME_MSEC); | |
e1029263 LV |
611 | } |
612 | ||
613 | int rtas_set_slot_reset(struct pci_dn *pdn) | |
614 | { | |
615 | int i, rc; | |
616 | ||
9c547768 LV |
617 | /* Take three shots at resetting the bus */ |
618 | for (i=0; i<3; i++) { | |
619 | __rtas_set_slot_reset(pdn); | |
6dee3fb9 | 620 | |
9c547768 | 621 | rc = eeh_wait_for_slot_status(pdn, PCI_BUS_RESET_WAIT_MSEC); |
b6495c0c LV |
622 | if (rc == 0) |
623 | return 0; | |
e1029263 | 624 | |
e1029263 LV |
625 | if (rc < 0) { |
626 | printk (KERN_ERR "EEH: unrecoverable slot failure %s\n", | |
627 | pdn->node->full_name); | |
b6495c0c | 628 | return -1; |
e1029263 | 629 | } |
9c547768 LV |
630 | printk (KERN_ERR "EEH: bus reset %d failed on slot %s\n", |
631 | i+1, pdn->node->full_name); | |
6dee3fb9 | 632 | } |
b6495c0c | 633 | |
9c547768 | 634 | return -1; |
6dee3fb9 LV |
635 | } |
636 | ||
8b553f32 LV |
637 | /* ------------------------------------------------------- */ |
638 | /** Save and restore of PCI BARs | |
639 | * | |
640 | * Although firmware will set up BARs during boot, it doesn't | |
641 | * set up device BAR's after a device reset, although it will, | |
642 | * if requested, set up bridge configuration. Thus, we need to | |
643 | * configure the PCI devices ourselves. | |
644 | */ | |
645 | ||
646 | /** | |
647 | * __restore_bars - Restore the Base Address Registers | |
cb5b5624 LV |
648 | * @pdn: pci device node |
649 | * | |
8b553f32 LV |
650 | * Loads the PCI configuration space base address registers, |
651 | * the expansion ROM base address, the latency timer, and etc. | |
652 | * from the saved values in the device node. | |
653 | */ | |
654 | static inline void __restore_bars (struct pci_dn *pdn) | |
655 | { | |
656 | int i; | |
657 | ||
658 | if (NULL==pdn->phb) return; | |
659 | for (i=4; i<10; i++) { | |
660 | rtas_write_config(pdn, i*4, 4, pdn->config_space[i]); | |
661 | } | |
662 | ||
663 | /* 12 == Expansion ROM Address */ | |
664 | rtas_write_config(pdn, 12*4, 4, pdn->config_space[12]); | |
665 | ||
666 | #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF)) | |
667 | #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)]) | |
668 | ||
669 | rtas_write_config (pdn, PCI_CACHE_LINE_SIZE, 1, | |
670 | SAVED_BYTE(PCI_CACHE_LINE_SIZE)); | |
671 | ||
672 | rtas_write_config (pdn, PCI_LATENCY_TIMER, 1, | |
673 | SAVED_BYTE(PCI_LATENCY_TIMER)); | |
674 | ||
675 | /* max latency, min grant, interrupt pin and line */ | |
676 | rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]); | |
677 | } | |
678 | ||
679 | /** | |
680 | * eeh_restore_bars - restore the PCI config space info | |
681 | * | |
682 | * This routine performs a recursive walk to the children | |
683 | * of this device as well. | |
684 | */ | |
685 | void eeh_restore_bars(struct pci_dn *pdn) | |
686 | { | |
687 | struct device_node *dn; | |
688 | if (!pdn) | |
689 | return; | |
690 | ||
7684b40c | 691 | if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(pdn->class_code)) |
8b553f32 LV |
692 | __restore_bars (pdn); |
693 | ||
694 | dn = pdn->node->child; | |
695 | while (dn) { | |
696 | eeh_restore_bars (PCI_DN(dn)); | |
697 | dn = dn->sibling; | |
698 | } | |
699 | } | |
700 | ||
701 | /** | |
702 | * eeh_save_bars - save device bars | |
703 | * | |
704 | * Save the values of the device bars. Unlike the restore | |
705 | * routine, this routine is *not* recursive. This is because | |
706 | * PCI devices are added individuallly; but, for the restore, | |
707 | * an entire slot is reset at a time. | |
708 | */ | |
7684b40c | 709 | static void eeh_save_bars(struct pci_dn *pdn) |
8b553f32 LV |
710 | { |
711 | int i; | |
712 | ||
7684b40c | 713 | if (!pdn ) |
8b553f32 LV |
714 | return; |
715 | ||
716 | for (i = 0; i < 16; i++) | |
7684b40c | 717 | rtas_read_config(pdn, i * 4, 4, &pdn->config_space[i]); |
8b553f32 LV |
718 | } |
719 | ||
720 | void | |
721 | rtas_configure_bridge(struct pci_dn *pdn) | |
722 | { | |
fcb7543e | 723 | int config_addr; |
8b553f32 LV |
724 | int rc; |
725 | ||
fcb7543e LV |
726 | /* Use PE configuration address, if present */ |
727 | config_addr = pdn->eeh_config_addr; | |
728 | if (pdn->eeh_pe_config_addr) | |
729 | config_addr = pdn->eeh_pe_config_addr; | |
730 | ||
21e464dd | 731 | rc = rtas_call(ibm_configure_bridge,3,1, NULL, |
fcb7543e | 732 | config_addr, |
8b553f32 LV |
733 | BUID_HI(pdn->phb->buid), |
734 | BUID_LO(pdn->phb->buid)); | |
735 | if (rc) { | |
736 | printk (KERN_WARNING "EEH: Unable to configure device bridge (%d) for %s\n", | |
737 | rc, pdn->node->full_name); | |
738 | } | |
739 | } | |
740 | ||
172ca926 LV |
741 | /* ------------------------------------------------------------- */ |
742 | /* The code below deals with enabling EEH for devices during the | |
743 | * early boot sequence. EEH must be enabled before any PCI probing | |
744 | * can be done. | |
745 | */ | |
746 | ||
747 | #define EEH_ENABLE 1 | |
748 | ||
1da177e4 LT |
749 | struct eeh_early_enable_info { |
750 | unsigned int buid_hi; | |
751 | unsigned int buid_lo; | |
752 | }; | |
753 | ||
147d6a37 LV |
754 | static int get_pe_addr (int config_addr, |
755 | struct eeh_early_enable_info *info) | |
756 | { | |
757 | unsigned int rets[3]; | |
758 | int ret; | |
759 | ||
760 | /* Use latest config-addr token on power6 */ | |
761 | if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) { | |
762 | /* Make sure we have a PE in hand */ | |
763 | ret = rtas_call (ibm_get_config_addr_info2, 4, 2, rets, | |
764 | config_addr, info->buid_hi, info->buid_lo, 1); | |
765 | if (ret || (rets[0]==0)) | |
766 | return 0; | |
767 | ||
768 | ret = rtas_call (ibm_get_config_addr_info2, 4, 2, rets, | |
769 | config_addr, info->buid_hi, info->buid_lo, 0); | |
770 | if (ret) | |
771 | return 0; | |
772 | return rets[0]; | |
773 | } | |
774 | ||
775 | /* Use older config-addr token on power5 */ | |
776 | if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) { | |
777 | ret = rtas_call (ibm_get_config_addr_info, 4, 2, rets, | |
778 | config_addr, info->buid_hi, info->buid_lo, 0); | |
779 | if (ret) | |
780 | return 0; | |
781 | return rets[0]; | |
782 | } | |
783 | return 0; | |
784 | } | |
785 | ||
1da177e4 LT |
786 | /* Enable eeh for the given device node. */ |
787 | static void *early_enable_eeh(struct device_node *dn, void *data) | |
788 | { | |
25c4a46f | 789 | unsigned int rets[3]; |
1da177e4 LT |
790 | struct eeh_early_enable_info *info = data; |
791 | int ret; | |
e2eb6392 SR |
792 | const char *status = of_get_property(dn, "status", NULL); |
793 | const u32 *class_code = of_get_property(dn, "class-code", NULL); | |
794 | const u32 *vendor_id = of_get_property(dn, "vendor-id", NULL); | |
795 | const u32 *device_id = of_get_property(dn, "device-id", NULL); | |
954a46e2 | 796 | const u32 *regs; |
1da177e4 | 797 | int enable; |
69376502 | 798 | struct pci_dn *pdn = PCI_DN(dn); |
1da177e4 | 799 | |
0f17574a | 800 | pdn->class_code = 0; |
1635317f | 801 | pdn->eeh_mode = 0; |
5c1344e9 LV |
802 | pdn->eeh_check_count = 0; |
803 | pdn->eeh_freeze_count = 0; | |
1da177e4 LT |
804 | |
805 | if (status && strcmp(status, "ok") != 0) | |
806 | return NULL; /* ignore devices with bad status */ | |
807 | ||
808 | /* Ignore bad nodes. */ | |
809 | if (!class_code || !vendor_id || !device_id) | |
810 | return NULL; | |
811 | ||
812 | /* There is nothing to check on PCI to ISA bridges */ | |
813 | if (dn->type && !strcmp(dn->type, "isa")) { | |
1635317f | 814 | pdn->eeh_mode |= EEH_MODE_NOCHECK; |
1da177e4 LT |
815 | return NULL; |
816 | } | |
0f17574a | 817 | pdn->class_code = *class_code; |
1da177e4 LT |
818 | |
819 | /* | |
820 | * Now decide if we are going to "Disable" EEH checking | |
821 | * for this device. We still run with the EEH hardware active, | |
822 | * but we won't be checking for ff's. This means a driver | |
823 | * could return bad data (very bad!), an interrupt handler could | |
824 | * hang waiting on status bits that won't change, etc. | |
825 | * But there are a few cases like display devices that make sense. | |
826 | */ | |
827 | enable = 1; /* i.e. we will do checking */ | |
77bd7415 | 828 | #if 0 |
1da177e4 LT |
829 | if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY) |
830 | enable = 0; | |
77bd7415 | 831 | #endif |
1da177e4 LT |
832 | |
833 | if (!enable) | |
1635317f | 834 | pdn->eeh_mode |= EEH_MODE_NOCHECK; |
1da177e4 LT |
835 | |
836 | /* Ok... see if this device supports EEH. Some do, some don't, | |
837 | * and the only way to find out is to check each and every one. */ | |
e2eb6392 | 838 | regs = of_get_property(dn, "reg", NULL); |
1da177e4 LT |
839 | if (regs) { |
840 | /* First register entry is addr (00BBSS00) */ | |
841 | /* Try to enable eeh */ | |
842 | ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL, | |
172ca926 LV |
843 | regs[0], info->buid_hi, info->buid_lo, |
844 | EEH_ENABLE); | |
845 | ||
25c4a46f | 846 | enable = 0; |
1da177e4 | 847 | if (ret == 0) { |
1635317f | 848 | pdn->eeh_config_addr = regs[0]; |
25e591f6 LV |
849 | |
850 | /* If the newer, better, ibm,get-config-addr-info is supported, | |
851 | * then use that instead. */ | |
147d6a37 | 852 | pdn->eeh_pe_config_addr = get_pe_addr(pdn->eeh_config_addr, info); |
25c4a46f LV |
853 | |
854 | /* Some older systems (Power4) allow the | |
855 | * ibm,set-eeh-option call to succeed even on nodes | |
856 | * where EEH is not supported. Verify support | |
857 | * explicitly. */ | |
858 | ret = read_slot_reset_state(pdn, rets); | |
859 | if ((ret == 0) && (rets[1] == 1)) | |
860 | enable = 1; | |
861 | } | |
862 | ||
863 | if (enable) { | |
864 | eeh_subsystem_enabled = 1; | |
865 | pdn->eeh_mode |= EEH_MODE_SUPPORTED; | |
866 | ||
1da177e4 | 867 | #ifdef DEBUG |
25e591f6 LV |
868 | printk(KERN_DEBUG "EEH: %s: eeh enabled, config=%x pe_config=%x\n", |
869 | dn->full_name, pdn->eeh_config_addr, pdn->eeh_pe_config_addr); | |
1da177e4 LT |
870 | #endif |
871 | } else { | |
872 | ||
873 | /* This device doesn't support EEH, but it may have an | |
874 | * EEH parent, in which case we mark it as supported. */ | |
69376502 | 875 | if (dn->parent && PCI_DN(dn->parent) |
1635317f | 876 | && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) { |
1da177e4 | 877 | /* Parent supports EEH. */ |
1635317f PM |
878 | pdn->eeh_mode |= EEH_MODE_SUPPORTED; |
879 | pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr; | |
1da177e4 LT |
880 | return NULL; |
881 | } | |
882 | } | |
883 | } else { | |
884 | printk(KERN_WARNING "EEH: %s: unable to get reg property.\n", | |
885 | dn->full_name); | |
886 | } | |
887 | ||
7684b40c | 888 | eeh_save_bars(pdn); |
69376502 | 889 | return NULL; |
1da177e4 LT |
890 | } |
891 | ||
892 | /* | |
893 | * Initialize EEH by trying to enable it for all of the adapters in the system. | |
894 | * As a side effect we can determine here if eeh is supported at all. | |
895 | * Note that we leave EEH on so failed config cycles won't cause a machine | |
896 | * check. If a user turns off EEH for a particular adapter they are really | |
897 | * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't | |
898 | * grant access to a slot if EEH isn't enabled, and so we always enable | |
899 | * EEH for all slots/all devices. | |
900 | * | |
901 | * The eeh-force-off option disables EEH checking globally, for all slots. | |
902 | * Even if force-off is set, the EEH hardware is still enabled, so that | |
903 | * newer systems can boot. | |
904 | */ | |
905 | void __init eeh_init(void) | |
906 | { | |
907 | struct device_node *phb, *np; | |
908 | struct eeh_early_enable_info info; | |
909 | ||
fd761fd8 | 910 | spin_lock_init(&confirm_error_lock); |
df7242b1 LV |
911 | spin_lock_init(&slot_errbuf_lock); |
912 | ||
1da177e4 LT |
913 | np = of_find_node_by_path("/rtas"); |
914 | if (np == NULL) | |
915 | return; | |
916 | ||
917 | ibm_set_eeh_option = rtas_token("ibm,set-eeh-option"); | |
918 | ibm_set_slot_reset = rtas_token("ibm,set-slot-reset"); | |
919 | ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2"); | |
920 | ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state"); | |
921 | ibm_slot_error_detail = rtas_token("ibm,slot-error-detail"); | |
25e591f6 | 922 | ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info"); |
147d6a37 | 923 | ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2"); |
21e464dd | 924 | ibm_configure_bridge = rtas_token ("ibm,configure-bridge"); |
1da177e4 LT |
925 | |
926 | if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE) | |
927 | return; | |
928 | ||
929 | eeh_error_buf_size = rtas_token("rtas-error-log-max"); | |
930 | if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) { | |
931 | eeh_error_buf_size = 1024; | |
932 | } | |
933 | if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) { | |
934 | printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated " | |
935 | "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX); | |
936 | eeh_error_buf_size = RTAS_ERROR_LOG_MAX; | |
937 | } | |
938 | ||
939 | /* Enable EEH for all adapters. Note that eeh requires buid's */ | |
940 | for (phb = of_find_node_by_name(NULL, "pci"); phb; | |
941 | phb = of_find_node_by_name(phb, "pci")) { | |
942 | unsigned long buid; | |
943 | ||
944 | buid = get_phb_buid(phb); | |
69376502 | 945 | if (buid == 0 || PCI_DN(phb) == NULL) |
1da177e4 LT |
946 | continue; |
947 | ||
948 | info.buid_lo = BUID_LO(buid); | |
949 | info.buid_hi = BUID_HI(buid); | |
950 | traverse_pci_devices(phb, early_enable_eeh, &info); | |
951 | } | |
952 | ||
953 | if (eeh_subsystem_enabled) | |
954 | printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n"); | |
955 | else | |
956 | printk(KERN_WARNING "EEH: No capable adapters found\n"); | |
957 | } | |
958 | ||
959 | /** | |
960 | * eeh_add_device_early - enable EEH for the indicated device_node | |
961 | * @dn: device node for which to set up EEH | |
962 | * | |
963 | * This routine must be used to perform EEH initialization for PCI | |
964 | * devices that were added after system boot (e.g. hotplug, dlpar). | |
965 | * This routine must be called before any i/o is performed to the | |
966 | * adapter (inluding any config-space i/o). | |
967 | * Whether this actually enables EEH or not for this device depends | |
968 | * on the CEC architecture, type of the device, on earlier boot | |
969 | * command-line arguments & etc. | |
970 | */ | |
794e085e | 971 | static void eeh_add_device_early(struct device_node *dn) |
1da177e4 LT |
972 | { |
973 | struct pci_controller *phb; | |
974 | struct eeh_early_enable_info info; | |
975 | ||
69376502 | 976 | if (!dn || !PCI_DN(dn)) |
1da177e4 | 977 | return; |
1635317f | 978 | phb = PCI_DN(dn)->phb; |
f751f841 LV |
979 | |
980 | /* USB Bus children of PCI devices will not have BUID's */ | |
981 | if (NULL == phb || 0 == phb->buid) | |
1da177e4 | 982 | return; |
1da177e4 LT |
983 | |
984 | info.buid_hi = BUID_HI(phb->buid); | |
985 | info.buid_lo = BUID_LO(phb->buid); | |
986 | early_enable_eeh(dn, &info); | |
987 | } | |
1da177e4 | 988 | |
e2a296ee LV |
989 | void eeh_add_device_tree_early(struct device_node *dn) |
990 | { | |
991 | struct device_node *sib; | |
992 | for (sib = dn->child; sib; sib = sib->sibling) | |
993 | eeh_add_device_tree_early(sib); | |
994 | eeh_add_device_early(dn); | |
995 | } | |
996 | EXPORT_SYMBOL_GPL(eeh_add_device_tree_early); | |
997 | ||
1da177e4 LT |
998 | /** |
999 | * eeh_add_device_late - perform EEH initialization for the indicated pci device | |
1000 | * @dev: pci device for which to set up EEH | |
1001 | * | |
1002 | * This routine must be used to complete EEH initialization for PCI | |
1003 | * devices that were added after system boot (e.g. hotplug, dlpar). | |
1004 | */ | |
794e085e | 1005 | static void eeh_add_device_late(struct pci_dev *dev) |
1da177e4 | 1006 | { |
56b0fca3 | 1007 | struct device_node *dn; |
8b553f32 | 1008 | struct pci_dn *pdn; |
56b0fca3 | 1009 | |
1da177e4 LT |
1010 | if (!dev || !eeh_subsystem_enabled) |
1011 | return; | |
1012 | ||
1013 | #ifdef DEBUG | |
982245f0 | 1014 | printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev)); |
1da177e4 LT |
1015 | #endif |
1016 | ||
56b0fca3 LV |
1017 | pci_dev_get (dev); |
1018 | dn = pci_device_to_OF_node(dev); | |
8b553f32 LV |
1019 | pdn = PCI_DN(dn); |
1020 | pdn->pcidev = dev; | |
56b0fca3 | 1021 | |
1da177e4 LT |
1022 | pci_addr_cache_insert_device (dev); |
1023 | } | |
794e085e NF |
1024 | |
1025 | void eeh_add_device_tree_late(struct pci_bus *bus) | |
1026 | { | |
1027 | struct pci_dev *dev; | |
1028 | ||
1029 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
1030 | eeh_add_device_late(dev); | |
1031 | if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { | |
1032 | struct pci_bus *subbus = dev->subordinate; | |
1033 | if (subbus) | |
1034 | eeh_add_device_tree_late(subbus); | |
1035 | } | |
1036 | } | |
1037 | } | |
1038 | EXPORT_SYMBOL_GPL(eeh_add_device_tree_late); | |
1da177e4 LT |
1039 | |
1040 | /** | |
1041 | * eeh_remove_device - undo EEH setup for the indicated pci device | |
1042 | * @dev: pci device to be removed | |
1043 | * | |
794e085e NF |
1044 | * This routine should be called when a device is removed from |
1045 | * a running system (e.g. by hotplug or dlpar). It unregisters | |
1046 | * the PCI device from the EEH subsystem. I/O errors affecting | |
1047 | * this device will no longer be detected after this call; thus, | |
1048 | * i/o errors affecting this slot may leave this device unusable. | |
1da177e4 | 1049 | */ |
794e085e | 1050 | static void eeh_remove_device(struct pci_dev *dev) |
1da177e4 | 1051 | { |
56b0fca3 | 1052 | struct device_node *dn; |
1da177e4 LT |
1053 | if (!dev || !eeh_subsystem_enabled) |
1054 | return; | |
1055 | ||
1056 | /* Unregister the device with the EEH/PCI address search system */ | |
1057 | #ifdef DEBUG | |
982245f0 | 1058 | printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev)); |
1da177e4 LT |
1059 | #endif |
1060 | pci_addr_cache_remove_device(dev); | |
56b0fca3 LV |
1061 | |
1062 | dn = pci_device_to_OF_node(dev); | |
b055a9e1 LV |
1063 | if (PCI_DN(dn)->pcidev) { |
1064 | PCI_DN(dn)->pcidev = NULL; | |
1065 | pci_dev_put (dev); | |
1066 | } | |
1da177e4 | 1067 | } |
1da177e4 | 1068 | |
e2a296ee LV |
1069 | void eeh_remove_bus_device(struct pci_dev *dev) |
1070 | { | |
794e085e NF |
1071 | struct pci_bus *bus = dev->subordinate; |
1072 | struct pci_dev *child, *tmp; | |
1073 | ||
e2a296ee | 1074 | eeh_remove_device(dev); |
794e085e NF |
1075 | |
1076 | if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { | |
1077 | list_for_each_entry_safe(child, tmp, &bus->devices, bus_list) | |
1078 | eeh_remove_bus_device(child); | |
e2a296ee LV |
1079 | } |
1080 | } | |
1081 | EXPORT_SYMBOL_GPL(eeh_remove_bus_device); | |
1082 | ||
1da177e4 LT |
1083 | static int proc_eeh_show(struct seq_file *m, void *v) |
1084 | { | |
1da177e4 LT |
1085 | if (0 == eeh_subsystem_enabled) { |
1086 | seq_printf(m, "EEH Subsystem is globally disabled\n"); | |
257ffc64 | 1087 | seq_printf(m, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs); |
1da177e4 LT |
1088 | } else { |
1089 | seq_printf(m, "EEH Subsystem is enabled\n"); | |
177bc936 LV |
1090 | seq_printf(m, |
1091 | "no device=%ld\n" | |
1092 | "no device node=%ld\n" | |
1093 | "no config address=%ld\n" | |
1094 | "check not wanted=%ld\n" | |
1095 | "eeh_total_mmio_ffs=%ld\n" | |
1096 | "eeh_false_positives=%ld\n" | |
1097 | "eeh_ignored_failures=%ld\n" | |
1098 | "eeh_slot_resets=%ld\n", | |
257ffc64 LV |
1099 | no_device, no_dn, no_cfg_addr, |
1100 | ignored_check, total_mmio_ffs, | |
1101 | false_positives, ignored_failures, | |
1102 | slot_resets); | |
1da177e4 LT |
1103 | } |
1104 | ||
1105 | return 0; | |
1106 | } | |
1107 | ||
1108 | static int proc_eeh_open(struct inode *inode, struct file *file) | |
1109 | { | |
1110 | return single_open(file, proc_eeh_show, NULL); | |
1111 | } | |
1112 | ||
5dfe4c96 | 1113 | static const struct file_operations proc_eeh_operations = { |
1da177e4 LT |
1114 | .open = proc_eeh_open, |
1115 | .read = seq_read, | |
1116 | .llseek = seq_lseek, | |
1117 | .release = single_release, | |
1118 | }; | |
1119 | ||
1120 | static int __init eeh_init_proc(void) | |
1121 | { | |
1122 | struct proc_dir_entry *e; | |
1123 | ||
e8222502 | 1124 | if (machine_is(pseries)) { |
1da177e4 LT |
1125 | e = create_proc_entry("ppc64/eeh", 0, NULL); |
1126 | if (e) | |
1127 | e->proc_fops = &proc_eeh_operations; | |
1128 | } | |
1129 | ||
1130 | return 0; | |
1131 | } | |
1132 | __initcall(eeh_init_proc); |