[PATCH] powerpc: Kill ppcdebug
[deliverable/linux.git] / arch / powerpc / platforms / pseries / setup.c
CommitLineData
1da177e4 1/*
033ef338 2 * 64-bit pSeries and RS/6000 setup code.
1da177e4
LT
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15/*
16 * bootup setup stuff..
17 */
18
19#undef DEBUG
20
21#include <linux/config.h>
62d60e9f 22#include <linux/cpu.h>
1da177e4
LT
23#include <linux/errno.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/stddef.h>
28#include <linux/unistd.h>
29#include <linux/slab.h>
30#include <linux/user.h>
31#include <linux/a.out.h>
32#include <linux/tty.h>
33#include <linux/major.h>
34#include <linux/interrupt.h>
35#include <linux/reboot.h>
36#include <linux/init.h>
37#include <linux/ioport.h>
38#include <linux/console.h>
39#include <linux/pci.h>
cebb2b15 40#include <linux/utsname.h>
1da177e4
LT
41#include <linux/adb.h>
42#include <linux/module.h>
43#include <linux/delay.h>
44#include <linux/irq.h>
45#include <linux/seq_file.h>
46#include <linux/root_dev.h>
47
48#include <asm/mmu.h>
49#include <asm/processor.h>
50#include <asm/io.h>
51#include <asm/pgtable.h>
52#include <asm/prom.h>
53#include <asm/rtas.h>
54#include <asm/pci-bridge.h>
55#include <asm/iommu.h>
56#include <asm/dma.h>
57#include <asm/machdep.h>
58#include <asm/irq.h>
59#include <asm/time.h>
60#include <asm/nvram.h>
007e8f51 61#include "xics.h"
1ababe11 62#include <asm/firmware.h>
180a3362 63#include <asm/pmc.h>
bbeb3f4c 64#include <asm/mpic.h>
d387899f 65#include <asm/ppc-pci.h>
69a80d3f
PM
66#include <asm/i8259.h>
67#include <asm/udbg.h>
1da177e4 68
a1218720
ME
69#include "plpar_wrappers.h"
70
1da177e4
LT
71#ifdef DEBUG
72#define DBG(fmt...) udbg_printf(fmt)
73#else
74#define DBG(fmt...)
75#endif
76
1da177e4
LT
77extern void find_udbg_vterm(void);
78extern void system_reset_fwnmi(void); /* from head.S */
79extern void machine_check_fwnmi(void); /* from head.S */
80extern void generic_find_legacy_serial_ports(u64 *physport,
81 unsigned int *default_speed);
82
83int fwnmi_active; /* TRUE if an FWNMI handler is present */
84
1da177e4
LT
85extern void pSeries_system_reset_exception(struct pt_regs *regs);
86extern int pSeries_machine_check_exception(struct pt_regs *regs);
87
143a1dec
PM
88static void pseries_shared_idle(void);
89static void pseries_dedicated_idle(void);
62d60e9f 90
1da177e4
LT
91struct mpic *pSeries_mpic;
92
0dd194d0 93void pSeries_show_cpuinfo(struct seq_file *m)
1da177e4
LT
94{
95 struct device_node *root;
96 const char *model = "";
97
98 root = of_find_node_by_path("/");
99 if (root)
100 model = get_property(root, "model", NULL);
101 seq_printf(m, "machine\t\t: CHRP %s\n", model);
102 of_node_put(root);
103}
104
105/* Initialize firmware assisted non-maskable interrupts if
106 * the firmware supports this feature.
107 *
108 */
109static void __init fwnmi_init(void)
110{
111 int ret;
112 int ibm_nmi_register = rtas_token("ibm,nmi-register");
113 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
114 return;
115 ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
116 __pa((unsigned long)system_reset_fwnmi),
117 __pa((unsigned long)machine_check_fwnmi));
118 if (ret == 0)
119 fwnmi_active = 1;
120}
121
1da177e4
LT
122static void __init pSeries_init_mpic(void)
123{
124 unsigned int *addrp;
125 struct device_node *np;
f9bd170a 126 unsigned long intack = 0;
1da177e4
LT
127
128 /* All ISUs are setup, complete initialization */
129 mpic_init(pSeries_mpic);
130
131 /* Check what kind of cascade ACK we have */
132 if (!(np = of_find_node_by_name(NULL, "pci"))
133 || !(addrp = (unsigned int *)
134 get_property(np, "8259-interrupt-acknowledge", NULL)))
135 printk(KERN_ERR "Cannot find pci to get ack address\n");
136 else
f9bd170a 137 intack = addrp[prom_n_addr_cells(np)-1];
1da177e4
LT
138 of_node_put(np);
139
140 /* Setup the legacy interrupts & controller */
f9bd170a 141 i8259_init(intack, 0);
1da177e4
LT
142
143 /* Hook cascade to mpic */
f9bd170a 144 mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
1da177e4
LT
145}
146
147static void __init pSeries_setup_mpic(void)
148{
149 unsigned int *opprop;
150 unsigned long openpic_addr = 0;
151 unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
152 struct device_node *root;
153 int irq_count;
154
155 /* Find the Open PIC if present */
156 root = of_find_node_by_path("/");
157 opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
158 if (opprop != 0) {
159 int n = prom_n_addr_cells(root);
160
161 for (openpic_addr = 0; n > 0; --n)
162 openpic_addr = (openpic_addr << 32) + *opprop++;
163 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
164 }
165 of_node_put(root);
166
167 BUG_ON(openpic_addr == 0);
168
169 /* Get the sense values from OF */
170 prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
171
172 /* Setup the openpic driver */
173 irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
174 pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
175 16, 16, irq_count, /* isu size, irq offset, irq count */
176 NR_IRQS - 4, /* ipi offset */
177 senses, irq_count, /* sense & sense size */
178 " MPIC ");
179}
180
180a3362
ME
181static void pseries_lpar_enable_pmcs(void)
182{
183 unsigned long set, reset;
184
185 power4_enable_pmcs();
186
187 set = 1UL << 63;
188 reset = 0;
189 plpar_hcall_norets(H_PERFMON, set, reset);
190
191 /* instruct hypervisor to maintain PMCs */
192 if (firmware_has_feature(FW_FEATURE_SPLPAR))
193 get_paca()->lppaca.pmcregs_in_use = 1;
194}
195
1da177e4
LT
196static void __init pSeries_setup_arch(void)
197{
198 /* Fixup ppc_md depending on the type of interrupt controller */
199 if (ppc64_interrupt_controller == IC_OPEN_PIC) {
fce0d574 200 ppc_md.init_IRQ = pSeries_init_mpic;
1da177e4 201 ppc_md.get_irq = mpic_get_irq;
fce0d574 202 ppc_md.cpu_irq_down = mpic_teardown_this_cpu;
1da177e4
LT
203 /* Allocate the mpic now, so that find_and_init_phbs() can
204 * fill the ISUs */
205 pSeries_setup_mpic();
206 } else {
207 ppc_md.init_IRQ = xics_init_IRQ;
208 ppc_md.get_irq = xics_get_irq;
fce0d574 209 ppc_md.cpu_irq_down = xics_teardown_cpu;
1da177e4
LT
210 }
211
212#ifdef CONFIG_SMP
213 smp_init_pSeries();
214#endif
215 /* openpic global configuration register (64-bit format). */
216 /* openpic Interrupt Source Unit pointer (64-bit format). */
217 /* python0 facility area (mmio) (64-bit format) REAL address. */
218
219 /* init to some ~sane value until calibrate_delay() runs */
220 loops_per_jiffy = 50000000;
221
222 if (ROOT_DEV == 0) {
223 printk("No ramdisk, default root is /dev/sda2\n");
224 ROOT_DEV = Root_SDA2;
225 }
226
227 fwnmi_init();
228
229 /* Find and initialize PCI host bridges */
230 init_pci_config_tokens();
1da177e4 231 find_and_init_phbs();
0160f53e 232 eeh_init();
1da177e4 233
1da177e4
LT
234 pSeries_nvram_init();
235
62d60e9f 236 /* Choose an idle loop */
1ababe11 237 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
8d15a3e5 238 vpa_init(boot_cpuid);
62d60e9f
ME
239 if (get_paca()->lppaca.shared_proc) {
240 printk(KERN_INFO "Using shared processor idle loop\n");
050a0938 241 ppc_md.idle_loop = pseries_shared_idle;
62d60e9f
ME
242 } else {
243 printk(KERN_INFO "Using dedicated idle loop\n");
050a0938 244 ppc_md.idle_loop = pseries_dedicated_idle;
62d60e9f
ME
245 }
246 } else {
247 printk(KERN_INFO "Using default idle loop\n");
248 ppc_md.idle_loop = default_idle;
249 }
180a3362
ME
250
251 if (systemcfg->platform & PLATFORM_LPAR)
252 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
253 else
254 ppc_md.enable_pmcs = power4_enable_pmcs;
1da177e4
LT
255}
256
257static int __init pSeries_init_panel(void)
258{
259 /* Manually leave the kernel version on the panel. */
260 ppc_md.progress("Linux ppc64\n", 0);
cebb2b15 261 ppc_md.progress(system_utsname.version, 0);
1da177e4
LT
262
263 return 0;
264}
265arch_initcall(pSeries_init_panel);
266
267
7a6af5e3 268/* Build up the ppc64_firmware_features bitmask field
1da177e4
LT
269 * using contents of device-tree/ibm,hypertas-functions.
270 * Ultimately this functionality may be moved into prom.c prom_init().
271 */
aed31351 272static void __init fw_feature_init(void)
1da177e4
LT
273{
274 struct device_node * dn;
275 char * hypertas;
276 unsigned int len;
277
278 DBG(" -> fw_feature_init()\n");
279
7a6af5e3 280 ppc64_firmware_features = 0;
1da177e4
LT
281 dn = of_find_node_by_path("/rtas");
282 if (dn == NULL) {
283 printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
284 goto no_rtas;
285 }
286
287 hypertas = get_property(dn, "ibm,hypertas-functions", &len);
288 if (hypertas) {
289 while (len > 0){
290 int i, hypertas_len;
291 /* check value against table of strings */
292 for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
293 if ((firmware_features_table[i].name) &&
294 (strcmp(firmware_features_table[i].name,hypertas))==0) {
295 /* we have a match */
7a6af5e3 296 ppc64_firmware_features |=
1da177e4
LT
297 (firmware_features_table[i].val);
298 break;
299 }
300 }
301 hypertas_len = strlen(hypertas);
302 len -= hypertas_len +1;
303 hypertas+= hypertas_len +1;
304 }
305 }
306
307 of_node_put(dn);
308 no_rtas:
309 printk(KERN_INFO "firmware_features = 0x%lx\n",
7a6af5e3 310 ppc64_firmware_features);
1da177e4
LT
311
312 DBG(" <- fw_feature_init()\n");
313}
314
315
316static void __init pSeries_discover_pic(void)
317{
318 struct device_node *np;
319 char *typep;
320
321 /*
322 * Setup interrupt mapping options that are needed for finish_device_tree
323 * to properly parse the OF interrupt tree & do the virtual irq mapping
324 */
325 __irq_offset_value = NUM_ISA_INTERRUPTS;
326 ppc64_interrupt_controller = IC_INVALID;
327 for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
328 typep = (char *)get_property(np, "compatible", NULL);
329 if (strstr(typep, "open-pic"))
330 ppc64_interrupt_controller = IC_OPEN_PIC;
331 else if (strstr(typep, "ppc-xicp"))
332 ppc64_interrupt_controller = IC_PPC_XIC;
333 else
334 printk("pSeries_discover_pic: failed to recognize"
335 " interrupt-controller\n");
336 break;
337 }
338}
339
340static void pSeries_mach_cpu_die(void)
341{
342 local_irq_disable();
343 idle_task_exit();
344 /* Some hardware requires clearing the CPPR, while other hardware does not
345 * it is safe either way
346 */
347 pSeriesLP_cppr_info(0, 0);
348 rtas_stop_self();
349 /* Should never get here... */
350 BUG();
351 for(;;);
352}
353
cab0af98
ME
354static int pseries_set_dabr(unsigned long dabr)
355{
356 if (firmware_has_feature(FW_FEATURE_XDABR)) {
357 /* We want to catch accesses from kernel and userspace */
358 return plpar_set_xdabr(dabr, H_DABRX_KERNEL | H_DABRX_USER);
359 }
360
361 return plpar_set_dabr(dabr);
362}
363
1da177e4
LT
364
365/*
366 * Early initialization. Relocation is on but do not reference unbolted pages
367 */
368static void __init pSeries_init_early(void)
369{
370 void *comport;
371 int iommu_off = 0;
372 unsigned int default_speed;
373 u64 physport;
374
375 DBG(" -> pSeries_init_early()\n");
376
377 fw_feature_init();
378
379 if (systemcfg->platform & PLATFORM_LPAR)
380 hpte_init_lpar();
381 else {
382 hpte_init_native();
383 iommu_off = (of_chosen &&
384 get_property(of_chosen, "linux,iommu-off", NULL));
385 }
386
387 generic_find_legacy_serial_ports(&physport, &default_speed);
388
389 if (systemcfg->platform & PLATFORM_LPAR)
390 find_udbg_vterm();
391 else if (physport) {
392 /* Map the uart for udbg. */
dfbacdc1 393 comport = (void *)ioremap(physport, 16);
1da177e4
LT
394 udbg_init_uart(comport, default_speed);
395
1da177e4
LT
396 DBG("Hello World !\n");
397 }
398
cab0af98
ME
399 if (firmware_has_feature(FW_FEATURE_XDABR | FW_FEATURE_DABR))
400 ppc_md.set_dabr = pseries_set_dabr;
1da177e4
LT
401
402 iommu_init_early_pSeries();
403
404 pSeries_discover_pic();
405
406 DBG(" <- pSeries_init_early()\n");
407}
408
409
1da177e4
LT
410static int pSeries_check_legacy_ioport(unsigned int baseport)
411{
412 struct device_node *np;
413
414#define I8042_DATA_REG 0x60
415#define FDC_BASE 0x3f0
416
417
418 switch(baseport) {
419 case I8042_DATA_REG:
420 np = of_find_node_by_type(NULL, "8042");
421 if (np == NULL)
422 return -ENODEV;
423 of_node_put(np);
424 break;
425 case FDC_BASE:
426 np = of_find_node_by_type(NULL, "fdc");
427 if (np == NULL)
428 return -ENODEV;
429 of_node_put(np);
430 break;
431 }
432 return 0;
433}
434
435/*
436 * Called very early, MMU is off, device-tree isn't unflattened
437 */
438extern struct machdep_calls pSeries_md;
439
440static int __init pSeries_probe(int platform)
441{
442 if (platform != PLATFORM_PSERIES &&
443 platform != PLATFORM_PSERIES_LPAR)
444 return 0;
445
446 /* if we have some ppc_md fixups for LPAR to do, do
447 * it here ...
448 */
449
450 return 1;
451}
452
c66d5dd6
ME
453DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
454
050a0938
AB
455static inline void dedicated_idle_sleep(unsigned int cpu)
456{
457 struct paca_struct *ppaca = &paca[cpu ^ 1];
458
459 /* Only sleep if the other thread is not idle */
460 if (!(ppaca->lppaca.idle)) {
461 local_irq_disable();
462
463 /*
464 * We are about to sleep the thread and so wont be polling any
465 * more.
466 */
467 clear_thread_flag(TIF_POLLING_NRFLAG);
468
469 /*
470 * SMT dynamic mode. Cede will result in this thread going
471 * dormant, if the partner thread is still doing work. Thread
472 * wakes up if partner goes idle, an interrupt is presented, or
473 * a prod occurs. Returning from the cede enables external
474 * interrupts.
475 */
476 if (!need_resched())
477 cede_processor();
478 else
479 local_irq_enable();
480 } else {
481 /*
482 * Give the HV an opportunity at the processor, since we are
483 * not doing any work.
484 */
485 poll_pending();
486 }
487}
488
143a1dec
PM
489static void pseries_dedicated_idle(void)
490{
c66d5dd6 491 long oldval;
050a0938
AB
492 struct paca_struct *lpaca = get_paca();
493 unsigned int cpu = smp_processor_id();
c66d5dd6
ME
494 unsigned long start_snooze;
495 unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
c66d5dd6
ME
496
497 while (1) {
498 /*
499 * Indicate to the HV that we are idle. Now would be
500 * a good time to find other work to dispatch.
501 */
502 lpaca->lppaca.idle = 1;
503
504 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
505 if (!oldval) {
506 set_thread_flag(TIF_POLLING_NRFLAG);
050a0938 507
c66d5dd6
ME
508 start_snooze = __get_tb() +
509 *smt_snooze_delay * tb_ticks_per_usec;
050a0938 510
c66d5dd6 511 while (!need_resched() && !cpu_is_offline(cpu)) {
050a0938
AB
512 ppc64_runlatch_off();
513
c66d5dd6
ME
514 /*
515 * Go into low thread priority and possibly
516 * low power mode.
517 */
518 HMT_low();
519 HMT_very_low();
520
050a0938
AB
521 if (*smt_snooze_delay != 0 &&
522 __get_tb() > start_snooze) {
523 HMT_medium();
524 dedicated_idle_sleep(cpu);
c66d5dd6 525 }
050a0938 526
c66d5dd6
ME
527 }
528
050a0938 529 HMT_medium();
c66d5dd6
ME
530 clear_thread_flag(TIF_POLLING_NRFLAG);
531 } else {
532 set_need_resched();
533 }
534
c66d5dd6 535 lpaca->lppaca.idle = 0;
050a0938
AB
536 ppc64_runlatch_on();
537
c66d5dd6 538 schedule();
050a0938 539
c66d5dd6
ME
540 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
541 cpu_die();
542 }
c66d5dd6
ME
543}
544
143a1dec 545static void pseries_shared_idle(void)
c66d5dd6
ME
546{
547 struct paca_struct *lpaca = get_paca();
548 unsigned int cpu = smp_processor_id();
549
550 while (1) {
551 /*
552 * Indicate to the HV that we are idle. Now would be
553 * a good time to find other work to dispatch.
554 */
555 lpaca->lppaca.idle = 1;
556
557 while (!need_resched() && !cpu_is_offline(cpu)) {
558 local_irq_disable();
050a0938 559 ppc64_runlatch_off();
c66d5dd6
ME
560
561 /*
562 * Yield the processor to the hypervisor. We return if
563 * an external interrupt occurs (which are driven prior
564 * to returning here) or if a prod occurs from another
565 * processor. When returning here, external interrupts
566 * are enabled.
567 *
568 * Check need_resched() again with interrupts disabled
569 * to avoid a race.
570 */
571 if (!need_resched())
572 cede_processor();
573 else
574 local_irq_enable();
050a0938
AB
575
576 HMT_medium();
c66d5dd6
ME
577 }
578
c66d5dd6 579 lpaca->lppaca.idle = 0;
050a0938
AB
580 ppc64_runlatch_on();
581
c66d5dd6 582 schedule();
050a0938
AB
583
584 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
c66d5dd6
ME
585 cpu_die();
586 }
c66d5dd6
ME
587}
588
4267292b
PM
589static int pSeries_pci_probe_mode(struct pci_bus *bus)
590{
591 if (systemcfg->platform & PLATFORM_LPAR)
592 return PCI_PROBE_DEVTREE;
593 return PCI_PROBE_NORMAL;
594}
595
1da177e4
LT
596struct machdep_calls __initdata pSeries_md = {
597 .probe = pSeries_probe,
598 .setup_arch = pSeries_setup_arch,
599 .init_early = pSeries_init_early,
0dd194d0 600 .show_cpuinfo = pSeries_show_cpuinfo,
1da177e4
LT
601 .log_error = pSeries_log_error,
602 .pcibios_fixup = pSeries_final_fixup,
4267292b 603 .pci_probe_mode = pSeries_pci_probe_mode,
dad32bbf 604 .irq_bus_setup = pSeries_irq_bus_setup,
f4fcbbe9
PM
605 .restart = rtas_restart,
606 .power_off = rtas_power_off,
607 .halt = rtas_halt,
1da177e4
LT
608 .panic = rtas_os_term,
609 .cpu_die = pSeries_mach_cpu_die,
773bf9c4
AB
610 .get_boot_time = rtas_get_boot_time,
611 .get_rtc_time = rtas_get_rtc_time,
612 .set_rtc_time = rtas_set_rtc_time,
10f7e7c1 613 .calibrate_decr = generic_calibrate_decr,
6566c6f1 614 .progress = rtas_progress,
1da177e4
LT
615 .check_legacy_ioport = pSeries_check_legacy_ioport,
616 .system_reset_exception = pSeries_system_reset_exception,
617 .machine_check_exception = pSeries_machine_check_exception,
618};
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