Commit | Line | Data |
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b0c110b4 VB |
1 | /* |
2 | * General Purpose functions for the global management of the | |
3 | * 8260 Communication Processor Module. | |
4 | * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com> | |
5 | * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) | |
6 | * 2.3.99 Updates | |
7 | * | |
8 | * 2006 (c) MontaVista Software, Inc. | |
9 | * Vitaly Bordug <vbordug@ru.mvista.com> | |
10 | * Merged to arch/powerpc from arch/ppc/syslib/cpm2_common.c | |
11 | * | |
12 | * This file is licensed under the terms of the GNU General Public License | |
13 | * version 2. This program is licensed "as is" without any warranty of any | |
14 | * kind, whether express or implied. | |
15 | */ | |
16 | ||
17 | /* | |
18 | * | |
19 | * In addition to the individual control of the communication | |
20 | * channels, there are a few functions that globally affect the | |
21 | * communication processor. | |
22 | * | |
23 | * Buffer descriptors must be allocated from the dual ported memory | |
24 | * space. The allocator for that is here. When the communication | |
25 | * process is reset, we reclaim the memory available. There is | |
26 | * currently no deallocator for this memory. | |
27 | */ | |
28 | #include <linux/errno.h> | |
29 | #include <linux/sched.h> | |
30 | #include <linux/kernel.h> | |
31 | #include <linux/param.h> | |
32 | #include <linux/string.h> | |
33 | #include <linux/mm.h> | |
34 | #include <linux/interrupt.h> | |
35 | #include <linux/module.h> | |
36 | #include <asm/io.h> | |
37 | #include <asm/irq.h> | |
38 | #include <asm/mpc8260.h> | |
39 | #include <asm/page.h> | |
40 | #include <asm/pgtable.h> | |
41 | #include <asm/cpm2.h> | |
42 | #include <asm/rheap.h> | |
43 | #include <asm/fs_pd.h> | |
44 | ||
45 | #include <sysdev/fsl_soc.h> | |
46 | ||
47 | static void cpm2_dpinit(void); | |
48 | cpm_cpm2_t *cpmp; /* Pointer to comm processor space */ | |
49 | ||
50 | /* We allocate this here because it is used almost exclusively for | |
51 | * the communication processor devices. | |
52 | */ | |
53 | cpm2_map_t *cpm2_immr; | |
54 | ||
55 | #define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount | |
56 | of space for CPM as it is larger | |
57 | than on PQ2 */ | |
58 | ||
59 | void | |
60 | cpm2_reset(void) | |
61 | { | |
62 | cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); | |
63 | ||
64 | /* Reclaim the DP memory for our use. | |
65 | */ | |
66 | cpm2_dpinit(); | |
67 | ||
68 | /* Tell everyone where the comm processor resides. | |
69 | */ | |
70 | cpmp = &cpm2_immr->im_cpm; | |
71 | } | |
72 | ||
73 | /* Set a baud rate generator. This needs lots of work. There are | |
74 | * eight BRGs, which can be connected to the CPM channels or output | |
75 | * as clocks. The BRGs are in two different block of internal | |
76 | * memory mapped space. | |
77 | * The baud rate clock is the system clock divided by something. | |
78 | * It was set up long ago during the initial boot phase and is | |
79 | * is given to us. | |
80 | * Baud rate clocks are zero-based in the driver code (as that maps | |
81 | * to port numbers). Documentation uses 1-based numbering. | |
82 | */ | |
83 | #define BRG_INT_CLK (get_brgfreq()) | |
84 | #define BRG_UART_CLK (BRG_INT_CLK/16) | |
85 | ||
86 | /* This function is used by UARTS, or anything else that uses a 16x | |
87 | * oversampled clock. | |
88 | */ | |
89 | void | |
90 | cpm_setbrg(uint brg, uint rate) | |
91 | { | |
92 | volatile uint *bp; | |
93 | ||
94 | /* This is good enough to get SMCs running..... | |
95 | */ | |
96 | if (brg < 4) { | |
97 | bp = (uint *)&cpm2_immr->im_brgc1; | |
98 | } else { | |
99 | bp = (uint *)&cpm2_immr->im_brgc5; | |
100 | brg -= 4; | |
101 | } | |
102 | bp += brg; | |
103 | *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN; | |
104 | } | |
105 | ||
106 | /* This function is used to set high speed synchronous baud rate | |
107 | * clocks. | |
108 | */ | |
109 | void | |
110 | cpm2_fastbrg(uint brg, uint rate, int div16) | |
111 | { | |
112 | volatile uint *bp; | |
113 | ||
114 | if (brg < 4) { | |
115 | bp = (uint *)&cpm2_immr->im_brgc1; | |
116 | } | |
117 | else { | |
118 | bp = (uint *)&cpm2_immr->im_brgc5; | |
119 | brg -= 4; | |
120 | } | |
121 | bp += brg; | |
122 | *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN; | |
123 | if (div16) | |
124 | *bp |= CPM_BRG_DIV16; | |
125 | } | |
126 | ||
127 | /* | |
128 | * dpalloc / dpfree bits. | |
129 | */ | |
130 | static spinlock_t cpm_dpmem_lock; | |
131 | /* 16 blocks should be enough to satisfy all requests | |
132 | * until the memory subsystem goes up... */ | |
133 | static rh_block_t cpm_boot_dpmem_rh_block[16]; | |
134 | static rh_info_t cpm_dpmem_info; | |
135 | ||
136 | static void cpm2_dpinit(void) | |
137 | { | |
138 | spin_lock_init(&cpm_dpmem_lock); | |
139 | ||
140 | /* initialize the info header */ | |
141 | rh_init(&cpm_dpmem_info, 1, | |
142 | sizeof(cpm_boot_dpmem_rh_block) / | |
143 | sizeof(cpm_boot_dpmem_rh_block[0]), | |
144 | cpm_boot_dpmem_rh_block); | |
145 | ||
146 | /* Attach the usable dpmem area */ | |
147 | /* XXX: This is actually crap. CPM_DATAONLY_BASE and | |
148 | * CPM_DATAONLY_SIZE is only a subset of the available dpram. It | |
149 | * varies with the processor and the microcode patches activated. | |
150 | * But the following should be at least safe. | |
151 | */ | |
152 | rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE, | |
153 | CPM_DATAONLY_SIZE); | |
154 | } | |
155 | ||
156 | /* This function returns an index into the DPRAM area. | |
157 | */ | |
158 | uint cpm_dpalloc(uint size, uint align) | |
159 | { | |
160 | void *start; | |
161 | unsigned long flags; | |
162 | ||
163 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | |
164 | cpm_dpmem_info.alignment = align; | |
165 | start = rh_alloc(&cpm_dpmem_info, size, "commproc"); | |
166 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | |
167 | ||
168 | return (uint)start; | |
169 | } | |
170 | EXPORT_SYMBOL(cpm_dpalloc); | |
171 | ||
172 | int cpm_dpfree(uint offset) | |
173 | { | |
174 | int ret; | |
175 | unsigned long flags; | |
176 | ||
177 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | |
178 | ret = rh_free(&cpm_dpmem_info, (void *)offset); | |
179 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | |
180 | ||
181 | return ret; | |
182 | } | |
183 | EXPORT_SYMBOL(cpm_dpfree); | |
184 | ||
185 | /* not sure if this is ever needed */ | |
186 | uint cpm_dpalloc_fixed(uint offset, uint size, uint align) | |
187 | { | |
188 | void *start; | |
189 | unsigned long flags; | |
190 | ||
191 | spin_lock_irqsave(&cpm_dpmem_lock, flags); | |
192 | cpm_dpmem_info.alignment = align; | |
193 | start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc"); | |
194 | spin_unlock_irqrestore(&cpm_dpmem_lock, flags); | |
195 | ||
196 | return (uint)start; | |
197 | } | |
198 | EXPORT_SYMBOL(cpm_dpalloc_fixed); | |
199 | ||
200 | void cpm_dpdump(void) | |
201 | { | |
202 | rh_dump(&cpm_dpmem_info); | |
203 | } | |
204 | EXPORT_SYMBOL(cpm_dpdump); | |
205 | ||
206 | void *cpm_dpram_addr(uint offset) | |
207 | { | |
208 | return (void *)&cpm2_immr->im_dprambase[offset]; | |
209 | } | |
210 | EXPORT_SYMBOL(cpm_dpram_addr); |