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eed32001 KG |
1 | /* |
2 | * FSL SoC setup code | |
3 | * | |
4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) | |
5 | * | |
fba43665 VB |
6 | * 2006 (c) MontaVista Software, Inc. |
7 | * Vitaly Bordug <vbordug@ru.mvista.com> | |
8 | * | |
eed32001 KG |
9 | * This program is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | ||
eed32001 KG |
15 | #include <linux/stddef.h> |
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/major.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/irq.h> | |
4b16f8e2 | 22 | #include <linux/export.h> |
eed32001 KG |
23 | #include <linux/device.h> |
24 | #include <linux/platform_device.h> | |
c026c987 | 25 | #include <linux/of.h> |
0af666fa | 26 | #include <linux/of_platform.h> |
a9b14973 | 27 | #include <linux/phy.h> |
a21e282a | 28 | #include <linux/phy_fixed.h> |
26f6cb99 | 29 | #include <linux/spi/spi.h> |
eed32001 | 30 | #include <linux/fsl_devices.h> |
fba43665 VB |
31 | #include <linux/fs_enet_pd.h> |
32 | #include <linux/fs_uart_pd.h> | |
eed32001 | 33 | |
60063497 | 34 | #include <linux/atomic.h> |
eed32001 KG |
35 | #include <asm/io.h> |
36 | #include <asm/irq.h> | |
fba43665 | 37 | #include <asm/time.h> |
eed32001 | 38 | #include <asm/prom.h> |
46c4c229 | 39 | #include <asm/machdep.h> |
eed32001 KG |
40 | #include <sysdev/fsl_soc.h> |
41 | #include <mm/mmu_decl.h> | |
fba43665 | 42 | #include <asm/cpm2.h> |
d173ea6b | 43 | #include <asm/fsl_hcalls.h> /* For the Freescale hypervisor */ |
eed32001 | 44 | |
d3465c92 | 45 | extern void init_fcc_ioports(struct fs_platform_info*); |
88bdc6f0 VB |
46 | extern void init_fec_ioports(struct fs_platform_info*); |
47 | extern void init_smc_ioports(struct fs_uart_platform_info*); | |
eed32001 KG |
48 | static phys_addr_t immrbase = -1; |
49 | ||
50 | phys_addr_t get_immrbase(void) | |
51 | { | |
52 | struct device_node *soc; | |
53 | ||
54 | if (immrbase != -1) | |
55 | return immrbase; | |
56 | ||
57 | soc = of_find_node_by_type(NULL, "soc"); | |
2fb07d77 | 58 | if (soc) { |
f9234736 | 59 | int size; |
6c7e072b SW |
60 | u32 naddr; |
61 | const u32 *prop = of_get_property(soc, "#address-cells", &size); | |
fba43665 | 62 | |
6c7e072b SW |
63 | if (prop && size == 4) |
64 | naddr = *prop; | |
65 | else | |
66 | naddr = 2; | |
67 | ||
68 | prop = of_get_property(soc, "ranges", &size); | |
fba43665 | 69 | if (prop) |
6c7e072b SW |
70 | immrbase = of_translate_address(soc, prop + naddr); |
71 | ||
eed32001 | 72 | of_node_put(soc); |
f9234736 | 73 | } |
eed32001 KG |
74 | |
75 | return immrbase; | |
76 | } | |
eed32001 | 77 | |
2fb07d77 | 78 | EXPORT_SYMBOL(get_immrbase); |
eed32001 | 79 | |
38664095 SW |
80 | static u32 sysfreq = -1; |
81 | ||
82 | u32 fsl_get_sys_freq(void) | |
83 | { | |
84 | struct device_node *soc; | |
85 | const u32 *prop; | |
86 | int size; | |
87 | ||
88 | if (sysfreq != -1) | |
89 | return sysfreq; | |
90 | ||
91 | soc = of_find_node_by_type(NULL, "soc"); | |
92 | if (!soc) | |
93 | return -1; | |
94 | ||
95 | prop = of_get_property(soc, "clock-frequency", &size); | |
96 | if (!prop || size != sizeof(*prop) || *prop == 0) | |
97 | prop = of_get_property(soc, "bus-frequency", &size); | |
98 | ||
99 | if (prop && size == sizeof(*prop)) | |
100 | sysfreq = *prop; | |
101 | ||
102 | of_node_put(soc); | |
103 | return sysfreq; | |
104 | } | |
105 | EXPORT_SYMBOL(fsl_get_sys_freq); | |
106 | ||
59a0ea50 | 107 | #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx) |
fba43665 VB |
108 | |
109 | static u32 brgfreq = -1; | |
110 | ||
111 | u32 get_brgfreq(void) | |
112 | { | |
113 | struct device_node *node; | |
6d817aa7 SW |
114 | const unsigned int *prop; |
115 | int size; | |
fba43665 VB |
116 | |
117 | if (brgfreq != -1) | |
118 | return brgfreq; | |
119 | ||
6d817aa7 | 120 | node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg"); |
fba43665 | 121 | if (node) { |
6d817aa7 SW |
122 | prop = of_get_property(node, "clock-frequency", &size); |
123 | if (prop && size == 4) | |
124 | brgfreq = *prop; | |
125 | ||
126 | of_node_put(node); | |
127 | return brgfreq; | |
128 | } | |
fba43665 | 129 | |
6d817aa7 SW |
130 | /* Legacy device binding -- will go away when no users are left. */ |
131 | node = of_find_node_by_type(NULL, "cpm"); | |
59a0ea50 AV |
132 | if (!node) |
133 | node = of_find_compatible_node(NULL, NULL, "fsl,qe"); | |
134 | if (!node) | |
135 | node = of_find_node_by_type(NULL, "qe"); | |
136 | ||
6d817aa7 SW |
137 | if (node) { |
138 | prop = of_get_property(node, "brg-frequency", &size); | |
f9234736 | 139 | if (prop && size == 4) |
fba43665 | 140 | brgfreq = *prop; |
f9234736 | 141 | |
59a0ea50 AV |
142 | if (brgfreq == -1 || brgfreq == 0) { |
143 | prop = of_get_property(node, "bus-frequency", &size); | |
144 | if (prop && size == 4) | |
145 | brgfreq = *prop / 2; | |
146 | } | |
fba43665 | 147 | of_node_put(node); |
f9234736 | 148 | } |
fba43665 VB |
149 | |
150 | return brgfreq; | |
151 | } | |
152 | ||
153 | EXPORT_SYMBOL(get_brgfreq); | |
154 | ||
155 | static u32 fs_baudrate = -1; | |
156 | ||
157 | u32 get_baudrate(void) | |
158 | { | |
159 | struct device_node *node; | |
160 | ||
161 | if (fs_baudrate != -1) | |
162 | return fs_baudrate; | |
163 | ||
164 | node = of_find_node_by_type(NULL, "serial"); | |
165 | if (node) { | |
f9234736 | 166 | int size; |
e2eb6392 SR |
167 | const unsigned int *prop = of_get_property(node, |
168 | "current-speed", &size); | |
fba43665 VB |
169 | |
170 | if (prop) | |
171 | fs_baudrate = *prop; | |
172 | of_node_put(node); | |
f9234736 | 173 | } |
fba43665 VB |
174 | |
175 | return fs_baudrate; | |
176 | } | |
177 | ||
178 | EXPORT_SYMBOL(get_baudrate); | |
179 | #endif /* CONFIG_CPM2 */ | |
180 | ||
a21e282a VB |
181 | #ifdef CONFIG_FIXED_PHY |
182 | static int __init of_add_fixed_phys(void) | |
183 | { | |
184 | int ret; | |
185 | struct device_node *np; | |
186 | u32 *fixed_link; | |
187 | struct fixed_phy_status status = {}; | |
188 | ||
189 | for_each_node_by_name(np, "ethernet") { | |
190 | fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL); | |
191 | if (!fixed_link) | |
192 | continue; | |
193 | ||
194 | status.link = 1; | |
195 | status.duplex = fixed_link[1]; | |
196 | status.speed = fixed_link[2]; | |
197 | status.pause = fixed_link[3]; | |
198 | status.asym_pause = fixed_link[4]; | |
199 | ||
200 | ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status); | |
201 | if (ret) { | |
202 | of_node_put(np); | |
203 | return ret; | |
204 | } | |
205 | } | |
206 | ||
207 | return 0; | |
208 | } | |
209 | arch_initcall(of_add_fixed_phys); | |
210 | #endif /* CONFIG_FIXED_PHY */ | |
211 | ||
5753c082 | 212 | #if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx) |
e1c1575f KG |
213 | static __be32 __iomem *rstcr; |
214 | ||
215 | static int __init setup_rstcr(void) | |
216 | { | |
217 | struct device_node *np; | |
4ea7c88b MM |
218 | |
219 | for_each_node_by_name(np, "global-utilities") { | |
220 | if ((of_get_property(np, "fsl,has-rstcr", NULL))) { | |
221 | rstcr = of_iomap(np, 0) + 0xb0; | |
222 | if (!rstcr) | |
223 | printk (KERN_ERR "Error: reset control " | |
224 | "register not mapped!\n"); | |
225 | break; | |
226 | } | |
227 | } | |
228 | ||
229 | if (!rstcr && ppc_md.restart == fsl_rstcr_restart) | |
46c4c229 PG |
230 | printk(KERN_ERR "No RSTCR register, warm reboot won't work\n"); |
231 | ||
e1c1575f KG |
232 | if (np) |
233 | of_node_put(np); | |
4ea7c88b | 234 | |
e1c1575f KG |
235 | return 0; |
236 | } | |
237 | ||
238 | arch_initcall(setup_rstcr); | |
239 | ||
240 | void fsl_rstcr_restart(char *cmd) | |
241 | { | |
242 | local_irq_disable(); | |
243 | if (rstcr) | |
244 | /* set reset control register */ | |
245 | out_be32(rstcr, 0x2); /* HRESET_REQ */ | |
246 | ||
247 | while (1) ; | |
248 | } | |
249 | #endif | |
6f90a8bd YS |
250 | |
251 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) | |
43c9f434 | 252 | struct platform_diu_data_ops diu_ops; |
6f90a8bd | 253 | EXPORT_SYMBOL(diu_ops); |
6f90a8bd | 254 | #endif |
d173ea6b | 255 | |
305bcf26 | 256 | #ifdef CONFIG_EPAPR_PARAVIRT |
d173ea6b TT |
257 | /* |
258 | * Restart the current partition | |
259 | * | |
260 | * This function should be assigned to the ppc_md.restart function pointer, | |
261 | * to initiate a partition restart when we're running under the Freescale | |
262 | * hypervisor. | |
263 | */ | |
264 | void fsl_hv_restart(char *cmd) | |
265 | { | |
266 | pr_info("hv restart\n"); | |
267 | fh_partition_restart(-1); | |
268 | } | |
269 | ||
270 | /* | |
271 | * Halt the current partition | |
272 | * | |
273 | * This function should be assigned to the ppc_md.power_off and ppc_md.halt | |
274 | * function pointers, to shut down the partition when we're running under | |
275 | * the Freescale hypervisor. | |
276 | */ | |
277 | void fsl_hv_halt(void) | |
278 | { | |
279 | pr_info("hv exit\n"); | |
280 | fh_partition_stop(-1); | |
281 | } | |
305bcf26 | 282 | #endif |