Commit | Line | Data |
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eed32001 KG |
1 | #ifndef __PPC_FSL_SOC_H |
2 | #define __PPC_FSL_SOC_H | |
3 | #ifdef __KERNEL__ | |
4 | ||
3d574abd SW |
5 | #include <asm/mmu.h> |
6 | ||
364fdbc0 AV |
7 | struct spi_device; |
8 | ||
eed32001 | 9 | extern phys_addr_t get_immrbase(void); |
a5dae76a | 10 | #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx) |
fba43665 VB |
11 | extern u32 get_brgfreq(void); |
12 | extern u32 get_baudrate(void); | |
a5dae76a AV |
13 | #else |
14 | static inline u32 get_brgfreq(void) { return -1; } | |
15 | static inline u32 get_baudrate(void) { return -1; } | |
16 | #endif | |
38664095 | 17 | extern u32 fsl_get_sys_freq(void); |
eed32001 | 18 | |
26f6cb99 | 19 | struct spi_board_info; |
d49747bd | 20 | struct device_node; |
26f6cb99 AV |
21 | |
22 | extern int fsl_spi_init(struct spi_board_info *board_infos, | |
23 | unsigned int num_board_infos, | |
364fdbc0 | 24 | void (*cs_control)(struct spi_device *spi, bool on)); |
26f6cb99 | 25 | |
e1c1575f | 26 | extern void fsl_rstcr_restart(char *cmd); |
6f90a8bd YS |
27 | |
28 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) | |
6f90a8bd | 29 | struct platform_diu_data_ops { |
6f90a8bd YS |
30 | unsigned int (*get_pixel_format) (unsigned int bits_per_pixel, |
31 | int monitor_port); | |
32 | void (*set_gamma_table) (int monitor_port, char *gamma_table_base); | |
33 | void (*set_monitor_port) (int monitor_port); | |
34 | void (*set_pixel_clock) (unsigned int pixclock); | |
35 | ssize_t (*show_monitor_port) (int monitor_port, char *buf); | |
36 | int (*set_sysfs_monitor_port) (int val); | |
37 | }; | |
38 | ||
39 | extern struct platform_diu_data_ops diu_ops; | |
6f90a8bd YS |
40 | #endif |
41 | ||
eed32001 KG |
42 | #endif |
43 | #endif |