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[PATCH] powerpc: trivial: modify comments to refer to new location of files
[deliverable/linux.git] / arch / ppc / 4xx_io / serial_sicc.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 * Driver for IBM STB3xxx SICC serial port
3 *
4 * Based on drivers/char/serial_amba.c, by ARM Ltd.
5 *
6 * Copyright 2001 IBM Crop.
7 * Author: IBM China Research Lab
8 * Yudong Yang <yangyud@cn.ibm.com>
9 * Yi Ge <geyi@cn.ibm.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 *
26 * This is a driver for SICC serial port on IBM Redwood 4 evaluation board.
27 * The driver support both as a console device and normal serial device and
28 * is compatible with normal ttyS* devices.
29 */
30
31#include <linux/config.h>
32#include <linux/module.h>
33#include <linux/kernel.h>
34#include <linux/errno.h>
35#include <linux/signal.h>
36#include <linux/sched.h>
37#include <linux/interrupt.h>
38#include <linux/tty.h>
39#include <linux/tty_flip.h>
40#include <linux/major.h>
41#include <linux/string.h>
42#include <linux/fcntl.h>
43#include <linux/ptrace.h>
44#include <linux/ioport.h>
45#include <linux/mm.h>
46#include <linux/slab.h>
47#include <linux/init.h>
a9415644 48#include <linux/capability.h>
1da177e4
LT		 49#include <linux/circ_buf.h>
50#include <linux/serial.h>
51#include <linux/console.h>
52#include <linux/sysrq.h>
53#include <linux/bitops.h>
54
55#include <asm/system.h>
56#include <asm/io.h>
57#include <asm/irq.h>
58#include <asm/uaccess.h>
59#include <asm/serial.h>
60
61
62#include <linux/serialP.h>
63
64
65/* -----------------------------------------------------------------------------
66 * From STB03xxx SICC UART Specification
67 * -----------------------------------------------------------------------------
68 * UART Register Offsets.
69 */
70
71#define BL_SICC_LSR 0x0000000 /* line status register read/clear */
72#define BL_SICC_LSRS 0x0000001 /* set line status register read/set */
73#define BL_SICC_HSR 0x0000002 /* handshake status register r/clear */
74#define BL_SICC_HSRS 0x0000003 /* set handshake status register r/set */
75#define BL_SICC_BRDH 0x0000004 /* baudrate divisor high reg r/w */
76#define BL_SICC_BRDL 0x0000005 /* baudrate divisor low reg r/w */
77#define BL_SICC_LCR 0x0000006 /* control register r/w */
78#define BL_SICC_RCR 0x0000007 /* receiver command register r/w */
79#define BL_SICC_TxCR 0x0000008 /* transmitter command register r/w */
80#define BL_SICC_RBR 0x0000009 /* receive buffer r */
81#define BL_SICC_TBR 0x0000009 /* transmit buffer w */
82#define BL_SICC_CTL2 0x000000A /* added for Vesta */
83#define BL_SICC_IrCR 0x000000B /* added for Vesta IR */
84
85/* masks and definitions for serial port control register */
86
87#define _LCR_LM_MASK 0xc0 /* loop back modes */
88#define _LCR_DTR_MASK 0x20 /* data terminal ready 0-inactive */
89#define _LCR_RTS_MASK 0x10 /* request to send 0-inactive */
90#define _LCR_DB_MASK 0x08 /* data bits mask */
91#define _LCR_PE_MASK 0x04 /* parity enable */
92#define _LCR_PTY_MASK 0x02 /* parity */
93#define _LCR_SB_MASK 0x01 /* stop bit mask */
94
95#define _LCR_LM_NORM 0x00 /* normal operation */
96#define _LCR_LM_LOOP 0x40 /* internal loopback mode */
97#define _LCR_LM_ECHO 0x80 /* automatic echo mode */
98#define _LCR_LM_RES 0xc0 /* reserved */
99
100#define _LCR_DTR_ACTIVE _LCR_DTR_MASK /* DTR is active */
101#define _LCR_RTS_ACTIVE _LCR_RTS_MASK /* RTS is active */
102#define _LCR_DB_8_BITS _LCR_DB_MASK /* 8 data bits */
103#define _LCR_DB_7_BITS 0x00 /* 7 data bits */
104#define _LCR_PE_ENABLE _LCR_PE_MASK /* parity enabled */
105#define _LCR_PE_DISABLE 0x00 /* parity disabled */
106#define _LCR_PTY_EVEN 0x00 /* even parity */
107#define _LCR_PTY_ODD _LCR_PTY_MASK /* odd parity */
108#define _LCR_SB_1_BIT 0x00 /* one stop bit */
109#define _LCR_SB_2_BIT _LCR_SB_MASK /* two stop bit */
110
111/* serial port handshake register */
112
113#define _HSR_DIS_MASK 0x80 /* DSR input inactive error mask */
114#define _HSR_CS_MASK 0x40 /* CTS input inactive error mask */
115#define _HSR_DIS_ACT 0x00 /* dsr input is active */
116#define _HSR_DIS_INACT _HSR_DIS_MASK /* dsr input is inactive */
117#define _HSR_CS_ACT 0x00 /* cts input is active */
118#define _HSR_CS_INACT _HSR_CS_MASK /* cts input is active */
119
120/* serial port line status register */
121
122#define _LSR_RBR_MASK 0x80 /* receive buffer ready mask */
123#define _LSR_FE_MASK 0x40 /* framing error */
124#define _LSR_OE_MASK 0x20 /* overrun error */
125#define _LSR_PE_MASK 0x10 /* parity error */
126#define _LSR_LB_MASK 0x08 /* line break */
127#define _LSR_TBR_MASK 0x04 /* transmit buffer ready */
128#define _LSR_TSR_MASK 0x02 /* transmit shift register ready */
129
130#define _LSR_RBR_FULL _LSR_RBR_MASK /* receive buffer is full */
131#define _LSR_FE_ERROR _LSR_FE_MASK /* framing error detected */
132#define _LSR_OE_ERROR _LSR_OE_MASK /* overrun error detected */
133#define _LSR_PE_ERROR _LSR_PE_MASK /* parity error detected */
134#define _LSR_LB_BREAK _LSR_LB_MASK /* line break detected */
135#define _LSR_TBR_EMPTY _LSR_TBR_MASK /* transmit buffer is ready */
136#define _LSR_TSR_EMPTY _LSR_TSR_MASK /* transmit shift register is empty */
137#define _LSR_TX_ALL 0x06 /* all physical transmit is done */
138
139#define _LSR_RX_ERR (_LSR_LB_BREAK | _LSR_FE_MASK | _LSR_OE_MASK | \
140 _LSR_PE_MASK )
141
142/* serial port receiver command register */
143
144#define _RCR_ER_MASK 0x80 /* enable receiver mask */
145#define _RCR_DME_MASK 0x60 /* dma mode */
146#define _RCR_EIE_MASK 0x10 /* error interrupt enable mask */
147#define _RCR_PME_MASK 0x08 /* pause mode mask */
148
149#define _RCR_ER_ENABLE _RCR_ER_MASK /* receiver enabled */
150#define _RCR_DME_DISABLE 0x00 /* dma disabled */
151#define _RCR_DME_RXRDY 0x20 /* dma disabled, RxRDY interrupt enabled*/
152#define _RCR_DME_ENABLE2 0x40 /* dma enabled,receiver src channel 2 */
153#define _RCR_DME_ENABLE3 0x60 /* dma enabled,receiver src channel 3 */
154#define _RCR_PME_HARD _RCR_PME_MASK /* RTS controlled by hardware */
155#define _RCR_PME_SOFT 0x00 /* RTS controlled by software */
156
157/* serial port transmit command register */
158
159#define _TxCR_ET_MASK 0x80 /* transmiter enable mask */
160#define _TxCR_DME_MASK 0x60 /* dma mode mask */
161#define _TxCR_TIE_MASK 0x10 /* empty interrupt enable mask */
162#define _TxCR_EIE_MASK 0x08 /* error interrupt enable mask */
163#define _TxCR_SPE_MASK 0x04 /* stop/pause mask */
164#define _TxCR_TB_MASK 0x02 /* transmit break mask */
165
166#define _TxCR_ET_ENABLE _TxCR_ET_MASK /* transmiter enabled */
167#define _TxCR_DME_DISABLE 0x00 /* transmiter disabled, TBR intr disabled */
168#define _TxCR_DME_TBR 0x20 /* transmiter disabled, TBR intr enabled */
169#define _TxCR_DME_CHAN_2 0x40 /* dma enabled, destination chann 2 */
170#define _TxCR_DME_CHAN_3 0x60 /* dma enabled, destination chann 3 */
171
172/* serial ctl reg 2 - added for Vesta */
173
174#define _CTL2_EXTERN 0x80 /* */
175#define _CTL2_USEFIFO 0x40 /* */
176#define _CTL2_RESETRF 0x08 /* */
177#define _CTL2_RESETTF 0x04 /* */
178
179
180
181#define SERIAL_SICC_NAME "ttySICC"
182#define SERIAL_SICC_MAJOR 150
183#define SERIAL_SICC_MINOR 1
184#define SERIAL_SICC_NR 1
185
186#ifndef TRUE
187#define TRUE 1
188#endif
189#ifndef FALSE
190#define FALSE 0
191#endif
192
193/*
194 * Things needed by tty driver
195 */
196static struct tty_driver *siccnormal_driver;
197
198#if defined(CONFIG_SERIAL_SICC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
199#define SUPPORT_SYSRQ
200#endif
201
202/*
203 * Things needed internally to this driver
204 */
205
206/*
207 * tmp_buf is used as a temporary buffer by serial_write. We need to
208 * lock it in case the copy_from_user blocks while swapping in a page,
209 * and some other program tries to do a serial write at the same time.
210 * Since the lock will only come under contention when the system is
211 * swapping and available memory is low, it makes sense to share one
212 * buffer across all the serial ports, since it significantly saves
213 * memory if large numbers of serial ports are open.
214 */
215static u_char *tmp_buf;
1da177e4
LT		 216
217#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
218
219/* number of characters left in xmit buffer before we ask for more */
220#define WAKEUP_CHARS 256
221#define SICC_ISR_PASS_LIMIT 256
222
223#define EVT_WRITE_WAKEUP 0
224
225struct SICC_icount {
226 __u32 cts;
227 __u32 dsr;
228 __u32 rng;
229 __u32 dcd;
230 __u32 rx;
231 __u32 tx;
232 __u32 frame;
233 __u32 overrun;
234 __u32 parity;
235 __u32 brk;
236 __u32 buf_overrun;
237};
238
239/*
240 * Static information about the port
241 */
242struct SICC_port {
243 unsigned int uart_base;
244 unsigned int uart_base_phys;
245 unsigned int irqrx;
246 unsigned int irqtx;
247 unsigned int uartclk;
248 unsigned int fifosize;
249 unsigned int tiocm_support;
250 void (*set_mctrl)(struct SICC_port *, u_int mctrl);
251};
252
253/*
254 * This is the state information which is persistent across opens
255 */
256struct SICC_state {
257 struct SICC_icount icount;
258 unsigned int line;
259 unsigned int close_delay;
260 unsigned int closing_wait;
261 unsigned int custom_divisor;
262 unsigned int flags;
263 int count;
264 struct SICC_info *info;
265 spinlock_t sicc_lock;
266};
267
268#define SICC_XMIT_SIZE 1024
269/*
270 * This is the state information which is only valid when the port is open.
271 */
272struct SICC_info {
273 struct SICC_port *port;
274 struct SICC_state *state;
275 struct tty_struct *tty;
276 unsigned char x_char;
277 unsigned char old_status;
278 unsigned char read_status_mask;
279 unsigned char ignore_status_mask;
280 struct circ_buf xmit;
281 unsigned int flags;
282#ifdef SUPPORT_SYSRQ
283 unsigned long sysrq;
284#endif
285
286 unsigned int event;
287 unsigned int timeout;
288 unsigned int lcr_h;
289 unsigned int mctrl;
290 int blocked_open;
291
292 struct tasklet_struct tlet;
293
294 wait_queue_head_t open_wait;
295 wait_queue_head_t close_wait;
296 wait_queue_head_t delta_msr_wait;
297};
298
299#ifdef CONFIG_SERIAL_SICC_CONSOLE
300static struct console siccuart_cons;
301#endif
302static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios);
303static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout);
304
305
306
307static void powerpcMtcic_cr(unsigned long value)
308{
309 mtdcr(DCRN_CICCR, value);
310}
311
312static unsigned long powerpcMfcic_cr(void)
313{
314 return mfdcr(DCRN_CICCR);
315}
316
317static unsigned long powerpcMfclkgpcr(void)
318{
319 return mfdcr(DCRN_SCCR);
320}
321
322static void sicc_set_mctrl_null(struct SICC_port *port, u_int mctrl)
323{
324}
325
326static struct SICC_port sicc_ports[SERIAL_SICC_NR] = {
327 {
328 .uart_base = 0,
329 .uart_base_phys = SICC0_IO_BASE,
330 .irqrx = SICC0_INTRX,
331 .irqtx = SICC0_INTTX,
332// .uartclk = 0,
333 .fifosize = 1,
334 .set_mctrl = sicc_set_mctrl_null,
335 }
336};
337
338static struct SICC_state sicc_state[SERIAL_SICC_NR];
339
340static void siccuart_enable_rx_interrupt(struct SICC_info *info)
341{
342 unsigned char cr;
343
344 cr = readb(info->port->uart_base+BL_SICC_RCR);
345 cr &= ~_RCR_DME_MASK;
346 cr |= _RCR_DME_RXRDY;
347 writeb(cr, info->port->uart_base+BL_SICC_RCR);
348}
349
350static void siccuart_disable_rx_interrupt(struct SICC_info *info)
351{
352 unsigned char cr;
353
354 cr = readb(info->port->uart_base+BL_SICC_RCR);
355 cr &= ~_RCR_DME_MASK;
356 cr |= _RCR_DME_DISABLE;
357 writeb(cr, info->port->uart_base+BL_SICC_RCR);
358}
359
360
361static void siccuart_enable_tx_interrupt(struct SICC_info *info)
362{
363 unsigned char cr;
364
365 cr = readb(info->port->uart_base+BL_SICC_TxCR);
366 cr &= ~_TxCR_DME_MASK;
367 cr |= _TxCR_DME_TBR;
368 writeb(cr, info->port->uart_base+BL_SICC_TxCR);
369}
370
371static void siccuart_disable_tx_interrupt(struct SICC_info *info)
372{
373 unsigned char cr;
374
375 cr = readb(info->port->uart_base+BL_SICC_TxCR);
376 cr &= ~_TxCR_DME_MASK;
377 cr |= _TxCR_DME_DISABLE;
378 writeb(cr, info->port->uart_base+BL_SICC_TxCR);
379}
380
381
382static void siccuart_stop(struct tty_struct *tty)
383{
384 struct SICC_info *info = tty->driver_data;
385 unsigned long flags;
386
387 /* disable interrupts while stopping serial port interrupts */
388 spin_lock_irqsave(&info->state->sicc_lock,flags);
389 siccuart_disable_tx_interrupt(info);
390 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
391}
392
393static void siccuart_start(struct tty_struct *tty)
394{
395 struct SICC_info *info = tty->driver_data;
396 unsigned long flags;
397
398 /* disable interrupts while starting serial port interrupts */
399 spin_lock_irqsave(&info->state->sicc_lock,flags);
400 if (info->xmit.head != info->xmit.tail
401 && info->xmit.buf)
402 siccuart_enable_tx_interrupt(info);
403 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
404}
405
406
407/*
408 * This routine is used by the interrupt handler to schedule
409 * processing in the software interrupt portion of the driver.
410 */
411static void siccuart_event(struct SICC_info *info, int event)
412{
413 info->event |= 1 << event;
414 tasklet_schedule(&info->tlet);
415}
416
417static void
418siccuart_rx_chars(struct SICC_info *info, struct pt_regs *regs)
419{
420 struct tty_struct *tty = info->tty;
421 unsigned int status, ch, rsr, flg, ignored = 0;
422 struct SICC_icount *icount = &info->state->icount;
423 struct SICC_port *port = info->port;
424
425 status = readb(port->uart_base+BL_SICC_LSR );
426 while (status & _LSR_RBR_FULL) {
427 ch = readb(port->uart_base+BL_SICC_RBR);
428
429 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
430 goto ignore_char;
431 icount->rx++;
432
433 flg = TTY_NORMAL;
434
435 /*
436 * Note that the error handling code is
437 * out of the main execution path
438 */
439 rsr = readb(port->uart_base+BL_SICC_LSR);
440 if (rsr & _LSR_RX_ERR)
441 goto handle_error;
442#ifdef SUPPORT_SYSRQ
443 if (info->sysrq) {
444 if (ch && time_before(jiffies, info->sysrq)) {
445 handle_sysrq(ch, regs, NULL);
446 info->sysrq = 0;
447 goto ignore_char;
448 }
449 info->sysrq = 0;
450 }
451#endif
452 error_return:
453 *tty->flip.flag_buf_ptr++ = flg;
454 *tty->flip.char_buf_ptr++ = ch;
455 tty->flip.count++;
456 ignore_char:
457 status = readb(port->uart_base+BL_SICC_LSR );
458 }
459out:
460 tty_flip_buffer_push(tty);
461 return;
462
463handle_error:
464 if (rsr & _LSR_LB_BREAK) {
465 rsr &= ~(_LSR_FE_MASK | _LSR_PE_MASK);
466 icount->brk++;
467
468#ifdef SUPPORT_SYSRQ
469 if (info->state->line == siccuart_cons.index) {
470 if (!info->sysrq) {
471 info->sysrq = jiffies + HZ*5;
472 goto ignore_char;
473 }
474 }
475#endif
476 } else if (rsr & _LSR_PE_MASK)
477 icount->parity++;
478 else if (rsr & _LSR_FE_MASK)
479 icount->frame++;
480 if (rsr & _LSR_OE_MASK)
481 icount->overrun++;
482
483 if (rsr & info->ignore_status_mask) {
484 if (++ignored > 100)
485 goto out;
486 goto ignore_char;
487 }
488 rsr &= info->read_status_mask;
489
490 if (rsr & _LSR_LB_BREAK)
491 flg = TTY_BREAK;
492 else if (rsr & _LSR_PE_MASK)
493 flg = TTY_PARITY;
494 else if (rsr & _LSR_FE_MASK)
495 flg = TTY_FRAME;
496
497 if (rsr & _LSR_OE_MASK) {
498 /*
499 * CHECK: does overrun affect the current character?
500 * ASSUMPTION: it does not.
501 */
502 *tty->flip.flag_buf_ptr++ = flg;
503 *tty->flip.char_buf_ptr++ = ch;
504 tty->flip.count++;
505 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
506 goto ignore_char;
507 ch = 0;
508 flg = TTY_OVERRUN;
509 }
510#ifdef SUPPORT_SYSRQ
511 info->sysrq = 0;
512#endif
513 goto error_return;
514}
515
516static void siccuart_tx_chars(struct SICC_info *info)
517{
518 struct SICC_port *port = info->port;
519 int count;
520 unsigned char status;
521
522
523 if (info->x_char) {
524 writeb(info->x_char, port->uart_base+ BL_SICC_TBR);
525 info->state->icount.tx++;
526 info->x_char = 0;
527 return;
528 }
529 if (info->xmit.head == info->xmit.tail
530 || info->tty->stopped
531 || info->tty->hw_stopped) {
532 siccuart_disable_tx_interrupt(info);
533 writeb(status&(~_LSR_RBR_MASK),port->uart_base+BL_SICC_LSR);
534 return;
535 }
536
537 count = port->fifosize;
538 do {
539 writeb(info->xmit.buf[info->xmit.tail], port->uart_base+ BL_SICC_TBR);
540 info->xmit.tail = (info->xmit.tail + 1) & (SICC_XMIT_SIZE - 1);
541 info->state->icount.tx++;
542 if (info->xmit.head == info->xmit.tail)
543 break;
544 } while (--count > 0);
545
546 if (CIRC_CNT(info->xmit.head,
547 info->xmit.tail,
548 SICC_XMIT_SIZE) < WAKEUP_CHARS)
549 siccuart_event(info, EVT_WRITE_WAKEUP);
550
551 if (info->xmit.head == info->xmit.tail) {
552 siccuart_disable_tx_interrupt(info);
553 }
554}
555
556
557static irqreturn_t siccuart_int_rx(int irq, void *dev_id, struct pt_regs *regs)
558{
559 struct SICC_info *info = dev_id;
560 siccuart_rx_chars(info, regs);
561 return IRQ_HANDLED;
562}
563
564
565static irqreturn_t siccuart_int_tx(int irq, void *dev_id, struct pt_regs *regs)
566{
567 struct SICC_info *info = dev_id;
568 siccuart_tx_chars(info);
569 return IRQ_HANDLED;
570}
571
572static void siccuart_tasklet_action(unsigned long data)
573{
574 struct SICC_info *info = (struct SICC_info *)data;
575 struct tty_struct *tty;
576
577 tty = info->tty;
578 if (!tty || !test_and_clear_bit(EVT_WRITE_WAKEUP, &info->event))
579 return;
580
581 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
582 tty->ldisc.write_wakeup)
583 (tty->ldisc.write_wakeup)(tty);
584 wake_up_interruptible(&tty->write_wait);
585}
586
587static int siccuart_startup(struct SICC_info *info)
588{
589 unsigned long flags;
590 unsigned long page;
591 int retval = 0;
592
593 if (info->flags & ASYNC_INITIALIZED) {
594 return 0;
595 }
596
597 page = get_zeroed_page(GFP_KERNEL);
598 if (!page)
599 return -ENOMEM;
600
601 if (info->port->uart_base == 0)
602 info->port->uart_base = (int)ioremap(info->port->uart_base_phys, PAGE_SIZE);
603 if (info->port->uart_base == 0) {
604 free_page(page);
605 return -ENOMEM;
606 }
607
608 /* lock access to info while doing setup */
609 spin_lock_irqsave(&info->state->sicc_lock,flags);
610
611 if (info->xmit.buf)
612 free_page(page);
613 else
614 info->xmit.buf = (unsigned char *) page;
615
616
617 info->mctrl = 0;
618 if (info->tty->termios->c_cflag & CBAUD)
619 info->mctrl = TIOCM_RTS | TIOCM_DTR;
620 info->port->set_mctrl(info->port, info->mctrl);
621
622 /*
623 * initialise the old status of the modem signals
624 */
625 info->old_status = 0; // UART_GET_FR(info->port) & AMBA_UARTFR_MODEM_ANY;
626
627
628 if (info->tty)
629 clear_bit(TTY_IO_ERROR, &info->tty->flags);
630 info->xmit.head = info->xmit.tail = 0;
631
632 /*
633 * Set up the tty->alt_speed kludge
634 */
635 if (info->tty) {
636 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
637 info->tty->alt_speed = 57600;
638 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
639 info->tty->alt_speed = 115200;
640 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
641 info->tty->alt_speed = 230400;
642 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
643 info->tty->alt_speed = 460800;
644 }
645
646
647 writeb( 0x00, info->port->uart_base + BL_SICC_IrCR ); // disable IrDA
648
649
650 /*
651 * and set the speed of the serial port
652 */
653 siccuart_change_speed(info, 0);
654
655 // enable rx/tx ports
656 writeb(_RCR_ER_ENABLE /*| _RCR_PME_HARD*/, info->port->uart_base + BL_SICC_RCR);
657 writeb(_TxCR_ET_ENABLE , info->port->uart_base + BL_SICC_TxCR);
658
659 readb(info->port->uart_base + BL_SICC_RBR); // clear rx port
660
661 writeb(0xf8, info->port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */
662
663 /*
664 * Finally, enable interrupts
665 */
666
667 /*
668 * Allocate the IRQ
669 */
670 retval = request_irq(info->port->irqrx, siccuart_int_rx, 0, "SICC rx", info);
671 if (retval) {
672 if (capable(CAP_SYS_ADMIN)) {
673 if (info->tty)
674 set_bit(TTY_IO_ERROR, &info->tty->flags);
675 retval = 0;
676 }
677 goto errout;
678 }
679 retval = request_irq(info->port->irqtx, siccuart_int_tx, 0, "SICC tx", info);
680 if (retval) {
681 if (capable(CAP_SYS_ADMIN)) {
682 if (info->tty)
683 set_bit(TTY_IO_ERROR, &info->tty->flags);
684 retval = 0;
685 }
686 free_irq(info->port->irqrx, info);
687 goto errout;
688 }
689
690 siccuart_enable_rx_interrupt(info);
691
692 info->flags |= ASYNC_INITIALIZED;
693 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
694 return 0;
695
696
697errout:
698 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
699 return retval;
700}
701
702/*
703 * This routine will shutdown a serial port; interrupts are disabled, and
704 * DTR is dropped if the hangup on close termio flag is on.
705 */
706static void siccuart_shutdown(struct SICC_info *info)
707{
708 unsigned long flags;
709
710 if (!(info->flags & ASYNC_INITIALIZED))
711 return;
712
713 /* lock while shutting down port */
714 spin_lock_irqsave(&info->state->sicc_lock,flags); /* Disable interrupts */
715
716 /*
717 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
718 * here so the queue might never be woken up
719 */
720 wake_up_interruptible(&info->delta_msr_wait);
721
722 /*
723 * disable all interrupts, disable the port
724 */
725 siccuart_disable_rx_interrupt(info);
726 siccuart_disable_tx_interrupt(info);
727
728 /*
729 * Free the IRQ
730 */
731 free_irq(info->port->irqtx, info);
732 free_irq(info->port->irqrx, info);
733
734 if (info->xmit.buf) {
735 unsigned long pg = (unsigned long) info->xmit.buf;
736 info->xmit.buf = NULL;
737 free_page(pg);
738 }
739
740
741 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
742 info->mctrl &= ~(TIOCM_DTR|TIOCM_RTS);
743 info->port->set_mctrl(info->port, info->mctrl);
744
745 /* kill off our tasklet */
746 tasklet_kill(&info->tlet);
747 if (info->tty)
748 set_bit(TTY_IO_ERROR, &info->tty->flags);
749
750 info->flags &= ~ASYNC_INITIALIZED;
751
752 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
753}
754
755
756static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios)
757{
758 unsigned int lcr_h, baud, quot, cflag, old_rcr, old_tcr, bits;
759 unsigned long flags;
760
761 if (!info->tty || !info->tty->termios)
762 return;
763
764 cflag = info->tty->termios->c_cflag;
765
766 pr_debug("siccuart_set_cflag(0x%x) called\n", cflag);
767 /* byte size and parity */
768 switch (cflag & CSIZE) {
769 case CS7: lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; bits = 9; break;
770 default: lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; bits = 10; break; // CS8
771 }
772 if (cflag & CSTOPB) {
773 lcr_h |= _LCR_SB_2_BIT;
774 bits ++;
775 }
776 if (cflag & PARENB) {
777 lcr_h |= _LCR_PE_ENABLE;
778 bits++;
779 if (!(cflag & PARODD))
780 lcr_h |= _LCR_PTY_ODD;
781 else
782 lcr_h |= _LCR_PTY_EVEN;
783 }
784
785 do {
786 /* Determine divisor based on baud rate */
787 baud = tty_get_baud_rate(info->tty);
788 if (!baud)
789 baud = 9600;
790
791
792 {
793 // here is ppc403SetBaud(com_port, baud);
794 unsigned long divisor, clockSource, temp;
795
796 /* Ensure CICCR[7] is 0 to select Internal Baud Clock */
797 powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF));
798
799 /* Determine Internal Baud Clock Frequency */
800 /* powerpcMfclkgpcr() reads DCR 0x120 - the*/
801 /* SCCR (Serial Clock Control Register) on Vesta */
802 temp = powerpcMfclkgpcr();
803
804 if(temp & 0x00000080) {
805 clockSource = 324000000;
806 }
807 else {
808 clockSource = 216000000;
809 }
810 clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18);
811 divisor = clockSource/(16*baud) - 1;
812 /* divisor has only 12 bits of resolution */
813 if(divisor>0x00000FFF){
814 divisor=0x00000FFF;
815 }
816
817 quot = divisor;
818 }
819
820 if (baud == 38400 &&
821 ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST))
822 quot = info->state->custom_divisor;
823
824 if (!quot && old_termios) {
825 info->tty->termios->c_cflag &= ~CBAUD;
826 info->tty->termios->c_cflag |= (old_termios->c_cflag & CBAUD);
827 old_termios = NULL;
828 }
829 } while (quot == 0 && old_termios);
830
831 /* As a last resort, if the quotient is zero, default to 9600 bps */
832 if (!quot)
833 quot = (info->port->uartclk / (16 * 9600)) - 1;
834
835 info->timeout = info->port->fifosize * HZ * bits / baud;
836 info->timeout += HZ/50; /* Add .02 seconds of slop */
837
838 if (cflag & CRTSCTS)
839 info->flags |= ASYNC_CTS_FLOW;
840 else
841 info->flags &= ~ASYNC_CTS_FLOW;
842 if (cflag & CLOCAL)
843 info->flags &= ~ASYNC_CHECK_CD;
844 else
845 info->flags |= ASYNC_CHECK_CD;
846
847 /*
848 * Set up parity check flag
849 */
850#define RELEVENT_IFLAG(iflag) ((iflag) & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
851
852 info->read_status_mask = _LSR_OE_MASK;
853 if (I_INPCK(info->tty))
854 info->read_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK;
855 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
856 info->read_status_mask |= _LSR_LB_MASK;
857
858 /*
859 * Characters to ignore
860 */
861 info->ignore_status_mask = 0;
862 if (I_IGNPAR(info->tty))
863 info->ignore_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK;
864 if (I_IGNBRK(info->tty)) {
865 info->ignore_status_mask |= _LSR_LB_MASK;
866 /*
867 * If we're ignoring parity and break indicators,
868 * ignore overruns to (for real raw support).
869 */
870 if (I_IGNPAR(info->tty))
871 info->ignore_status_mask |= _LSR_OE_MASK;
872 }
873
874 /* disable interrupts while reading and clearing registers */
875 spin_lock_irqsave(&info->state->sicc_lock,flags);
876
877 old_rcr = readb(info->port->uart_base + BL_SICC_RCR);
878 old_tcr = readb(info->port->uart_base + BL_SICC_TxCR);
879
880
881 writeb(0, info->port->uart_base + BL_SICC_RCR);
882 writeb(0, info->port->uart_base + BL_SICC_TxCR);
883
884 /*RLBtrace (&ppc403Chan0, 0x2000000c, 0, 0);*/
885
886
887 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
888
889
890 /* Set baud rate */
891 writeb((quot & 0x00000F00)>>8, info->port->uart_base + BL_SICC_BRDH );
892 writeb( quot & 0x00000FF, info->port->uart_base + BL_SICC_BRDL );
893
894 /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */
895 /* For now, do NOT use FIFOs since 403 UART did not have this */
896 /* capability and this driver was inherited from 403UART. */
897 writeb(_CTL2_EXTERN, info->port->uart_base + BL_SICC_CTL2);
898
899 writeb(lcr_h, info->port->uart_base + BL_SICC_LCR);
900
901 writeb(old_rcr, info->port->uart_base + BL_SICC_RCR); // restore rcr
902 writeb(old_tcr, info->port->uart_base + BL_SICC_TxCR); // restore txcr
903
904}
905
906
907static void siccuart_put_char(struct tty_struct *tty, u_char ch)
908{
909 struct SICC_info *info = tty->driver_data;
910 unsigned long flags;
911
912 if (!tty || !info->xmit.buf)
913 return;
914
915 /* lock info->xmit while adding character to tx buffer */
916 spin_lock_irqsave(&info->state->sicc_lock,flags);
917 if (CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE) != 0) {
918 info->xmit.buf[info->xmit.head] = ch;
919 info->xmit.head = (info->xmit.head + 1) & (SICC_XMIT_SIZE - 1);
920 }
921 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
922}
923
924static void siccuart_flush_chars(struct tty_struct *tty)
925{
926 struct SICC_info *info = tty->driver_data;
927 unsigned long flags;
928
929 if (info->xmit.head == info->xmit.tail
930 || tty->stopped
931 || tty->hw_stopped
932 || !info->xmit.buf)
933 return;
934
935 /* disable interrupts while transmitting characters */
936 spin_lock_irqsave(&info->state->sicc_lock,flags);
937 siccuart_enable_tx_interrupt(info);
938 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
939}
940
941static int siccuart_write(struct tty_struct *tty,
942 const u_char * buf, int count)
943{
944 struct SICC_info *info = tty->driver_data;
945 unsigned long flags;
946 int c, ret = 0;
947
948 if (!tty || !info->xmit.buf || !tmp_buf)
949 return 0;
950
951 /* lock info->xmit while removing characters from buffer */
952 spin_lock_irqsave(&info->state->sicc_lock,flags);
953 while (1) {
954 c = CIRC_SPACE_TO_END(info->xmit.head,
955 info->xmit.tail,
956 SICC_XMIT_SIZE);
957 if (count < c)
958 c = count;
959 if (c <= 0)
960 break;
961 memcpy(info->xmit.buf + info->xmit.head, buf, c);
962 info->xmit.head = (info->xmit.head + c) &
963 (SICC_XMIT_SIZE - 1);
964 buf += c;
965 count -= c;
966 ret += c;
967 }
968 if (info->xmit.head != info->xmit.tail
969 && !tty->stopped
970 && !tty->hw_stopped)
971 siccuart_enable_tx_interrupt(info);
972 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
973 return ret;
974}
975
976static int siccuart_write_room(struct tty_struct *tty)
977{
978 struct SICC_info *info = tty->driver_data;
979
980 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE);
981}
982
983static int siccuart_chars_in_buffer(struct tty_struct *tty)
984{
985 struct SICC_info *info = tty->driver_data;
986
987 return CIRC_CNT(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE);
988}
989
990static void siccuart_flush_buffer(struct tty_struct *tty)
991{
992 struct SICC_info *info = tty->driver_data;
993 unsigned long flags;
994
995 pr_debug("siccuart_flush_buffer(%d) called\n", tty->index);
996 /* lock info->xmit while zeroing buffer counts */
997 spin_lock_irqsave(&info->state->sicc_lock,flags);
998 info->xmit.head = info->xmit.tail = 0;
999 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1000 wake_up_interruptible(&tty->write_wait);
1001 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
1002 tty->ldisc.write_wakeup)
1003 (tty->ldisc.write_wakeup)(tty);
1004}
1005
1006/*
1007 * This function is used to send a high-priority XON/XOFF character to
1008 * the device
1009 */
1010static void siccuart_send_xchar(struct tty_struct *tty, char ch)
1011{
1012 struct SICC_info *info = tty->driver_data;
1013
1014 info->x_char = ch;
1015 if (ch)
1016 siccuart_enable_tx_interrupt(info);
1017}
1018
1019static void siccuart_throttle(struct tty_struct *tty)
1020{
1021 struct SICC_info *info = tty->driver_data;
1022 unsigned long flags;
1023
1024 if (I_IXOFF(tty))
1025 siccuart_send_xchar(tty, STOP_CHAR(tty));
1026
1027 if (tty->termios->c_cflag & CRTSCTS) {
1028 /* disable interrupts while setting modem control lines */
1029 spin_lock_irqsave(&info->state->sicc_lock,flags);
1030 info->mctrl &= ~TIOCM_RTS;
1031 info->port->set_mctrl(info->port, info->mctrl);
1032 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1033 }
1034}
1035
1036static void siccuart_unthrottle(struct tty_struct *tty)
1037{
1038 struct SICC_info *info = (struct SICC_info *) tty->driver_data;
1039 unsigned long flags;
1040
1041 if (I_IXOFF(tty)) {
1042 if (info->x_char)
1043 info->x_char = 0;
1044 else
1045 siccuart_send_xchar(tty, START_CHAR(tty));
1046 }
1047
1048 if (tty->termios->c_cflag & CRTSCTS) {
1049 /* disable interrupts while setting modem control lines */
1050 spin_lock_irqsave(&info->state->sicc_lock,flags);
1051 info->mctrl |= TIOCM_RTS;
1052 info->port->set_mctrl(info->port, info->mctrl);
1053 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1054 }
1055}
1056
1057static int get_serial_info(struct SICC_info *info, struct serial_struct *retinfo)
1058{
1059 struct SICC_state *state = info->state;
1060 struct SICC_port *port = info->port;
1061 struct serial_struct tmp;
1062
1063 memset(&tmp, 0, sizeof(tmp));
1064 tmp.type = 0;
1065 tmp.line = state->line;
1066 tmp.port = port->uart_base;
1067 if (HIGH_BITS_OFFSET)
1068 tmp.port_high = port->uart_base >> HIGH_BITS_OFFSET;
1069 tmp.irq = port->irqrx;
1070 tmp.flags = 0;
1071 tmp.xmit_fifo_size = port->fifosize;
1072 tmp.baud_base = port->uartclk / 16;
1073 tmp.close_delay = state->close_delay;
1074 tmp.closing_wait = state->closing_wait;
1075 tmp.custom_divisor = state->custom_divisor;
1076
1077 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1078 return -EFAULT;
1079 return 0;
1080}
1081
1082static int set_serial_info(struct SICC_info *info,
1083 struct serial_struct *newinfo)
1084{
1085 struct serial_struct new_serial;
1086 struct SICC_state *state, old_state;
1087 struct SICC_port *port;
1088 unsigned long new_port;
1089 unsigned int i, change_irq, change_port;
1090 int retval = 0;
1091
1092 if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
1093 return -EFAULT;
1094
1095 state = info->state;
1096 old_state = *state;
1097 port = info->port;
1098
1099 new_port = new_serial.port;
1100 if (HIGH_BITS_OFFSET)
1101 new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET;
1102
1103 change_irq = new_serial.irq != port->irqrx;
1104 change_port = new_port != port->uart_base;
1105
1106 if (!capable(CAP_SYS_ADMIN)) {
1107 if (change_irq || change_port ||
1108 (new_serial.baud_base != port->uartclk / 16) ||
1109 (new_serial.close_delay != state->close_delay) ||
1110 (new_serial.xmit_fifo_size != port->fifosize) ||
1111 ((new_serial.flags & ~ASYNC_USR_MASK) !=
1112 (state->flags & ~ASYNC_USR_MASK)))
1113 return -EPERM;
1114 state->flags = ((state->flags & ~ASYNC_USR_MASK) |
1115 (new_serial.flags & ASYNC_USR_MASK));
1116 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1117 (new_serial.flags & ASYNC_USR_MASK));
1118 state->custom_divisor = new_serial.custom_divisor;
1119 goto check_and_exit;
1120 }
1121
1122 if ((new_serial.irq >= NR_IRQS) || (new_serial.irq < 0) ||
1123 (new_serial.baud_base < 9600))
1124 return -EINVAL;
1125
1126 if (new_serial.type && change_port) {
1127 for (i = 0; i < SERIAL_SICC_NR; i++)
1128 if ((port != sicc_ports + i) &&
1129 sicc_ports[i].uart_base != new_port)
1130 return -EADDRINUSE;
1131 }
1132
1133 if ((change_port || change_irq) && (state->count > 1))
1134 return -EBUSY;
1135
1136 /*
1137 * OK, past this point, all the error checking has been done.
1138 * At this point, we start making changes.....
1139 */
1140 port->uartclk = new_serial.baud_base * 16;
1141 state->flags = ((state->flags & ~ASYNC_FLAGS) |
1142 (new_serial.flags & ASYNC_FLAGS));
1143 info->flags = ((state->flags & ~ASYNC_INTERNAL_FLAGS) |
1144 (info->flags & ASYNC_INTERNAL_FLAGS));
1145 state->custom_divisor = new_serial.custom_divisor;
8f09f4a2
NA		 1146 state->close_delay = msecs_to_jiffies(10 * new_serial.close_delay);
1147 state->closing_wait = msecs_to_jiffies(10 * new_serial.closing_wait);
1da177e4
LT		 1148 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1149 port->fifosize = new_serial.xmit_fifo_size;
1150
1151 if (change_port || change_irq) {
1152 /*
1153 * We need to shutdown the serial port at the old
1154 * port/irq combination.
1155 */
1156 siccuart_shutdown(info);
1157 port->irqrx = new_serial.irq;
1158 port->uart_base = new_port;
1159 }
1160
1161check_and_exit:
1162 if (!port->uart_base)
1163 return 0;
1164 if (info->flags & ASYNC_INITIALIZED) {
1165 if ((old_state.flags & ASYNC_SPD_MASK) !=
1166 (state->flags & ASYNC_SPD_MASK) ||
1167 (old_state.custom_divisor != state->custom_divisor)) {
1168 if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1169 info->tty->alt_speed = 57600;
1170 if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1171 info->tty->alt_speed = 115200;
1172 if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1173 info->tty->alt_speed = 230400;
1174 if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1175 info->tty->alt_speed = 460800;
1176 siccuart_change_speed(info, NULL);
1177 }
1178 } else
1179 retval = siccuart_startup(info);
1180 return retval;
1181}
1182
1183
1184/*
1185 * get_lsr_info - get line status register info
1186 */
1187static int get_lsr_info(struct SICC_info *info, unsigned int *value)
1188{
1189 unsigned int result, status;
1190 unsigned long flags;
1191
1192 /* disable interrupts while reading status from port */
1193 spin_lock_irqsave(&info->state->sicc_lock,flags);
1194 status = readb(info->port->uart_base + BL_SICC_LSR);
1195 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1196 result = status & _LSR_TSR_EMPTY ? TIOCSER_TEMT : 0;
1197
1198 /*
1199 * If we're about to load something into the transmit
1200 * register, we'll pretend the transmitter isn't empty to
1201 * avoid a race condition (depending on when the transmit
1202 * interrupt happens).
1203 */
1204 if (info->x_char ||
1205 ((CIRC_CNT(info->xmit.head, info->xmit.tail,
1206 SICC_XMIT_SIZE) > 0) &&
1207 !info->tty->stopped && !info->tty->hw_stopped))
1208 result &= TIOCSER_TEMT;
1209
1210 return put_user(result, value);
1211}
1212
1213static int get_modem_info(struct SICC_info *info, unsigned int *value)
1214{
1215 unsigned int result = info->mctrl;
1216
1217 return put_user(result, value);
1218}
1219
1220static int set_modem_info(struct SICC_info *info, unsigned int cmd,
1221 unsigned int *value)
1222{
1223 unsigned int arg, old;
1224 unsigned long flags;
1225
1226 if (get_user(arg, value))
1227 return -EFAULT;
1228
1229 old = info->mctrl;
1230 switch (cmd) {
1231 case TIOCMBIS:
1232 info->mctrl |= arg;
1233 break;
1234
1235 case TIOCMBIC:
1236 info->mctrl &= ~arg;
1237 break;
1238
1239 case TIOCMSET:
1240 info->mctrl = arg;
1241 break;
1242
1243 default:
1244 return -EINVAL;
1245 }
1246 /* disable interrupts while setting modem control lines */
1247 spin_lock_irqsave(&info->state->sicc_lock,flags);
1248 if (old != info->mctrl)
1249 info->port->set_mctrl(info->port, info->mctrl);
1250 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1251 return 0;
1252}
1253
1254static void siccuart_break_ctl(struct tty_struct *tty, int break_state)
1255{
1256 struct SICC_info *info = tty->driver_data;
1257 unsigned long flags;
1258 unsigned int lcr_h;
1259
1260
1261 /* disable interrupts while setting break state */
1262 spin_lock_irqsave(&info->state->sicc_lock,flags);
1263 lcr_h = readb(info->port + BL_SICC_LSR);
1264 if (break_state == -1)
1265 lcr_h |= _LSR_LB_MASK;
1266 else
1267 lcr_h &= ~_LSR_LB_MASK;
1268 writeb(lcr_h, info->port + BL_SICC_LSRS);
1269 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1270}
1271
1272static int siccuart_ioctl(struct tty_struct *tty, struct file *file,
1273 unsigned int cmd, unsigned long arg)
1274{
1275 struct SICC_info *info = tty->driver_data;
1276 struct SICC_icount cnow;
1277 struct serial_icounter_struct icount;
1278 unsigned long flags;
1279
1280 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
1281 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) &&
1282 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1283 if (tty->flags & (1 << TTY_IO_ERROR))
1284 return -EIO;
1285 }
1286
1287 switch (cmd) {
1288 case TIOCMGET:
1289 return get_modem_info(info, (unsigned int *)arg);
1290 case TIOCMBIS:
1291 case TIOCMBIC:
1292 case TIOCMSET:
1293 return set_modem_info(info, cmd, (unsigned int *)arg);
1294 case TIOCGSERIAL:
1295 return get_serial_info(info,
1296 (struct serial_struct *)arg);
1297 case TIOCSSERIAL:
1298 return set_serial_info(info,
1299 (struct serial_struct *)arg);
1300 case TIOCSERGETLSR: /* Get line status register */
1301 return get_lsr_info(info, (unsigned int *)arg);
1302 /*
1303 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1304 * - mask passed in arg for lines of interest
1305 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1306 * Caller should use TIOCGICOUNT to see which one it was
1307 */
1308 case TIOCMIWAIT:
1309 return 0;
1310 /*
1311 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1312 * Return: write counters to the user passed counter struct
1313 * NB: both 1->0 and 0->1 transitions are counted except for
1314 * RI where only 0->1 is counted.
1315 */
1316 case TIOCGICOUNT:
1317 /* disable interrupts while getting interrupt count */
1318 spin_lock_irqsave(&info->state->sicc_lock,flags);
1319 cnow = info->state->icount;
1320 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1321 icount.cts = cnow.cts;
1322 icount.dsr = cnow.dsr;
1323 icount.rng = cnow.rng;
1324 icount.dcd = cnow.dcd;
1325 icount.rx = cnow.rx;
1326 icount.tx = cnow.tx;
1327 icount.frame = cnow.frame;
1328 icount.overrun = cnow.overrun;
1329 icount.parity = cnow.parity;
1330 icount.brk = cnow.brk;
1331 icount.buf_overrun = cnow.buf_overrun;
1332
1333 return copy_to_user((void *)arg, &icount, sizeof(icount))
1334 ? -EFAULT : 0;
1335
1336 default:
1337 return -ENOIOCTLCMD;
1338 }
1339 return 0;
1340}
1341
1342static void siccuart_set_termios(struct tty_struct *tty, struct termios *old_termios)
1343{
1344 struct SICC_info *info = tty->driver_data;
1345 unsigned long flags;
1346 unsigned int cflag = tty->termios->c_cflag;
1347
1348 if ((cflag ^ old_termios->c_cflag) == 0 &&
1349 RELEVENT_IFLAG(tty->termios->c_iflag ^ old_termios->c_iflag) == 0)
1350 return;
1351
1352 siccuart_change_speed(info, old_termios);
1353
1354 /* Handle transition to B0 status */
1355 if ((old_termios->c_cflag & CBAUD) &&
1356 !(cflag & CBAUD)) {
1357 /* disable interrupts while setting break state */
1358 spin_lock_irqsave(&info->state->sicc_lock,flags);
1359 info->mctrl &= ~(TIOCM_RTS | TIOCM_DTR);
1360 info->port->set_mctrl(info->port, info->mctrl);
1361 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1362 }
1363
1364 /* Handle transition away from B0 status */
1365 if (!(old_termios->c_cflag & CBAUD) &&
1366 (cflag & CBAUD)) {
1367 /* disable interrupts while setting break state */
1368 spin_lock_irqsave(&info->state->sicc_lock,flags);
1369 info->mctrl |= TIOCM_DTR;
1370 if (!(cflag & CRTSCTS) ||
1371 !test_bit(TTY_THROTTLED, &tty->flags))
1372 info->mctrl |= TIOCM_RTS;
1373 info->port->set_mctrl(info->port, info->mctrl);
1374 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1375 }
1376
1377 /* Handle turning off CRTSCTS */
1378 if ((old_termios->c_cflag & CRTSCTS) &&
1379 !(cflag & CRTSCTS)) {
1380 tty->hw_stopped = 0;
1381 siccuart_start(tty);
1382 }
1383
1384#if 0
1385 /*
1386 * No need to wake up processes in open wait, since they
1387 * sample the CLOCAL flag once, and don't recheck it.
1388 * XXX It's not clear whether the current behavior is correct
1389 * or not. Hence, this may change.....
1390 */
1391 if (!(old_termios->c_cflag & CLOCAL) &&
1392 (tty->termios->c_cflag & CLOCAL))
1393 wake_up_interruptible(&info->open_wait);
1394#endif
1395}
1396
1397static void siccuart_close(struct tty_struct *tty, struct file *filp)
1398{
1399 struct SICC_info *info = tty->driver_data;
1400 struct SICC_state *state;
1401 unsigned long flags;
1402
1403 if (!info)
1404 return;
1405
1406 state = info->state;
1407
1408 //pr_debug("siccuart_close() called\n");
1409
1410 /* lock tty->driver_data while closing port */
1411 spin_lock_irqsave(&info->state->sicc_lock,flags);
1412
1413 if (tty_hung_up_p(filp)) {
1414 goto quick_close;
1415 }
1416
1417 if ((tty->count == 1) && (state->count != 1)) {
1418 /*
1419 * Uh, oh. tty->count is 1, which means that the tty
1420 * structure will be freed. state->count should always
1421 * be one in these conditions. If it's greater than
1422 * one, we've got real problems, since it means the
1423 * serial port won't be shutdown.
1424 */
1425 printk("siccuart_close: bad serial port count; tty->count is 1, state->count is %d\n", state->count);
1426 state->count = 1;
1427 }
1428 if (--state->count < 0) {
1429 printk("rs_close: bad serial port count for %s: %d\n", tty->name, state->count);
1430 state->count = 0;
1431 }
1432 if (state->count) {
1433 goto quick_close;
1434 }
1435 info->flags |= ASYNC_CLOSING;
1436 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1437 /*
1438 * Now we wait for the transmit buffer to clear; and we notify
1439 * the line discipline to only process XON/XOFF characters.
1440 */
1441 tty->closing = 1;
1442 if (info->state->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1443 tty_wait_until_sent(tty, info->state->closing_wait);
1444 /*
1445 * At this point, we stop accepting input. To do this, we
1446 * disable the receive line status interrupts.
1447 */
1448 if (info->flags & ASYNC_INITIALIZED) {
1449 siccuart_disable_rx_interrupt(info);
1450 /*
1451 * Before we drop DTR, make sure the UART transmitter
1452 * has completely drained; this is especially
1453 * important if there is a transmit FIFO!
1454 */
1455 siccuart_wait_until_sent(tty, info->timeout);
1456 }
1457 siccuart_shutdown(info);
1458 if (tty->driver->flush_buffer)
1459 tty->driver->flush_buffer(tty);
1460 if (tty->ldisc.flush_buffer)
1461 tty->ldisc.flush_buffer(tty);
1462 tty->closing = 0;
1463 info->event = 0;
1464 info->tty = NULL;
1465 if (info->blocked_open) {
8f09f4a2
NA		 1466 if (info->state->close_delay)
1467 schedule_timeout_interruptible(info->state->close_delay);
1da177e4
LT		 1468 wake_up_interruptible(&info->open_wait);
1469 }
1470 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1471 wake_up_interruptible(&info->close_wait);
1472 return;
1473
1474quick_close:
1475 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1476 return;
1477}
1478
1479static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout)
1480{
1481 struct SICC_info *info = (struct SICC_info *) tty->driver_data;
1482 unsigned long char_time, expire;
1483
1484 if (info->port->fifosize == 0)
1485 return;
1486
1487 /*
1488 * Set the check interval to be 1/5 of the estimated time to
1489 * send a single character, and make it at least 1. The check
1490 * interval should also be less than the timeout.
1491 *
1492 * Note: we have to use pretty tight timings here to satisfy
1493 * the NIST-PCTS.
1494 */
8f09f4a2 1495 char_time = (info->timeout - msecs_to_jiffies(20)) / info->port->fifosize;
1da177e4
LT		 1496 char_time = char_time / 5;
1497 if (char_time == 0)
1498 char_time = 1;
1499
1500 // Crazy!! sometimes the input arg 'timeout' can be negtive numbers :-(
1501 if (timeout >= 0 && timeout < char_time)
1502 char_time = timeout;
1503 /*
1504 * If the transmitter hasn't cleared in twice the approximate
1505 * amount of time to send the entire FIFO, it probably won't
1506 * ever clear. This assumes the UART isn't doing flow
1507 * control, which is currently the case. Hence, if it ever
1508 * takes longer than info->timeout, this is probably due to a
1509 * UART bug of some kind. So, we clamp the timeout parameter at
1510 * 2*info->timeout.
1511 */
1512 if (!timeout || timeout > 2 * info->timeout)
1513 timeout = 2 * info->timeout;
1514
1515 expire = jiffies + timeout;
1516 pr_debug("siccuart_wait_until_sent(%d), jiff=%lu, expire=%lu char_time=%lu...\n",
1517 tty->index, jiffies,
1518 expire, char_time);
1519 while ((readb(info->port->uart_base + BL_SICC_LSR) & _LSR_TX_ALL) != _LSR_TX_ALL) {
8f09f4a2 1520 schedule_timeout_interruptible(char_time);
1da177e4
LT		 1521 if (signal_pending(current))
1522 break;
1523 if (timeout && time_after(jiffies, expire))
1524 break;
1525 }
1526 set_current_state(TASK_RUNNING);
1527}
1528
1529static void siccuart_hangup(struct tty_struct *tty)
1530{
1531 struct SICC_info *info = tty->driver_data;
1532 struct SICC_state *state = info->state;
1533
1534 siccuart_flush_buffer(tty);
1535 if (info->flags & ASYNC_CLOSING)
1536 return;
1537 siccuart_shutdown(info);
1538 info->event = 0;
1539 state->count = 0;
1540 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1541 info->tty = NULL;
1542 wake_up_interruptible(&info->open_wait);
1543}
1544
1545static int block_til_ready(struct tty_struct *tty, struct file *filp,
1546 struct SICC_info *info)
1547{
1548 DECLARE_WAITQUEUE(wait, current);
1549 struct SICC_state *state = info->state;
1550 unsigned long flags;
1551 int do_clocal = 0, extra_count = 0, retval;
1552
1553 /*
1554 * If the device is in the middle of being closed, then block
1555 * until it's done, and then try again.
1556 */
1557 if (tty_hung_up_p(filp) ||
1558 (info->flags & ASYNC_CLOSING)) {
1559 if (info->flags & ASYNC_CLOSING)
1560 interruptible_sleep_on(&info->close_wait);
1561 return (info->flags & ASYNC_HUP_NOTIFY) ?
1562 -EAGAIN : -ERESTARTSYS;
1563 }
1564
1565 /*
1566 * If non-blocking mode is set, or the port is not enabled,
1567 * then make the check up front and then exit.
1568 */
1569 if ((filp->f_flags & O_NONBLOCK) ||
1570 (tty->flags & (1 << TTY_IO_ERROR))) {
1571 info->flags |= ASYNC_NORMAL_ACTIVE;
1572 return 0;
1573 }
1574
1575 if (tty->termios->c_cflag & CLOCAL)
1576 do_clocal = 1;
1577
1578 /*
1579 * Block waiting for the carrier detect and the line to become
1580 * free (i.e., not in use by the callout). While we are in
1581 * this loop, state->count is dropped by one, so that
1582 * rs_close() knows when to free things. We restore it upon
1583 * exit, either normal or abnormal.
1584 */
1585 retval = 0;
1586 add_wait_queue(&info->open_wait, &wait);
1587 /* lock while decrementing state->count */
1588 spin_lock_irqsave(&info->state->sicc_lock,flags);
1589 if (!tty_hung_up_p(filp)) {
1590 extra_count = 1;
1591 state->count--;
1592 }
1593 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1594 info->blocked_open++;
1595 while (1) {
1596 /* disable interrupts while setting modem control lines */
1597 spin_lock_irqsave(&info->state->sicc_lock,flags);
1598 if (tty->termios->c_cflag & CBAUD) {
1599 info->mctrl = TIOCM_DTR | TIOCM_RTS;
1600 info->port->set_mctrl(info->port, info->mctrl);
1601 }
1602 spin_unlock_irqrestore(&info->state->sicc_lock,flags);
1603 set_current_state(TASK_INTERRUPTIBLE);
1604 if (tty_hung_up_p(filp) ||
1605 !(info->flags & ASYNC_INITIALIZED)) {
1606 if (info->flags & ASYNC_HUP_NOTIFY)
1607 retval = -EAGAIN;
1608 else
1609 retval = -ERESTARTSYS;
1610 break;
1611 }
1612 if (!(info->flags & ASYNC_CLOSING) &&
1613 (do_clocal /*|| (UART_GET_FR(info->port) & SICC_UARTFR_DCD)*/))
1614 break;
1615 if (signal_pending(current)) {
1616 retval = -ERESTARTSYS;
1617 break;
1618 }
1619 schedule();
1620 }
1621 set_current_state(TASK_RUNNING);
1622 remove_wait_queue(&info->open_wait, &wait);
1623 if (extra_count)
1624 state->count++;
1625 info->blocked_open--;
1626 if (retval)
1627 return retval;
1628 info->flags |= ASYNC_NORMAL_ACTIVE;
1629 return 0;
1630}
1631
1632static struct SICC_info *siccuart_get(int line)
1633{
1634 struct SICC_info *info;
1635 struct SICC_state *state = sicc_state + line;
1636
1637 state->count++;
1638 if (state->info)
1639 return state->info;
1640 info = kmalloc(sizeof(struct SICC_info), GFP_KERNEL);
1641 if (info) {
1642 memset(info, 0, sizeof(struct SICC_info));
1643 init_waitqueue_head(&info->open_wait);
1644 init_waitqueue_head(&info->close_wait);
1645 init_waitqueue_head(&info->delta_msr_wait);
1646 info->flags = state->flags;
1647 info->state = state;
1648 info->port = sicc_ports + line;
1649 tasklet_init(&info->tlet, siccuart_tasklet_action,
1650 (unsigned long)info);
1651 }
1652 if (state->info) {
1653 kfree(info);
1654 return state->info;
1655 }
1656 state->info = info;
1657 return info;
1658}
1659
1660static int siccuart_open(struct tty_struct *tty, struct file *filp)
1661{
1662 struct SICC_info *info;
1663 int retval, line = tty->index;
1664
1665
1666 // is this a line that we've got?
1667 if (line >= SERIAL_SICC_NR) {
1668 return -ENODEV;
1669 }
1670
1671 info = siccuart_get(line);
1672 if (!info)
1673 return -ENOMEM;
1674
1675 tty->driver_data = info;
1676 info->tty = tty;
1677 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1678
1679 /*
1680 * Make sure we have the temporary buffer allocated
1681 */
1682 if (!tmp_buf) {
1683 unsigned long page = get_zeroed_page(GFP_KERNEL);
1684 if (tmp_buf)
1685 free_page(page);
1686 else if (!page) {
1687 return -ENOMEM;
1688 }
1689 tmp_buf = (u_char *)page;
1690 }
1691
1692 /*
1693 * If the port is in the middle of closing, bail out now.
1694 */
1695 if (tty_hung_up_p(filp) ||
1696 (info->flags & ASYNC_CLOSING)) {
1697 if (info->flags & ASYNC_CLOSING)
1698 interruptible_sleep_on(&info->close_wait);
1699 return -EAGAIN;
1700 }
1701
1702 /*
1703 * Start up the serial port
1704 */
1705 retval = siccuart_startup(info);
1706 if (retval) {
1707 return retval;
1708 }
1709
1710 retval = block_til_ready(tty, filp, info);
1711 if (retval) {
1712 return retval;
1713 }
1714
1715#ifdef CONFIG_SERIAL_SICC_CONSOLE
1716 if (siccuart_cons.cflag && siccuart_cons.index == line) {
1717 tty->termios->c_cflag = siccuart_cons.cflag;
1718 siccuart_cons.cflag = 0;
1719 siccuart_change_speed(info, NULL);
1720 }
1721#endif
1722 return 0;
1723}
1724
1725static struct tty_operations sicc_ops = {
1726 .open = siccuart_open,
1727 .close = siccuart_close,
1728 .write = siccuart_write,
1729 .put_char = siccuart_put_char,
1730 .flush_chars = siccuart_flush_chars,
1731 .write_room = siccuart_write_room,
1732 .chars_in_buffer = siccuart_chars_in_buffer,
1733 .flush_buffer = siccuart_flush_buffer,
1734 .ioctl = siccuart_ioctl,
1735 .throttle = siccuart_throttle,
1736 .unthrottle = siccuart_unthrottle,
1737 .send_xchar = siccuart_send_xchar,
1738 .set_termios = siccuart_set_termios,
1739 .stop = siccuart_stop,
1740 .start = siccuart_start,
1741 .hangup = siccuart_hangup,
1742 .break_ctl = siccuart_break_ctl,
1743 .wait_until_sent = siccuart_wait_until_sent,
1744};
1745
1746int __init siccuart_init(void)
1747{
1748 int i;
1749 siccnormal_driver = alloc_tty_driver(SERIAL_SICC_NR);
1750 if (!siccnormal_driver)
1751 return -ENOMEM;
1752 printk("IBM Vesta SICC serial port driver V 0.1 by Yudong Yang and Yi Ge / IBM CRL .\n");
1753 siccnormal_driver->driver_name = "serial_sicc";
1754 siccnormal_driver->owner = THIS_MODULE;
1755 siccnormal_driver->name = SERIAL_SICC_NAME;
1756 siccnormal_driver->major = SERIAL_SICC_MAJOR;
1757 siccnormal_driver->minor_start = SERIAL_SICC_MINOR;
1758 siccnormal_driver->type = TTY_DRIVER_TYPE_SERIAL;
1759 siccnormal_driver->subtype = SERIAL_TYPE_NORMAL;
1760 siccnormal_driver->init_termios = tty_std_termios;
1761 siccnormal_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
1762 siccnormal_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
1763 tty_set_operations(siccnormal_driver, &sicc_ops);
1764
1765 if (tty_register_driver(siccnormal_driver))
1766 panic("Couldn't register SICC serial driver\n");
1767
1768 for (i = 0; i < SERIAL_SICC_NR; i++) {
1769 struct SICC_state *state = sicc_state + i;
1770 state->line = i;
8f09f4a2 1771 state->close_delay = msecs_to_jiffies(500);
1da177e4
LT		 1772 state->closing_wait = 30 * HZ;
1773 spin_lock_init(&state->sicc_lock);
1774 }
1775
1776
1777 return 0;
1778}
1779
1780__initcall(siccuart_init);
1781
1782#ifdef CONFIG_SERIAL_SICC_CONSOLE
1783/************** console driver *****************/
1784
1785/*
1786 * This code is currently never used; console->read is never called.
1787 * Therefore, although we have an implementation, we don't use it.
1788 * FIXME: the "const char *s" should be fixed to "char *s" some day.
1789 * (when the definition in include/linux/console.h is also fixed)
1790 */
1791#ifdef used_and_not_const_char_pointer
1792static int siccuart_console_read(struct console *co, const char *s, u_int count)
1793{
1794 struct SICC_port *port = &sicc_ports[co->index];
1795 unsigned int status;
1796 char *w;
1797 int c;
1798
1799 pr_debug("siccuart_console_read() called\n");
1800
1801 c = 0;
1802 w = s;
1803 while (c < count) {
1804 if(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL) {
1805 *w++ = readb(port->uart_base + BL_SICC_RBR);
1806 c++;
1807 } else {
1808 // nothing more to get, return
1809 return c;
1810 }
1811 }
1812 // return the count
1813 return c;
1814}
1815#endif
1816
1817/*
1818 * Print a string to the serial port trying not to disturb
1819 * any possible real use of the port...
1820 *
1821 * The console_lock must be held when we get here.
1822 */
1823static void siccuart_console_write(struct console *co, const char *s, u_int count)
1824{
1825 struct SICC_port *port = &sicc_ports[co->index];
1826 unsigned int old_cr;
1827 int i;
1828
1829 /*
1830 * First save the CR then disable the interrupts
1831 */
1832 old_cr = readb(port->uart_base + BL_SICC_TxCR);
1833 writeb(old_cr & ~_TxCR_DME_MASK, port->uart_base + BL_SICC_TxCR);
1834
1835 /*
1836 * Now, do each character
1837 */
1838 for (i = 0; i < count; i++) {
1839 while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
1840 writeb(s[i], port->uart_base + BL_SICC_TBR);
1841 if (s[i] == '\n') {
1842 while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
1843 writeb('\r', port->uart_base + BL_SICC_TBR);
1844 }
1845 }
1846
1847 /*
1848 * Finally, wait for transmitter to become empty
1849 * and restore the TCR
1850 */
1851 while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
1852 writeb(old_cr, port->uart_base + BL_SICC_TxCR);
1853}
1854
1855/*
1856 * Receive character from the serial port
1857 */
1858static int siccuart_console_wait_key(struct console *co)
1859{
1860 struct SICC_port *port = &sicc_ports[co->index];
1861 int c;
1862
1863 while(!(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL));
1864 c = readb(port->uart_base + BL_SICC_RBR);
1865 return c;
1866}
1867
1868static struct tty_driver *siccuart_console_device(struct console *c, int *index)
1869{
1870 *index = c->index;
1871 return siccnormal_driver;
1872}
1873
1874static int __init siccuart_console_setup(struct console *co, char *options)
1875{
1876 struct SICC_port *port;
1877 int baud = 9600;
1878 int bits = 8;
1879 int parity = 'n';
1880 u_int cflag = CREAD | HUPCL | CLOCAL;
1881 u_int lcr_h, quot;
1882
1883
1884 if (co->index >= SERIAL_SICC_NR)
1885 co->index = 0;
1886
1887 port = &sicc_ports[co->index];
1888
1889 if (port->uart_base == 0)
1890 port->uart_base = (int)ioremap(port->uart_base_phys, PAGE_SIZE);
1891
1892 if (options) {
1893 char *s = options;
1894 baud = simple_strtoul(s, NULL, 10);
1895 while (*s >= '0' && *s <= '9')
1896 s++;
1897 if (*s) parity = *s++;
1898 if (*s) bits = *s - '0';
1899 }
1900
1901 /*
1902 * Now construct a cflag setting.
1903 */
1904 switch (baud) {
1905 case 1200: cflag |= B1200; break;
1906 case 2400: cflag |= B2400; break;
1907 case 4800: cflag |= B4800; break;
1908 default: cflag |= B9600; baud = 9600; break;
1909 case 19200: cflag |= B19200; break;
1910 case 38400: cflag |= B38400; break;
1911 case 57600: cflag |= B57600; break;
1912 case 115200: cflag |= B115200; break;
1913 }
1914 switch (bits) {
1915 case 7: cflag |= CS7; lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; break;
1916 default: cflag |= CS8; lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; break;
1917 }
1918 switch (parity) {
1919 case 'o':
1920 case 'O': cflag |= PARODD; lcr_h |= _LCR_PTY_ODD; break;
1921 case 'e':
1922 case 'E': cflag |= PARENB; lcr_h |= _LCR_PE_ENABLE | _LCR_PTY_ODD; break;
1923 }
1924
1925 co->cflag = cflag;
1926
1927
1928 {
1929 // a copy of is inserted here ppc403SetBaud(com_port, (int)9600);
1930 unsigned long divisor, clockSource, temp;
1931 unsigned int rate = baud;
1932
1933 /* Ensure CICCR[7] is 0 to select Internal Baud Clock */
1934 powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF));
1935
1936 /* Determine Internal Baud Clock Frequency */
1937 /* powerpcMfclkgpcr() reads DCR 0x120 - the*/
1938 /* SCCR (Serial Clock Control Register) on Vesta */
1939 temp = powerpcMfclkgpcr();
1940
1941 if(temp & 0x00000080) {
1942 clockSource = 324000000;
1943 }
1944 else {
1945 clockSource = 216000000;
1946 }
1947 clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18);
1948 divisor = clockSource/(16*rate) - 1;
1949 /* divisor has only 12 bits of resolution */
1950 if(divisor>0x00000FFF){
1951 divisor=0x00000FFF;
1952 }
1953
1954 quot = divisor;
1955 }
1956
1957 writeb((quot & 0x00000F00)>>8, port->uart_base + BL_SICC_BRDH );
1958 writeb( quot & 0x00000FF, port->uart_base + BL_SICC_BRDL );
1959
1960 /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */
1961 /* For now, do NOT use FIFOs since 403 UART did not have this */
1962 /* capability and this driver was inherited from 403UART. */
1963 writeb(_CTL2_EXTERN, port->uart_base + BL_SICC_CTL2);
1964
1965 writeb(lcr_h, port->uart_base + BL_SICC_LCR);
1966 writeb(_RCR_ER_ENABLE | _RCR_PME_HARD, port->uart_base + BL_SICC_RCR);
1967 writeb( _TxCR_ET_ENABLE , port->uart_base + BL_SICC_TxCR);
1968
1969 // writeb(, info->port->uart_base + BL_SICC_RCR );
1970 /*
1971 * Transmitter Command Register: Transmitter enabled & DMA + TBR interrupt
1972 * + Transmitter Empty interrupt + Transmitter error interrupt disabled &
1973 * Stop mode when CTS active enabled & Transmit Break + Pattern Generation
1974 * mode disabled.
1975 */
1976
1977 writeb( 0x00, port->uart_base + BL_SICC_IrCR ); // disable IrDA
1978
1979 readb(port->uart_base + BL_SICC_RBR);
1980
1981 writeb(0xf8, port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */
1982
1983 /* we will enable the port as we need it */
1984
1985 return 0;
1986}
1987
1988static struct console siccuart_cons =
1989{
1990 .name = SERIAL_SICC_NAME,
1991 .write = siccuart_console_write,
1992#ifdef used_and_not_const_char_pointer
1993 .read = siccuart_console_read,
1994#endif
1995 .device = siccuart_console_device,
1996 .wait_key = siccuart_console_wait_key,
1997 .setup = siccuart_console_setup,
1998 .flags = CON_PRINTBUFFER,
1999 .index = -1,
2000};
2001
2002void __init sicc_console_init(void)
2003{
2004 register_console(&siccuart_cons);
2005}
2006
2007#endif /* CONFIG_SERIAL_SICC_CONSOLE */
Linux kernel - Deliverables
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