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[PATCH] powerpc: merged asm/cputable.h
[deliverable/linux.git] / arch / ppc / kernel / cputable.c
CommitLineData
1da177e4
LT		 1/*
2 * arch/ppc/kernel/cputable.c
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/config.h>
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/threads.h>
16#include <linux/init.h>
17#include <asm/cputable.h>
18
19struct cpu_spec* cur_cpu_spec[NR_CPUS];
20
21extern void __setup_cpu_601(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
22extern void __setup_cpu_603(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
23extern void __setup_cpu_604(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
24extern void __setup_cpu_750(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
25extern void __setup_cpu_750cx(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
26extern void __setup_cpu_750fx(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
27extern void __setup_cpu_7400(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
28extern void __setup_cpu_7410(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
29extern void __setup_cpu_745x(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
30extern void __setup_cpu_power3(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
31extern void __setup_cpu_power4(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
32extern void __setup_cpu_ppc970(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
33extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
34
35#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \
36 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
37 !defined(CONFIG_BOOKE))
38
39/* This table only contains "desktop" CPUs, it need to be filled with embedded
40 * ones as well...
41 */
42#define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
43 PPC_FEATURE_HAS_MMU)
44
1da177e4
LT		 45/* We only set the spe features if the kernel was compiled with
46 * spe support
47 */
48#ifdef CONFIG_SPE
49#define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
50#else
51#define PPC_FEATURE_SPE_COMP 0
52#endif
53
1da177e4
LT		 54struct cpu_spec cpu_specs[] = {
55#if CLASSIC_PPC
56 { /* 601 */
57 .pvr_mask = 0xffff0000,
58 .pvr_value = 0x00010000,
59 .cpu_name = "601",
10b35d99 60 .cpu_features = CPU_FTRS_PPC601,
1da177e4
LT		 61 .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR |
62 PPC_FEATURE_UNIFIED_CACHE,
63 .icache_bsize = 32,
64 .dcache_bsize = 32,
65 .cpu_setup = __setup_cpu_601
66 },
67 { /* 603 */
68 .pvr_mask = 0xffff0000,
69 .pvr_value = 0x00030000,
70 .cpu_name = "603",
10b35d99 71 .cpu_features = CPU_FTRS_603,
1da177e4
LT		 72 .cpu_user_features = COMMON_PPC,
73 .icache_bsize = 32,
74 .dcache_bsize = 32,
75 .cpu_setup = __setup_cpu_603
76 },
77 { /* 603e */
78 .pvr_mask = 0xffff0000,
79 .pvr_value = 0x00060000,
80 .cpu_name = "603e",
10b35d99 81 .cpu_features = CPU_FTRS_603,
1da177e4
LT		 82 .cpu_user_features = COMMON_PPC,
83 .icache_bsize = 32,
84 .dcache_bsize = 32,
85 .cpu_setup = __setup_cpu_603
86 },
87 { /* 603ev */
88 .pvr_mask = 0xffff0000,
89 .pvr_value = 0x00070000,
90 .cpu_name = "603ev",
10b35d99 91 .cpu_features = CPU_FTRS_603,
1da177e4
LT		 92 .cpu_user_features = COMMON_PPC,
93 .icache_bsize = 32,
94 .dcache_bsize = 32,
95 .cpu_setup = __setup_cpu_603
96 },
97 { /* 604 */
98 .pvr_mask = 0xffff0000,
99 .pvr_value = 0x00040000,
100 .cpu_name = "604",
10b35d99 101 .cpu_features = CPU_FTRS_604,
1da177e4
LT		 102 .cpu_user_features = COMMON_PPC,
103 .icache_bsize = 32,
104 .dcache_bsize = 32,
105 .num_pmcs = 2,
106 .cpu_setup = __setup_cpu_604
107 },
108 { /* 604e */
109 .pvr_mask = 0xfffff000,
110 .pvr_value = 0x00090000,
111 .cpu_name = "604e",
10b35d99 112 .cpu_features = CPU_FTRS_604,
1da177e4
LT		 113 .cpu_user_features = COMMON_PPC,
114 .icache_bsize = 32,
115 .dcache_bsize = 32,
116 .num_pmcs = 4,
117 .cpu_setup = __setup_cpu_604
118 },
119 { /* 604r */
120 .pvr_mask = 0xffff0000,
121 .pvr_value = 0x00090000,
122 .cpu_name = "604r",
10b35d99 123 .cpu_features = CPU_FTRS_604,
1da177e4
LT		 124 .cpu_user_features = COMMON_PPC,
125 .icache_bsize = 32,
126 .dcache_bsize = 32,
127 .num_pmcs = 4,
128 .cpu_setup = __setup_cpu_604
129 },
130 { /* 604ev */
131 .pvr_mask = 0xffff0000,
132 .pvr_value = 0x000a0000,
133 .cpu_name = "604ev",
10b35d99 134 .cpu_features = CPU_FTRS_604,
1da177e4
LT		 135 .cpu_user_features = COMMON_PPC,
136 .icache_bsize = 32,
137 .dcache_bsize = 32,
138 .num_pmcs = 4,
139 .cpu_setup = __setup_cpu_604
140 },
141 { /* 740/750 (0x4202, don't support TAU ?) */
142 .pvr_mask = 0xffffffff,
143 .pvr_value = 0x00084202,
144 .cpu_name = "740/750",
10b35d99 145 .cpu_features = CPU_FTRS_740_NOTAU,
1da177e4
LT		 146 .cpu_user_features = COMMON_PPC,
147 .icache_bsize = 32,
148 .dcache_bsize = 32,
149 .num_pmcs = 4,
150 .cpu_setup = __setup_cpu_750
151 },
1da177e4
LT		 152 { /* 750CX (80100 and 8010x?) */
153 .pvr_mask = 0xfffffff0,
154 .pvr_value = 0x00080100,
155 .cpu_name = "750CX",
10b35d99 156 .cpu_features = CPU_FTRS_750,
1da177e4
LT		 157 .cpu_user_features = COMMON_PPC,
158 .icache_bsize = 32,
159 .dcache_bsize = 32,
160 .num_pmcs = 4,
161 .cpu_setup = __setup_cpu_750cx
162 },
163 { /* 750CX (82201 and 82202) */
164 .pvr_mask = 0xfffffff0,
165 .pvr_value = 0x00082200,
166 .cpu_name = "750CX",
10b35d99 167 .cpu_features = CPU_FTRS_750,
1da177e4
LT		 168 .cpu_user_features = COMMON_PPC,
169 .icache_bsize = 32,
170 .dcache_bsize = 32,
171 .num_pmcs = 4,
172 .cpu_setup = __setup_cpu_750cx
173 },
174 { /* 750CXe (82214) */
175 .pvr_mask = 0xfffffff0,
176 .pvr_value = 0x00082210,
177 .cpu_name = "750CXe",
10b35d99 178 .cpu_features = CPU_FTRS_750,
1da177e4
LT		 179 .cpu_user_features = COMMON_PPC,
180 .icache_bsize = 32,
181 .dcache_bsize = 32,
182 .num_pmcs = 4,
183 .cpu_setup = __setup_cpu_750cx
184 },
7c31625a
AO		 185 { /* 750CXe "Gekko" (83214) */
186 .pvr_mask = 0xffffffff,
187 .pvr_value = 0x00083214,
188 .cpu_name = "750CXe",
10b35d99 189 .cpu_features = CPU_FTRS_750,
7c31625a
AO		 190 .cpu_user_features = COMMON_PPC,
191 .icache_bsize = 32,
192 .dcache_bsize = 32,
193 .num_pmcs = 4,
194 .cpu_setup = __setup_cpu_750cx
195 },
ac1ff047
AO		 196 { /* 745/755 */
197 .pvr_mask = 0xfffff000,
198 .pvr_value = 0x00083000,
199 .cpu_name = "745/755",
10b35d99 200 .cpu_features = CPU_FTRS_750,
ac1ff047
AO		 201 .cpu_user_features = COMMON_PPC,
202 .icache_bsize = 32,
203 .dcache_bsize = 32,
204 .num_pmcs = 4,
205 .cpu_setup = __setup_cpu_750
206 },
1da177e4
LT		 207 { /* 750FX rev 1.x */
208 .pvr_mask = 0xffffff00,
209 .pvr_value = 0x70000100,
210 .cpu_name = "750FX",
10b35d99 211 .cpu_features = CPU_FTRS_750FX1,
1da177e4
LT		 212 .cpu_user_features = COMMON_PPC,
213 .icache_bsize = 32,
214 .dcache_bsize = 32,
215 .num_pmcs = 4,
216 .cpu_setup = __setup_cpu_750
217 },
218 { /* 750FX rev 2.0 must disable HID0[DPM] */
219 .pvr_mask = 0xffffffff,
220 .pvr_value = 0x70000200,
221 .cpu_name = "750FX",
10b35d99 222 .cpu_features = CPU_FTRS_750FX2,
1da177e4
LT		 223 .cpu_user_features = COMMON_PPC,
224 .icache_bsize = 32,
225 .dcache_bsize = 32,
226 .num_pmcs = 4,
227 .cpu_setup = __setup_cpu_750
228 },
229 { /* 750FX (All revs except 2.0) */
230 .pvr_mask = 0xffff0000,
231 .pvr_value = 0x70000000,
232 .cpu_name = "750FX",
10b35d99 233 .cpu_features = CPU_FTRS_750FX,
1da177e4
LT		 234 .cpu_user_features = COMMON_PPC,
235 .icache_bsize = 32,
236 .dcache_bsize = 32,
237 .num_pmcs = 4,
238 .cpu_setup = __setup_cpu_750fx
239 },
240 { /* 750GX */
241 .pvr_mask = 0xffff0000,
242 .pvr_value = 0x70020000,
243 .cpu_name = "750GX",
10b35d99 244 .cpu_features = CPU_FTRS_750GX,
1da177e4
LT		 245 .cpu_user_features = COMMON_PPC,
246 .icache_bsize = 32,
247 .dcache_bsize = 32,
248 .num_pmcs = 4,
249 .cpu_setup = __setup_cpu_750fx
250 },
251 { /* 740/750 (L2CR bit need fixup for 740) */
252 .pvr_mask = 0xffff0000,
253 .pvr_value = 0x00080000,
254 .cpu_name = "740/750",
10b35d99 255 .cpu_features = CPU_FTRS_740,
1da177e4
LT		 256 .cpu_user_features = COMMON_PPC,
257 .icache_bsize = 32,
258 .dcache_bsize = 32,
259 .num_pmcs = 4,
260 .cpu_setup = __setup_cpu_750
261 },
262 { /* 7400 rev 1.1 ? (no TAU) */
263 .pvr_mask = 0xffffffff,
264 .pvr_value = 0x000c1101,
265 .cpu_name = "7400 (1.1)",
10b35d99
KG		 266 .cpu_features = CPU_FTRS_7400_NOTAU,
267 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 268 .icache_bsize = 32,
269 .dcache_bsize = 32,
270 .num_pmcs = 4,
271 .cpu_setup = __setup_cpu_7400
272 },
273 { /* 7400 */
274 .pvr_mask = 0xffff0000,
275 .pvr_value = 0x000c0000,
276 .cpu_name = "7400",
10b35d99
KG		 277 .cpu_features = CPU_FTRS_7400,
278 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 279 .icache_bsize = 32,
280 .dcache_bsize = 32,
281 .num_pmcs = 4,
282 .cpu_setup = __setup_cpu_7400
283 },
284 { /* 7410 */
285 .pvr_mask = 0xffff0000,
286 .pvr_value = 0x800c0000,
287 .cpu_name = "7410",
10b35d99
KG		 288 .cpu_features = CPU_FTRS_7400,
289 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 290 .icache_bsize = 32,
291 .dcache_bsize = 32,
292 .num_pmcs = 4,
293 .cpu_setup = __setup_cpu_7410
294 },
295 { /* 7450 2.0 - no doze/nap */
296 .pvr_mask = 0xffffffff,
297 .pvr_value = 0x80000200,
298 .cpu_name = "7450",
10b35d99
KG		 299 .cpu_features = CPU_FTRS_7450_20,
300 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 301 .icache_bsize = 32,
302 .dcache_bsize = 32,
303 .num_pmcs = 6,
304 .cpu_setup = __setup_cpu_745x
305 },
306 { /* 7450 2.1 */
307 .pvr_mask = 0xffffffff,
308 .pvr_value = 0x80000201,
309 .cpu_name = "7450",
10b35d99
KG		 310 .cpu_features = CPU_FTRS_7450_21,
311 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 312 .icache_bsize = 32,
313 .dcache_bsize = 32,
314 .num_pmcs = 6,
315 .cpu_setup = __setup_cpu_745x
316 },
317 { /* 7450 2.3 and newer */
318 .pvr_mask = 0xffff0000,
319 .pvr_value = 0x80000000,
320 .cpu_name = "7450",
10b35d99
KG		 321 .cpu_features = CPU_FTRS_7450_23,
322 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 323 .icache_bsize = 32,
324 .dcache_bsize = 32,
325 .num_pmcs = 6,
326 .cpu_setup = __setup_cpu_745x
327 },
328 { /* 7455 rev 1.x */
329 .pvr_mask = 0xffffff00,
330 .pvr_value = 0x80010100,
331 .cpu_name = "7455",
10b35d99
KG		 332 .cpu_features = CPU_FTRS_7455_1,
333 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 334 .icache_bsize = 32,
335 .dcache_bsize = 32,
336 .num_pmcs = 6,
337 .cpu_setup = __setup_cpu_745x
338 },
339 { /* 7455 rev 2.0 */
340 .pvr_mask = 0xffffffff,
341 .pvr_value = 0x80010200,
342 .cpu_name = "7455",
10b35d99
KG		 343 .cpu_features = CPU_FTRS_7455_20,
344 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 345 .icache_bsize = 32,
346 .dcache_bsize = 32,
347 .num_pmcs = 6,
348 .cpu_setup = __setup_cpu_745x
349 },
350 { /* 7455 others */
351 .pvr_mask = 0xffff0000,
352 .pvr_value = 0x80010000,
353 .cpu_name = "7455",
10b35d99
KG		 354 .cpu_features = CPU_FTRS_7455,
355 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 356 .icache_bsize = 32,
357 .dcache_bsize = 32,
358 .num_pmcs = 6,
359 .cpu_setup = __setup_cpu_745x
360 },
361 { /* 7447/7457 Rev 1.0 */
362 .pvr_mask = 0xffffffff,
363 .pvr_value = 0x80020100,
364 .cpu_name = "7447/7457",
10b35d99
KG		 365 .cpu_features = CPU_FTRS_7447_10,
366 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 367 .icache_bsize = 32,
368 .dcache_bsize = 32,
369 .num_pmcs = 6,
370 .cpu_setup = __setup_cpu_745x
371 },
372 { /* 7447/7457 Rev 1.1 */
373 .pvr_mask = 0xffffffff,
374 .pvr_value = 0x80020101,
375 .cpu_name = "7447/7457",
10b35d99
KG		 376 .cpu_features = CPU_FTRS_7447_10,
377 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 378 .icache_bsize = 32,
379 .dcache_bsize = 32,
380 .num_pmcs = 6,
381 .cpu_setup = __setup_cpu_745x
382 },
383 { /* 7447/7457 Rev 1.2 and later */
384 .pvr_mask = 0xffff0000,
385 .pvr_value = 0x80020000,
386 .cpu_name = "7447/7457",
10b35d99
KG		 387 .cpu_features = CPU_FTRS_7447,
388 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 389 .icache_bsize = 32,
390 .dcache_bsize = 32,
391 .num_pmcs = 6,
392 .cpu_setup = __setup_cpu_745x
393 },
394 { /* 7447A */
395 .pvr_mask = 0xffff0000,
396 .pvr_value = 0x80030000,
397 .cpu_name = "7447A",
10b35d99
KG		 398 .cpu_features = CPU_FTRS_7447A,
399 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
bbde630b
KG		 400 .icache_bsize = 32,
401 .dcache_bsize = 32,
402 .num_pmcs = 6,
403 .cpu_setup = __setup_cpu_745x
404 },
405 { /* 7448 */
406 .pvr_mask = 0xffff0000,
407 .pvr_value = 0x80040000,
408 .cpu_name = "7448",
10b35d99
KG		 409 .cpu_features = CPU_FTRS_7447A,
410 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 411 .icache_bsize = 32,
412 .dcache_bsize = 32,
413 .num_pmcs = 6,
414 .cpu_setup = __setup_cpu_745x
415 },
416 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
417 .pvr_mask = 0x7fff0000,
418 .pvr_value = 0x00810000,
419 .cpu_name = "82xx",
10b35d99 420 .cpu_features = CPU_FTRS_82XX,
1da177e4
LT		 421 .cpu_user_features = COMMON_PPC,
422 .icache_bsize = 32,
423 .dcache_bsize = 32,
424 .cpu_setup = __setup_cpu_603
425 },
426 { /* All G2_LE (603e core, plus some) have the same pvr */
427 .pvr_mask = 0x7fff0000,
428 .pvr_value = 0x00820000,
429 .cpu_name = "G2_LE",
10b35d99 430 .cpu_features = CPU_FTRS_G2_LE,
1da177e4
LT		 431 .cpu_user_features = COMMON_PPC,
432 .icache_bsize = 32,
433 .dcache_bsize = 32,
434 .cpu_setup = __setup_cpu_603
435 },
436 { /* e300 (a 603e core, plus some) on 83xx */
437 .pvr_mask = 0x7fff0000,
438 .pvr_value = 0x00830000,
439 .cpu_name = "e300",
10b35d99 440 .cpu_features = CPU_FTRS_E300,
1da177e4
LT		 441 .cpu_user_features = COMMON_PPC,
442 .icache_bsize = 32,
443 .dcache_bsize = 32,
444 .cpu_setup = __setup_cpu_603
445 },
446 { /* default match, we assume split I/D cache & TB (non-601)... */
447 .pvr_mask = 0x00000000,
448 .pvr_value = 0x00000000,
449 .cpu_name = "(generic PPC)",
10b35d99 450 .cpu_features = CPU_FTRS_CLASSIC32,
1da177e4
LT		 451 .cpu_user_features = COMMON_PPC,
452 .icache_bsize = 32,
453 .dcache_bsize = 32,
454 .cpu_setup = __setup_cpu_generic
455 },
456#endif /* CLASSIC_PPC */
457#ifdef CONFIG_PPC64BRIDGE
458 { /* Power3 */
459 .pvr_mask = 0xffff0000,
460 .pvr_value = 0x00400000,
461 .cpu_name = "Power3 (630)",
10b35d99 462 .cpu_features = CPU_FTRS_POWER3_32,
1da177e4
LT		 463 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
464 .icache_bsize = 128,
465 .dcache_bsize = 128,
466 .num_pmcs = 8,
467 .cpu_setup = __setup_cpu_power3
468 },
469 { /* Power3+ */
470 .pvr_mask = 0xffff0000,
471 .pvr_value = 0x00410000,
472 .cpu_name = "Power3 (630+)",
10b35d99 473 .cpu_features = CPU_FTRS_POWER3_32,
1da177e4
LT		 474 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
475 .icache_bsize = 128,
476 .dcache_bsize = 128,
477 .num_pmcs = 8,
478 .cpu_setup = __setup_cpu_power3
479 },
480 { /* I-star */
481 .pvr_mask = 0xffff0000,
482 .pvr_value = 0x00360000,
483 .cpu_name = "I-star",
10b35d99 484 .cpu_features = CPU_FTRS_POWER3_32,
1da177e4
LT		 485 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
486 .icache_bsize = 128,
487 .dcache_bsize = 128,
488 .num_pmcs = 8,
489 .cpu_setup = __setup_cpu_power3
490 },
491 { /* S-star */
492 .pvr_mask = 0xffff0000,
493 .pvr_value = 0x00370000,
494 .cpu_name = "S-star",
10b35d99 495 .cpu_features = CPU_FTRS_POWER3_32,
1da177e4
LT		 496 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
497 .icache_bsize = 128,
498 .dcache_bsize = 128,
499 .num_pmcs = 8,
500 .cpu_setup = __setup_cpu_power3
501 },
502#endif /* CONFIG_PPC64BRIDGE */
503#ifdef CONFIG_POWER4
1da177e4
LT		 504 { /* PPC970FX */
505 .pvr_mask = 0xffff0000,
506 .pvr_value = 0x003c0000,
507 .cpu_name = "PPC970FX",
10b35d99
KG		 508 .cpu_features = CPU_FTRS_970_32,
509 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC_COMP,
1da177e4
LT		 510 .icache_bsize = 128,
511 .dcache_bsize = 128,
512 .num_pmcs = 8,
513 .cpu_setup = __setup_cpu_ppc970
514 },
515#endif /* CONFIG_POWER4 */
516#ifdef CONFIG_8xx
517 { /* 8xx */
518 .pvr_mask = 0xffff0000,
519 .pvr_value = 0x00500000,
520 .cpu_name = "8xx",
521 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
522 * if the 8xx code is there.... */
10b35d99 523 .cpu_features = CPU_FTRS_8XX,
1da177e4
LT		 524 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
525 .icache_bsize = 16,
526 .dcache_bsize = 16,
527 },
528#endif /* CONFIG_8xx */
529#ifdef CONFIG_40x
530 { /* 403GC */
531 .pvr_mask = 0xffffff00,
532 .pvr_value = 0x00200200,
533 .cpu_name = "403GC",
10b35d99 534 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 535 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
536 .icache_bsize = 16,
537 .dcache_bsize = 16,
538 },
539 { /* 403GCX */
540 .pvr_mask = 0xffffff00,
541 .pvr_value = 0x00201400,
542 .cpu_name = "403GCX",
10b35d99 543 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 544 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
545 .icache_bsize = 16,
546 .dcache_bsize = 16,
547 },
548 { /* 403G ?? */
549 .pvr_mask = 0xffff0000,
550 .pvr_value = 0x00200000,
551 .cpu_name = "403G ??",
10b35d99 552 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 553 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
554 .icache_bsize = 16,
555 .dcache_bsize = 16,
556 },
557 { /* 405GP */
558 .pvr_mask = 0xffff0000,
559 .pvr_value = 0x40110000,
560 .cpu_name = "405GP",
10b35d99 561 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 562 .cpu_user_features = PPC_FEATURE_32 |
563 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
564 .icache_bsize = 32,
565 .dcache_bsize = 32,
566 },
567 { /* STB 03xxx */
568 .pvr_mask = 0xffff0000,
569 .pvr_value = 0x40130000,
570 .cpu_name = "STB03xxx",
10b35d99 571 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 572 .cpu_user_features = PPC_FEATURE_32 |
573 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
574 .icache_bsize = 32,
575 .dcache_bsize = 32,
576 },
577 { /* STB 04xxx */
578 .pvr_mask = 0xffff0000,
579 .pvr_value = 0x41810000,
580 .cpu_name = "STB04xxx",
10b35d99 581 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 582 .cpu_user_features = PPC_FEATURE_32 |
583 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
584 .icache_bsize = 32,
585 .dcache_bsize = 32,
586 },
587 { /* NP405L */
588 .pvr_mask = 0xffff0000,
589 .pvr_value = 0x41610000,
590 .cpu_name = "NP405L",
10b35d99 591 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 592 .cpu_user_features = PPC_FEATURE_32 |
593 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
594 .icache_bsize = 32,
595 .dcache_bsize = 32,
596 },
597 { /* NP4GS3 */
598 .pvr_mask = 0xffff0000,
599 .pvr_value = 0x40B10000,
600 .cpu_name = "NP4GS3",
10b35d99 601 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 602 .cpu_user_features = PPC_FEATURE_32 |
603 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
604 .icache_bsize = 32,
605 .dcache_bsize = 32,
606 },
607 { /* NP405H */
608 .pvr_mask = 0xffff0000,
609 .pvr_value = 0x41410000,
610 .cpu_name = "NP405H",
10b35d99 611 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 612 .cpu_user_features = PPC_FEATURE_32 |
613 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
614 .icache_bsize = 32,
615 .dcache_bsize = 32,
616 },
617 { /* 405GPr */
618 .pvr_mask = 0xffff0000,
619 .pvr_value = 0x50910000,
620 .cpu_name = "405GPr",
10b35d99 621 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 622 .cpu_user_features = PPC_FEATURE_32 |
623 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
624 .icache_bsize = 32,
625 .dcache_bsize = 32,
626 },
627 { /* STBx25xx */
628 .pvr_mask = 0xffff0000,
629 .pvr_value = 0x51510000,
630 .cpu_name = "STBx25xx",
10b35d99 631 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 632 .cpu_user_features = PPC_FEATURE_32 |
633 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
634 .icache_bsize = 32,
635 .dcache_bsize = 32,
636 },
637 { /* 405LP */
638 .pvr_mask = 0xffff0000,
639 .pvr_value = 0x41F10000,
640 .cpu_name = "405LP",
10b35d99 641 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 642 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
643 .icache_bsize = 32,
644 .dcache_bsize = 32,
645 },
646 { /* Xilinx Virtex-II Pro */
647 .pvr_mask = 0xffff0000,
648 .pvr_value = 0x20010000,
649 .cpu_name = "Virtex-II Pro",
10b35d99 650 .cpu_features = CPU_FTRS_40X,
1da177e4
LT		 651 .cpu_user_features = PPC_FEATURE_32 |
652 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
653 .icache_bsize = 32,
654 .dcache_bsize = 32,
655 },
ad95d609
ES		 656 { /* 405EP */
657 .pvr_mask = 0xffff0000,
658 .pvr_value = 0x51210000,
659 .cpu_name = "405EP",
10b35d99 660 .cpu_features = CPU_FTRS_40X,
ad95d609
ES		 661 .cpu_user_features = PPC_FEATURE_32 |
662 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
663 .icache_bsize = 32,
664 .dcache_bsize = 32,
665 },
1da177e4
LT		 666
667#endif /* CONFIG_40x */
668#ifdef CONFIG_44x
c9cf73ae
MP		 669 {
670 .pvr_mask = 0xf0000fff,
671 .pvr_value = 0x40000850,
672 .cpu_name = "440EP Rev. A",
10b35d99 673 .cpu_features = CPU_FTRS_44X,
c9cf73ae
MP		 674 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
675 .icache_bsize = 32,
676 .dcache_bsize = 32,
677 },
678 {
679 .pvr_mask = 0xf0000fff,
680 .pvr_value = 0x400008d3,
681 .cpu_name = "440EP Rev. B",
10b35d99 682 .cpu_features = CPU_FTRS_44X,
c9cf73ae
MP		 683 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
684 .icache_bsize = 32,
685 .dcache_bsize = 32,
686 },
1da177e4
LT		 687 { /* 440GP Rev. B */
688 .pvr_mask = 0xf0000fff,
689 .pvr_value = 0x40000440,
690 .cpu_name = "440GP Rev. B",
10b35d99 691 .cpu_features = CPU_FTRS_44X,
1da177e4
LT		 692 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
693 .icache_bsize = 32,
694 .dcache_bsize = 32,
695 },
696 { /* 440GP Rev. C */
697 .pvr_mask = 0xf0000fff,
698 .pvr_value = 0x40000481,
699 .cpu_name = "440GP Rev. C",
10b35d99 700 .cpu_features = CPU_FTRS_44X,
1da177e4
LT		 701 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
702 .icache_bsize = 32,
703 .dcache_bsize = 32,
704 },
705 { /* 440GX Rev. A */
706 .pvr_mask = 0xf0000fff,
707 .pvr_value = 0x50000850,
708 .cpu_name = "440GX Rev. A",
10b35d99 709 .cpu_features = CPU_FTRS_44X,
1da177e4
LT		 710 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
711 .icache_bsize = 32,
712 .dcache_bsize = 32,
713 },
714 { /* 440GX Rev. B */
715 .pvr_mask = 0xf0000fff,
716 .pvr_value = 0x50000851,
717 .cpu_name = "440GX Rev. B",
10b35d99 718 .cpu_features = CPU_FTRS_44X,
1da177e4
LT		 719 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
720 .icache_bsize = 32,
721 .dcache_bsize = 32,
722 },
723 { /* 440GX Rev. C */
724 .pvr_mask = 0xf0000fff,
725 .pvr_value = 0x50000892,
726 .cpu_name = "440GX Rev. C",
10b35d99 727 .cpu_features = CPU_FTRS_44X,
1da177e4
LT		 728 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
729 .icache_bsize = 32,
730 .dcache_bsize = 32,
731 },
9149fb3b
ES		 732 { /* 440GX Rev. F */
733 .pvr_mask = 0xf0000fff,
734 .pvr_value = 0x50000894,
735 .cpu_name = "440GX Rev. F",
10b35d99 736 .cpu_features = CPU_FTRS_44X,
9149fb3b
ES		 737 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
738 .icache_bsize = 32,
739 .dcache_bsize = 32,
740 },
656de7e4
MP		 741 { /* 440SP Rev. A */
742 .pvr_mask = 0xff000fff,
743 .pvr_value = 0x53000891,
744 .cpu_name = "440SP Rev. A",
10b35d99 745 .cpu_features = CPU_FTRS_44X,
656de7e4
MP		 746 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
747 .icache_bsize = 32,
748 .dcache_bsize = 32,
749 },
1da177e4 750#endif /* CONFIG_44x */
33d9e9b5
KG		 751#ifdef CONFIG_FSL_BOOKE
752 { /* e200z5 */
753 .pvr_mask = 0xfff00000,
754 .pvr_value = 0x81000000,
755 .cpu_name = "e200z5",
756 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
10b35d99 757 .cpu_features = CPU_FTRS_E200,
33d9e9b5
KG		 758 .cpu_user_features = PPC_FEATURE_32 |
759 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
760 PPC_FEATURE_UNIFIED_CACHE,
761 .dcache_bsize = 32,
762 },
763 { /* e200z6 */
764 .pvr_mask = 0xfff00000,
765 .pvr_value = 0x81100000,
766 .cpu_name = "e200z6",
767 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
10b35d99 768 .cpu_features = CPU_FTRS_E200,
33d9e9b5
KG		 769 .cpu_user_features = PPC_FEATURE_32 |
770 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
771 PPC_FEATURE_HAS_EFP_SINGLE |
772 PPC_FEATURE_UNIFIED_CACHE,
773 .dcache_bsize = 32,
774 },
1da177e4
LT		 775 { /* e500 */
776 .pvr_mask = 0xffff0000,
777 .pvr_value = 0x80200000,
778 .cpu_name = "e500",
779 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
10b35d99 780 .cpu_features = CPU_FTRS_E500,
1da177e4
LT		 781 .cpu_user_features = PPC_FEATURE_32 |
782 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
783 PPC_FEATURE_HAS_EFP_SINGLE,
784 .icache_bsize = 32,
785 .dcache_bsize = 32,
786 .num_pmcs = 4,
787 },
5b37b700
KG		 788 { /* e500v2 */
789 .pvr_mask = 0xffff0000,
790 .pvr_value = 0x80210000,
791 .cpu_name = "e500v2",
792 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
10b35d99 793 .cpu_features = CPU_FTRS_E500_2,
5b37b700
KG		 794 .cpu_user_features = PPC_FEATURE_32 |
795 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
796 PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
797 .icache_bsize = 32,
798 .dcache_bsize = 32,
799 .num_pmcs = 4,
800 },
1da177e4
LT		 801#endif
802#if !CLASSIC_PPC
803 { /* default match */
804 .pvr_mask = 0x00000000,
805 .pvr_value = 0x00000000,
806 .cpu_name = "(generic PPC)",
10b35d99 807 .cpu_features = CPU_FTRS_GENERIC_32,
1da177e4
LT		 808 .cpu_user_features = PPC_FEATURE_32,
809 .icache_bsize = 32,
810 .dcache_bsize = 32,
811 }
812#endif /* !CLASSIC_PPC */
813};
Linux kernel - Deliverables
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