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1da177e4 LT |
1 | /* |
2 | * arch/ppc/platforms/85xx/mpc8540_ads.c | |
3 | * | |
4 | * MPC8540ADS board specific routines | |
5 | * | |
6 | * Maintainer: Kumar Gala <kumar.gala@freescale.com> | |
7 | * | |
8 | * Copyright 2004 Freescale Semiconductor Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | */ | |
15 | ||
16 | #include <linux/config.h> | |
17 | #include <linux/stddef.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/errno.h> | |
21 | #include <linux/reboot.h> | |
22 | #include <linux/pci.h> | |
23 | #include <linux/kdev_t.h> | |
24 | #include <linux/major.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/irq.h> | |
28 | #include <linux/seq_file.h> | |
29 | #include <linux/root_dev.h> | |
30 | #include <linux/serial.h> | |
31 | #include <linux/tty.h> /* for linux/serial_core.h */ | |
32 | #include <linux/serial_core.h> | |
33 | #include <linux/initrd.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/fsl_devices.h> | |
36 | ||
37 | #include <asm/system.h> | |
38 | #include <asm/pgtable.h> | |
39 | #include <asm/page.h> | |
40 | #include <asm/atomic.h> | |
41 | #include <asm/time.h> | |
42 | #include <asm/io.h> | |
43 | #include <asm/machdep.h> | |
44 | #include <asm/prom.h> | |
45 | #include <asm/open_pic.h> | |
46 | #include <asm/bootinfo.h> | |
47 | #include <asm/pci-bridge.h> | |
48 | #include <asm/mpc85xx.h> | |
49 | #include <asm/irq.h> | |
50 | #include <asm/immap_85xx.h> | |
51 | #include <asm/kgdb.h> | |
52 | #include <asm/ppc_sys.h> | |
53 | #include <mm/mmu_decl.h> | |
54 | ||
55 | #include <syslib/ppc85xx_setup.h> | |
56 | ||
57 | /* ************************************************************************ | |
58 | * | |
59 | * Setup the architecture | |
60 | * | |
61 | */ | |
62 | static void __init | |
63 | mpc8540ads_setup_arch(void) | |
64 | { | |
65 | bd_t *binfo = (bd_t *) __res; | |
66 | unsigned int freq; | |
67 | struct gianfar_platform_data *pdata; | |
68 | ||
69 | /* get the core frequency */ | |
70 | freq = binfo->bi_intfreq; | |
71 | ||
72 | if (ppc_md.progress) | |
73 | ppc_md.progress("mpc8540ads_setup_arch()", 0); | |
74 | ||
75 | /* Set loops_per_jiffy to a half-way reasonable value, | |
76 | for use until calibrate_delay gets called. */ | |
77 | loops_per_jiffy = freq / HZ; | |
78 | ||
79 | #ifdef CONFIG_PCI | |
80 | /* setup PCI host bridges */ | |
81 | mpc85xx_setup_hose(); | |
82 | #endif | |
83 | ||
84 | #ifdef CONFIG_SERIAL_8250 | |
85 | mpc85xx_early_serial_map(); | |
86 | #endif | |
87 | ||
88 | #ifdef CONFIG_SERIAL_TEXT_DEBUG | |
89 | /* Invalidate the entry we stole earlier the serial ports | |
90 | * should be properly mapped */ | |
5be061ee | 91 | invalidate_tlbcam_entry(num_tlbcam_entries - 1); |
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92 | #endif |
93 | ||
94 | /* setup the board related information for the enet controllers */ | |
95 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | |
96 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | |
97 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | |
98 | pdata->phyid = 0; | |
99 | /* fixup phy address */ | |
100 | pdata->phy_reg_addr += binfo->bi_immr_base; | |
101 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | |
102 | ||
103 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | |
104 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | |
105 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | |
106 | pdata->phyid = 1; | |
107 | /* fixup phy address */ | |
108 | pdata->phy_reg_addr += binfo->bi_immr_base; | |
109 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | |
110 | ||
111 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); | |
112 | pdata->board_flags = 0; | |
113 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | |
114 | pdata->phyid = 3; | |
115 | /* fixup phy address */ | |
116 | pdata->phy_reg_addr += binfo->bi_immr_base; | |
117 | memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); | |
118 | ||
119 | #ifdef CONFIG_BLK_DEV_INITRD | |
120 | if (initrd_start) | |
121 | ROOT_DEV = Root_RAM0; | |
122 | else | |
123 | #endif | |
124 | #ifdef CONFIG_ROOT_NFS | |
125 | ROOT_DEV = Root_NFS; | |
126 | #else | |
127 | ROOT_DEV = Root_HDA1; | |
128 | #endif | |
129 | } | |
130 | ||
131 | /* ************************************************************************ */ | |
132 | void __init | |
133 | platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
134 | unsigned long r6, unsigned long r7) | |
135 | { | |
136 | /* parse_bootinfo must always be called first */ | |
137 | parse_bootinfo(find_bootinfo()); | |
138 | ||
139 | /* | |
140 | * If we were passed in a board information, copy it into the | |
141 | * residual data area. | |
142 | */ | |
143 | if (r3) { | |
144 | memcpy((void *) __res, (void *) (r3 + KERNELBASE), | |
145 | sizeof (bd_t)); | |
146 | } | |
147 | #ifdef CONFIG_SERIAL_TEXT_DEBUG | |
148 | { | |
149 | bd_t *binfo = (bd_t *) __res; | |
150 | struct uart_port p; | |
151 | ||
152 | /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */ | |
5be061ee | 153 | settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base, |
1da177e4 LT |
154 | binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0); |
155 | ||
156 | memset(&p, 0, sizeof (p)); | |
157 | p.iotype = SERIAL_IO_MEM; | |
158 | p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET; | |
159 | p.uartclk = binfo->bi_busfreq; | |
160 | ||
161 | gen550_init(0, &p); | |
162 | ||
163 | memset(&p, 0, sizeof (p)); | |
164 | p.iotype = SERIAL_IO_MEM; | |
165 | p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET; | |
166 | p.uartclk = binfo->bi_busfreq; | |
167 | ||
168 | gen550_init(1, &p); | |
169 | } | |
170 | #endif | |
171 | ||
172 | #if defined(CONFIG_BLK_DEV_INITRD) | |
173 | /* | |
174 | * If the init RAM disk has been configured in, and there's a valid | |
175 | * starting address for it, set it up. | |
176 | */ | |
177 | if (r4) { | |
178 | initrd_start = r4 + KERNELBASE; | |
179 | initrd_end = r5 + KERNELBASE; | |
180 | } | |
181 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
182 | ||
183 | /* Copy the kernel command line arguments to a safe place. */ | |
184 | ||
185 | if (r6) { | |
186 | *(char *) (r7 + KERNELBASE) = 0; | |
187 | strcpy(cmd_line, (char *) (r6 + KERNELBASE)); | |
188 | } | |
189 | ||
190 | identify_ppc_sys_by_id(mfspr(SPRN_SVR)); | |
191 | ||
192 | /* setup the PowerPC module struct */ | |
193 | ppc_md.setup_arch = mpc8540ads_setup_arch; | |
194 | ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo; | |
195 | ||
196 | ppc_md.init_IRQ = mpc85xx_ads_init_IRQ; | |
197 | ppc_md.get_irq = openpic_get_irq; | |
198 | ||
199 | ppc_md.restart = mpc85xx_restart; | |
200 | ppc_md.power_off = mpc85xx_power_off; | |
201 | ppc_md.halt = mpc85xx_halt; | |
202 | ||
203 | ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory; | |
204 | ||
205 | ppc_md.time_init = NULL; | |
206 | ppc_md.set_rtc_time = NULL; | |
207 | ppc_md.get_rtc_time = NULL; | |
208 | ppc_md.calibrate_decr = mpc85xx_calibrate_decr; | |
209 | ||
210 | #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG) | |
211 | ppc_md.progress = gen550_progress; | |
212 | #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */ | |
252fcaed KG |
213 | #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB) |
214 | ppc_md.early_serial_map = mpc85xx_early_serial_map; | |
215 | #endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */ | |
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216 | |
217 | if (ppc_md.progress) | |
218 | ppc_md.progress("mpc8540ads_init(): exit", 0); | |
219 | ||
220 | return; | |
221 | } |