projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 | 1 | /* |
| 1da177e4 LT |
2 | * Board setup routines for the SBS PalomarIV. |
| 3 | * | |
| 4 | * Author: Dan Cox | |
| 5 | * | |
| 6 | * 2002 (c) MontaVista, Software, Inc. This file is licensed under | |
| 7 | * the terms of the GNU General Public License version 2. This program | |
| 8 | * is licensed "as is" without any warranty of any kind, whether express | |
| 9 | * or implied. | |
| 10 | */ | |
| 11 | ||
| 12 | #include <linux/config.h> | |
| 13 | #include <linux/kernel.h> | |
| 14 | #include <linux/init.h> | |
| 15 | #include <linux/types.h> | |
| 16 | #include <linux/errno.h> | |
| 17 | #include <linux/reboot.h> | |
| 18 | #include <linux/time.h> | |
| 19 | #include <linux/irq.h> | |
| 20 | #include <linux/kdev_t.h> | |
| 21 | #include <linux/initrd.h> | |
| 22 | #include <linux/console.h> | |
| 23 | #include <linux/seq_file.h> | |
| 24 | #include <linux/root_dev.h> | |
| 25 | ||
| 26 | #include <asm/io.h> | |
| 27 | #include <asm/todc.h> | |
| 28 | #include <asm/bootinfo.h> | |
| fd582ec8 | 29 | #include <asm/machdep.h> |
| 1da177e4 LT |
30 | |
| 31 | #include <syslib/cpc700.h> | |
| 32 | ||
| 33 | #include "pal4.h" | |
| 34 | ||
| 35 | extern void pal4_find_bridges(void); | |
| 36 | ||
| 37 | unsigned int cpc700_irq_assigns[][2] = { | |
| 38 | {1, 1}, /* IRQ 0: ECC correctable error */ | |
| 39 | {1, 1}, /* IRQ 1: PCI write to memory range */ | |
| 40 | {0, 1}, /* IRQ 2: PCI write to command register */ | |
| 41 | {0, 1}, /* IRQ 3: UART 0 */ | |
| 42 | {0, 1}, /* IRQ 4: UART 1 */ | |
| 43 | {0, 1}, /* IRQ 5: ICC 0 */ | |
| 44 | {0, 1}, /* IRQ 6: ICC 1 */ | |
| 45 | {0, 1}, /* IRQ 7: GPT compare 0 */ | |
| 46 | {0, 1}, /* IRQ 8: GPT compare 1 */ | |
| 47 | {0, 1}, /* IRQ 9: GPT compare 2 */ | |
| 48 | {0, 1}, /* IRQ 10: GPT compare 3 */ | |
| 49 | {0, 1}, /* IRQ 11: GPT compare 4 */ | |
| 50 | {0, 1}, /* IRQ 12: GPT capture 0 */ | |
| 51 | {0, 1}, /* IRQ 13: GPT capture 1 */ | |
| 52 | {0, 1}, /* IRQ 14: GPT capture 2 */ | |
| 53 | {0, 1}, /* IRQ 15: GPT capture 3 */ | |
| 54 | {0, 1}, /* IRQ 16: GPT capture 4 */ | |
| 55 | {0, 0}, /* IRQ 17: reserved */ | |
| 56 | {0, 0}, /* IRQ 18: reserved */ | |
| 57 | {0, 0}, /* IRQ 19: reserved */ | |
| 58 | {0, 0}, /* IRQ 20: reserved */ | |
| 59 | {0, 1}, /* IRQ 21: Ethernet */ | |
| 60 | {0, 0}, /* IRQ 22: reserved */ | |
| 61 | {0, 0}, /* IRQ 23: reserved */ | |
| 62 | {0, 0}, /* IRQ 24: resreved */ | |
| 63 | {0, 0}, /* IRQ 25: reserved */ | |
| 64 | {0, 0}, /* IRQ 26: reserved */ | |
| 65 | {0, 0}, /* IRQ 27: reserved */ | |
| 66 | {0, 0}, /* IRQ 28: reserved */ | |
| 67 | {0, 0}, /* IRQ 29: reserved */ | |
| 68 | {0, 0}, /* IRQ 30: reserved */ | |
| 69 | {0, 0}, /* IRQ 31: reserved */ | |
| 70 | }; | |
| 71 | ||
| 72 | static int | |
| 73 | pal4_show_cpuinfo(struct seq_file *m) | |
| 74 | { | |
| 75 | seq_printf(m, "board\t\t: SBS Palomar IV\n"); | |
| 76 | ||
| 77 | return 0; | |
| 78 | } | |
| 79 | ||
| 80 | static void | |
| 81 | pal4_restart(char *cmd) | |
| 82 | { | |
| 83 | local_irq_disable(); | |
| 84 | __asm__ __volatile__("lis 3,0xfff0\n \ | |
| 85 | ori 3,3,0x100\n \ | |
| 86 | mtspr 26,3\n \ | |
| 87 | li 3,0\n \ | |
| 88 | mtspr 27,3\n \ | |
| 89 | rfi"); | |
| 90 | ||
| 91 | for(;;); | |
| 92 | } | |
| 93 | ||
| 94 | static void | |
| 95 | pal4_power_off(void) | |
| 96 | { | |
| 97 | local_irq_disable(); | |
| 98 | for(;;); | |
| 99 | } | |
| 100 | ||
| 101 | static void | |
| 102 | pal4_halt(void) | |
| 103 | { | |
| 104 | pal4_power_off(); | |
| 105 | } | |
| 106 | ||
| 107 | TODC_ALLOC(); | |
| 108 | ||
| 109 | static void __init | |
| 110 | pal4_setup_arch(void) | |
| 111 | { | |
| 112 | unsigned long l2; | |
| 113 | ||
| 114 | TODC_INIT(TODC_TYPE_MK48T37, 0, 0, | |
| 115 | ioremap(PAL4_NVRAM, PAL4_NVRAM_SIZE), 8); | |
| 116 | ||
| 117 | pal4_find_bridges(); | |
| 118 | ||
| 119 | #ifdef CONFIG_BLK_DEV_INITRD | |
| 120 | if (initrd_start) | |
| 121 | ROOT_DEV = Root_RAM0; | |
| 122 | else | |
| 123 | #endif | |
| 124 | ROOT_DEV = Root_NFS; | |
| 125 | ||
| 126 | /* The L2 gets disabled in the bootloader, but all the proper | |
| 127 | bits should be present from the fw, so just re-enable it */ | |
| 128 | l2 = _get_L2CR(); | |
| 129 | if (!(l2 & L2CR_L2E)) { | |
| 130 | /* presume that it was initially set if the size is | |
| 131 | still present. */ | |
| 132 | if (l2 ^ L2CR_L2SIZ_MASK) | |
| 133 | _set_L2CR(l2 | L2CR_L2E); | |
| 134 | else | |
| 135 | printk("L2 not set by firmware; left disabled.\n"); | |
| 136 | } | |
| 137 | } | |
| 138 | ||
| 139 | static void __init | |
| 140 | pal4_map_io(void) | |
| 141 | { | |
| 142 | io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO); | |
| 143 | } | |
| 144 | ||
| 145 | void __init | |
| 146 | platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
| 147 | unsigned long r6, unsigned long r7) | |
| 148 | { | |
| 149 | parse_bootinfo(find_bootinfo()); | |
| 150 | ||
| 151 | isa_io_base = 0 /*PAL4_ISA_IO_BASE*/; | |
| 152 | pci_dram_offset = 0 /*PAL4_PCI_SYS_MEM_BASE*/; | |
| 153 | ||
| 154 | ppc_md.setup_arch = pal4_setup_arch; | |
| 155 | ppc_md.show_cpuinfo = pal4_show_cpuinfo; | |
| 156 | ||
| 157 | ppc_md.setup_io_mappings = pal4_map_io; | |
| 158 | ||
| 159 | ppc_md.init_IRQ = cpc700_init_IRQ; | |
| 160 | ppc_md.get_irq = cpc700_get_irq; | |
| 161 | ||
| 162 | ppc_md.restart = pal4_restart; | |
| 163 | ppc_md.halt = pal4_halt; | |
| 164 | ppc_md.power_off = pal4_power_off; | |
| 165 | ||
| 166 | ppc_md.time_init = todc_time_init; | |
| 167 | ppc_md.set_rtc_time = todc_set_rtc_time; | |
| 168 | ppc_md.get_rtc_time = todc_get_rtc_time; | |
| 169 | ppc_md.calibrate_decr = todc_calibrate_decr; | |
| 170 | ||
| 171 | ppc_md.nvram_read_val = todc_direct_read_val; | |
| 172 | ppc_md.nvram_write_val = todc_direct_write_val; | |
| 173 | } | |
| 174 |