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212188a5 HB |
1 | /* |
2 | * CPU-measurement facilities | |
3 | * | |
4 | * Copyright IBM Corp. 2012 | |
5 | * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com> | |
6 | * Jan Glauber <jang@linux.vnet.ibm.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License (version 2 only) | |
10 | * as published by the Free Software Foundation. | |
11 | */ | |
b03d541a JG |
12 | #ifndef _ASM_S390_CPU_MF_H |
13 | #define _ASM_S390_CPU_MF_H | |
14 | ||
cb16b91a | 15 | #include <linux/errno.h> |
1e3cab2f HC |
16 | #include <asm/facility.h> |
17 | ||
b03d541a JG |
18 | #define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */ |
19 | #define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */ | |
20 | #define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */ | |
21 | #define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */ | |
22 | #define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */ | |
212188a5 HB |
23 | #define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */ |
24 | #define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */ | |
e4b8b3f3 JG |
25 | #define CPU_MF_INT_RI_HALTED (1 << 5) /* run-time instr. halted */ |
26 | #define CPU_MF_INT_RI_BUF_FULL (1 << 4) /* run-time instr. program | |
27 | buffer full */ | |
212188a5 HB |
28 | |
29 | #define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_CACA|CPU_MF_INT_CF_LCDA) | |
30 | #define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \ | |
31 | CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \ | |
32 | CPU_MF_INT_SF_LSDA) | |
e4b8b3f3 | 33 | #define CPU_MF_INT_RI_MASK (CPU_MF_INT_RI_HALTED|CPU_MF_INT_RI_BUF_FULL) |
212188a5 HB |
34 | |
35 | /* CPU measurement facility support */ | |
36 | static inline int cpum_cf_avail(void) | |
37 | { | |
23d18e8d | 38 | return MACHINE_HAS_LPP && test_facility(67); |
212188a5 HB |
39 | } |
40 | ||
41 | static inline int cpum_sf_avail(void) | |
42 | { | |
23d18e8d | 43 | return MACHINE_HAS_LPP && test_facility(68); |
212188a5 HB |
44 | } |
45 | ||
46 | ||
47 | struct cpumf_ctr_info { | |
48 | u16 cfvn; | |
49 | u16 auth_ctl; | |
50 | u16 enable_ctl; | |
51 | u16 act_ctl; | |
52 | u16 max_cpu; | |
53 | u16 csvn; | |
54 | u16 max_cg; | |
55 | u16 reserved1; | |
56 | u32 reserved2[12]; | |
57 | } __packed; | |
58 | ||
cf48ad83 HB |
59 | /* QUERY SAMPLING INFORMATION block */ |
60 | struct hws_qsi_info_block { /* Bit(s) */ | |
61 | unsigned int b0_13:14; /* 0-13: zeros */ | |
7e75fc3f HB |
62 | unsigned int as:1; /* 14: basic-sampling authorization */ |
63 | unsigned int ad:1; /* 15: diag-sampling authorization */ | |
64 | unsigned int b16_21:6; /* 16-21: zeros */ | |
65 | unsigned int es:1; /* 22: basic-sampling enable control */ | |
66 | unsigned int ed:1; /* 23: diag-sampling enable control */ | |
67 | unsigned int b24_29:6; /* 24-29: zeros */ | |
68 | unsigned int cs:1; /* 30: basic-sampling activation control */ | |
69 | unsigned int cd:1; /* 31: diag-sampling activation control */ | |
70 | unsigned int bsdes:16; /* 4-5: size of basic sampling entry */ | |
cf48ad83 HB |
71 | unsigned int dsdes:16; /* 6-7: size of diagnostic sampling entry */ |
72 | unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */ | |
73 | unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/ | |
74 | unsigned long tear; /* 24-31: TEAR contents */ | |
75 | unsigned long dear; /* 32-39: DEAR contents */ | |
76 | unsigned int rsvrd0; /* 40-43: reserved */ | |
77 | unsigned int cpu_speed; /* 44-47: CPU speed */ | |
78 | unsigned long long rsvrd1; /* 48-55: reserved */ | |
79 | unsigned long long rsvrd2; /* 56-63: reserved */ | |
80 | } __packed; | |
81 | ||
82 | /* SET SAMPLING CONTROLS request block */ | |
83 | struct hws_lsctl_request_block { | |
84 | unsigned int s:1; /* 0: maximum buffer indicator */ | |
85 | unsigned int h:1; /* 1: part. level reserved for VM use*/ | |
86 | unsigned long long b2_53:52;/* 2-53: zeros */ | |
7e75fc3f HB |
87 | unsigned int es:1; /* 54: basic-sampling enable control */ |
88 | unsigned int ed:1; /* 55: diag-sampling enable control */ | |
89 | unsigned int b56_61:6; /* 56-61: - zeros */ | |
90 | unsigned int cs:1; /* 62: basic-sampling activation control */ | |
91 | unsigned int cd:1; /* 63: diag-sampling activation control */ | |
cf48ad83 HB |
92 | unsigned long interval; /* 8-15: sampling interval */ |
93 | unsigned long tear; /* 16-23: TEAR contents */ | |
94 | unsigned long dear; /* 24-31: DEAR contents */ | |
95 | /* 32-63: */ | |
96 | unsigned long rsvrd1; /* reserved */ | |
97 | unsigned long rsvrd2; /* reserved */ | |
98 | unsigned long rsvrd3; /* reserved */ | |
99 | unsigned long rsvrd4; /* reserved */ | |
100 | } __packed; | |
101 | ||
7e75fc3f | 102 | struct hws_basic_entry { |
cf48ad83 HB |
103 | unsigned int def:16; /* 0-15 Data Entry Format */ |
104 | unsigned int R:4; /* 16-19 reserved */ | |
105 | unsigned int U:4; /* 20-23 Number of unique instruct. */ | |
106 | unsigned int z:2; /* zeros */ | |
107 | unsigned int T:1; /* 26 PSW DAT mode */ | |
108 | unsigned int W:1; /* 27 PSW wait state */ | |
109 | unsigned int P:1; /* 28 PSW Problem state */ | |
110 | unsigned int AS:2; /* 29-30 PSW address-space control */ | |
111 | unsigned int I:1; /* 31 entry valid or invalid */ | |
112 | unsigned int:16; | |
113 | unsigned int prim_asn:16; /* primary ASN */ | |
114 | unsigned long long ia; /* Instruction Address */ | |
115 | unsigned long long gpp; /* Guest Program Parameter */ | |
116 | unsigned long long hpp; /* Host Program Parameter */ | |
117 | } __packed; | |
118 | ||
7e75fc3f HB |
119 | struct hws_diag_entry { |
120 | unsigned int def:16; /* 0-15 Data Entry Format */ | |
121 | unsigned int R:14; /* 16-19 and 20-30 reserved */ | |
122 | unsigned int I:1; /* 31 entry valid or invalid */ | |
123 | u8 data[]; /* Machine-dependent sample data */ | |
124 | } __packed; | |
125 | ||
126 | struct hws_combined_entry { | |
127 | struct hws_basic_entry basic; /* Basic-sampling data entry */ | |
128 | struct hws_diag_entry diag; /* Diagnostic-sampling data entry */ | |
129 | } __packed; | |
130 | ||
cf48ad83 | 131 | struct hws_trailer_entry { |
fcc77f50 HB |
132 | union { |
133 | struct { | |
134 | unsigned int f:1; /* 0 - Block Full Indicator */ | |
135 | unsigned int a:1; /* 1 - Alert request control */ | |
136 | unsigned int t:1; /* 2 - Timestamp format */ | |
137 | unsigned long long:61; /* 3 - 63: Reserved */ | |
138 | }; | |
139 | unsigned long long flags; /* 0 - 63: All indicators */ | |
140 | }; | |
cf48ad83 | 141 | unsigned long long overflow; /* 64 - sample Overflow count */ |
443d4beb | 142 | unsigned char timestamp[16]; /* 16 - 31 timestamp */ |
cf48ad83 HB |
143 | unsigned long long reserved1; /* 32 -Reserved */ |
144 | unsigned long long reserved2; /* */ | |
145 | unsigned long long progusage1; /* 48 - reserved for programming use */ | |
146 | unsigned long long progusage2; /* */ | |
147 | } __packed; | |
148 | ||
212188a5 HB |
149 | /* Query counter information */ |
150 | static inline int qctri(struct cpumf_ctr_info *info) | |
151 | { | |
152 | int rc = -EINVAL; | |
153 | ||
154 | asm volatile ( | |
155 | "0: .insn s,0xb28e0000,%1\n" | |
156 | "1: lhi %0,0\n" | |
157 | "2:\n" | |
158 | EX_TABLE(1b, 2b) | |
159 | : "+d" (rc), "=Q" (*info)); | |
160 | return rc; | |
161 | } | |
162 | ||
163 | /* Load CPU-counter-set controls */ | |
164 | static inline int lcctl(u64 ctl) | |
165 | { | |
166 | int cc; | |
167 | ||
168 | asm volatile ( | |
169 | " .insn s,0xb2840000,%1\n" | |
170 | " ipm %0\n" | |
171 | " srl %0,28\n" | |
172 | : "=d" (cc) : "m" (ctl) : "cc"); | |
173 | return cc; | |
174 | } | |
175 | ||
176 | /* Extract CPU counter */ | |
177 | static inline int ecctr(u64 ctr, u64 *val) | |
178 | { | |
179 | register u64 content asm("4") = 0; | |
180 | int cc; | |
181 | ||
182 | asm volatile ( | |
183 | " .insn rre,0xb2e40000,%0,%2\n" | |
184 | " ipm %1\n" | |
185 | " srl %1,28\n" | |
186 | : "=d" (content), "=d" (cc) : "d" (ctr) : "cc"); | |
187 | if (!cc) | |
188 | *val = content; | |
189 | return cc; | |
190 | } | |
b03d541a | 191 | |
10ad34bc MS |
192 | /* Store CPU counter multiple for the MT utilization counter set */ |
193 | static inline int stcctm5(u64 num, u64 *val) | |
194 | { | |
195 | typedef struct { u64 _[num]; } addrtype; | |
196 | int cc; | |
197 | ||
198 | asm volatile ( | |
199 | " .insn rsy,0xeb0000000017,%2,5,%1\n" | |
200 | " ipm %0\n" | |
201 | " srl %0,28\n" | |
202 | : "=d" (cc), "=Q" (*(addrtype *) val) : "d" (num) : "cc"); | |
203 | return cc; | |
204 | } | |
205 | ||
cf48ad83 HB |
206 | /* Query sampling information */ |
207 | static inline int qsi(struct hws_qsi_info_block *info) | |
208 | { | |
209 | int cc; | |
210 | cc = 1; | |
211 | ||
212 | asm volatile( | |
213 | "0: .insn s,0xb2860000,0(%1)\n" | |
214 | "1: lhi %0,0\n" | |
215 | "2:\n" | |
216 | EX_TABLE(0b, 2b) EX_TABLE(1b, 2b) | |
217 | : "=d" (cc), "+a" (info) | |
218 | : "m" (*info) | |
219 | : "cc", "memory"); | |
220 | ||
221 | return cc ? -EINVAL : 0; | |
222 | } | |
223 | ||
224 | /* Load sampling controls */ | |
225 | static inline int lsctl(struct hws_lsctl_request_block *req) | |
226 | { | |
227 | int cc; | |
228 | ||
229 | cc = 1; | |
230 | asm volatile( | |
231 | "0: .insn s,0xb2870000,0(%1)\n" | |
232 | "1: ipm %0\n" | |
233 | " srl %0,28\n" | |
234 | "2:\n" | |
235 | EX_TABLE(0b, 2b) EX_TABLE(1b, 2b) | |
236 | : "+d" (cc), "+a" (req) | |
237 | : "m" (*req) | |
238 | : "cc", "memory"); | |
239 | ||
240 | return cc ? -EINVAL : 0; | |
241 | } | |
242 | ||
243 | /* Sampling control helper functions */ | |
244 | ||
8c069ff4 HB |
245 | #include <linux/time.h> |
246 | ||
247 | static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi, | |
248 | unsigned long freq) | |
249 | { | |
250 | return (USEC_PER_SEC / freq) * qsi->cpu_speed; | |
251 | } | |
252 | ||
253 | static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi, | |
254 | unsigned long rate) | |
255 | { | |
256 | return USEC_PER_SEC * qsi->cpu_speed / rate; | |
257 | } | |
258 | ||
cf48ad83 HB |
259 | #define SDB_TE_ALERT_REQ_MASK 0x4000000000000000UL |
260 | #define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL | |
261 | ||
443d4beb HB |
262 | /* Return TOD timestamp contained in an trailer entry */ |
263 | static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te) | |
264 | { | |
265 | /* TOD in STCKE format */ | |
266 | if (te->t) | |
267 | return *((unsigned long long *) &te->timestamp[1]); | |
268 | ||
269 | /* TOD in STCK format */ | |
270 | return *((unsigned long long *) &te->timestamp[0]); | |
271 | } | |
272 | ||
cf48ad83 HB |
273 | /* Return pointer to trailer entry of an sample data block */ |
274 | static inline unsigned long *trailer_entry_ptr(unsigned long v) | |
275 | { | |
276 | void *ret; | |
277 | ||
278 | ret = (void *) v; | |
279 | ret += PAGE_SIZE; | |
280 | ret -= sizeof(struct hws_trailer_entry); | |
281 | ||
282 | return (unsigned long *) ret; | |
283 | } | |
284 | ||
285 | /* Return if the entry in the sample data block table (sdbt) | |
286 | * is a link to the next sdbt */ | |
287 | static inline int is_link_entry(unsigned long *s) | |
288 | { | |
289 | return *s & 0x1ul ? 1 : 0; | |
290 | } | |
291 | ||
292 | /* Return pointer to the linked sdbt */ | |
293 | static inline unsigned long *get_next_sdbt(unsigned long *s) | |
294 | { | |
295 | return (unsigned long *) (*s & ~0x1ul); | |
296 | } | |
212188a5 | 297 | #endif /* _ASM_S390_CPU_MF_H */ |