[deliverable/linux.git] / arch / s390 / include / asm / cpu_mf.h

/*
 * CPU-measurement facilities
 *
 *  Copyright IBM Corp. 2012
 *  Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
 *	       Jan Glauber <jang@linux.vnet.ibm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License (version 2 only)
 * as published by the Free Software Foundation.
 */
#ifndef _ASM_S390_CPU_MF_H
#define _ASM_S390_CPU_MF_H

#include <linux/errno.h>
#include <asm/facility.h>

#define CPU_MF_INT_SF_IAE	(1 << 31)	/* invalid entry address */
#define CPU_MF_INT_SF_ISE	(1 << 30)	/* incorrect SDBT entry */
#define CPU_MF_INT_SF_PRA	(1 << 29)	/* program request alert */
#define CPU_MF_INT_SF_SACA	(1 << 23)	/* sampler auth. change alert */
#define CPU_MF_INT_SF_LSDA	(1 << 22)	/* loss of sample data alert */
#define CPU_MF_INT_CF_CACA	(1 <<  7)	/* counter auth. change alert */
#define CPU_MF_INT_CF_LCDA	(1 <<  6)	/* loss of counter data alert */
#define CPU_MF_INT_RI_HALTED	(1 <<  5)	/* run-time instr. halted */
#define CPU_MF_INT_RI_BUF_FULL	(1 <<  4)	/* run-time instr. program
						   buffer full */

#define CPU_MF_INT_CF_MASK	(CPU_MF_INT_CF_CACA|CPU_MF_INT_CF_LCDA)
#define CPU_MF_INT_SF_MASK	(CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE|	\
				 CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA|	\
				 CPU_MF_INT_SF_LSDA)
#define CPU_MF_INT_RI_MASK	(CPU_MF_INT_RI_HALTED|CPU_MF_INT_RI_BUF_FULL)

/* CPU measurement facility support */
static inline int cpum_cf_avail(void)
{
	return MACHINE_HAS_LPP && test_facility(67);
}

static inline int cpum_sf_avail(void)
{
	return MACHINE_HAS_LPP && test_facility(68);
}


struct cpumf_ctr_info {
	u16   cfvn;
	u16   auth_ctl;
	u16   enable_ctl;
	u16   act_ctl;
	u16   max_cpu;
	u16   csvn;
	u16   max_cg;
	u16   reserved1;
	u32   reserved2[12];
} __packed;

/* QUERY SAMPLING INFORMATION block */
struct hws_qsi_info_block {	    /* Bit(s) */
	unsigned int b0_13:14;	    /* 0-13: zeros			 */
	unsigned int as:1;	    /* 14: sampling authorisation control*/
	unsigned int b15_21:7;	    /* 15-21: zeros			 */
	unsigned int es:1;	    /* 22: sampling enable control	 */
	unsigned int b23_29:7;	    /* 23-29: zeros			 */
	unsigned int cs:1;	    /* 30: sampling activation control	 */
	unsigned int:1; 	    /* 31: reserved			 */
	unsigned int bsdes:16;	    /* 4-5: size of basic sampling entry      */
	unsigned int dsdes:16;	    /* 6-7: size of diagnostic sampling entry */
	unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
	unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
	unsigned long tear;	    /* 24-31: TEAR contents		 */
	unsigned long dear;	    /* 32-39: DEAR contents		 */
	unsigned int rsvrd0;	    /* 40-43: reserved			 */
	unsigned int cpu_speed;     /* 44-47: CPU speed 		 */
	unsigned long long rsvrd1;  /* 48-55: reserved			 */
	unsigned long long rsvrd2;  /* 56-63: reserved			 */
} __packed;

/* SET SAMPLING CONTROLS request block */
struct hws_lsctl_request_block {
	unsigned int s:1;	    /* 0: maximum buffer indicator	 */
	unsigned int h:1;	    /* 1: part. level reserved for VM use*/
	unsigned long long b2_53:52;/* 2-53: zeros			 */
	unsigned int es:1;	    /* 54: sampling enable control	 */
	unsigned int b55_61:7;	    /* 55-61: - zeros			 */
	unsigned int cs:1;	    /* 62: sampling activation control	 */
	unsigned int b63:1;	    /* 63: zero 			 */
	unsigned long interval;     /* 8-15: sampling interval		 */
	unsigned long tear;	    /* 16-23: TEAR contents		 */
	unsigned long dear;	    /* 24-31: DEAR contents		 */
	/* 32-63:							 */
	unsigned long rsvrd1;	    /* reserved 			 */
	unsigned long rsvrd2;	    /* reserved 			 */
	unsigned long rsvrd3;	    /* reserved 			 */
	unsigned long rsvrd4;	    /* reserved 			 */
} __packed;


struct hws_data_entry {
	unsigned int def:16;	    /* 0-15  Data Entry Format		 */
	unsigned int R:4;	    /* 16-19 reserved			 */
	unsigned int U:4;	    /* 20-23 Number of unique instruct.  */
	unsigned int z:2;	    /* zeros				 */
	unsigned int T:1;	    /* 26 PSW DAT mode			 */
	unsigned int W:1;	    /* 27 PSW wait state		 */
	unsigned int P:1;	    /* 28 PSW Problem state		 */
	unsigned int AS:2;	    /* 29-30 PSW address-space control	 */
	unsigned int I:1;	    /* 31 entry valid or invalid	 */
	unsigned int:16;
	unsigned int prim_asn:16;   /* primary ASN			 */
	unsigned long long ia;	    /* Instruction Address		 */
	unsigned long long gpp;     /* Guest Program Parameter		 */
	unsigned long long hpp;     /* Host Program Parameter		 */
} __packed;

struct hws_trailer_entry {
	unsigned int f:1;	    /* 0 - Block Full Indicator 	 */
	unsigned int a:1;	    /* 1 - Alert request control	 */
	unsigned int t:1;	    /* 2 - Timestamp format		 */
	unsigned long long:61;	    /* 3 - 63: Reserved 		 */
	unsigned long long overflow;	 /* 64 - sample Overflow count	      */
	unsigned long long timestamp;	 /* 16 - time-stamp		      */
	unsigned long long timestamp1;	 /*				      */
	unsigned long long reserved1;	 /* 32 -Reserved		      */
	unsigned long long reserved2;	 /*				      */
	unsigned long long progusage1;	 /* 48 - reserved for programming use */
	unsigned long long progusage2;	 /*				      */
} __packed;

/* Query counter information */
static inline int qctri(struct cpumf_ctr_info *info)
{
	int rc = -EINVAL;

	asm volatile (
		"0:	.insn	s,0xb28e0000,%1\n"
		"1:	lhi	%0,0\n"
		"2:\n"
		EX_TABLE(1b, 2b)
		: "+d" (rc), "=Q" (*info));
	return rc;
}

/* Load CPU-counter-set controls */
static inline int lcctl(u64 ctl)
{
	int cc;

	asm volatile (
		"	.insn	s,0xb2840000,%1\n"
		"	ipm	%0\n"
		"	srl	%0,28\n"
		: "=d" (cc) : "m" (ctl) : "cc");
	return cc;
}

/* Extract CPU counter */
static inline int ecctr(u64 ctr, u64 *val)
{
	register u64 content asm("4") = 0;
	int cc;

	asm volatile (
		"	.insn	rre,0xb2e40000,%0,%2\n"
		"	ipm	%1\n"
		"	srl	%1,28\n"
		: "=d" (content), "=d" (cc) : "d" (ctr) : "cc");
	if (!cc)
		*val = content;
	return cc;
}

/* Query sampling information */
static inline int qsi(struct hws_qsi_info_block *info)
{
	int cc;
	cc = 1;

	asm volatile(
		"0:	.insn	s,0xb2860000,0(%1)\n"
		"1:	lhi	%0,0\n"
		"2:\n"
		EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
		: "=d" (cc), "+a" (info)
		: "m" (*info)
		: "cc", "memory");

	return cc ? -EINVAL : 0;
}

/* Load sampling controls */
static inline int lsctl(struct hws_lsctl_request_block *req)
{
	int cc;

	cc = 1;
	asm volatile(
		"0:	.insn	s,0xb2870000,0(%1)\n"
		"1:	ipm	%0\n"
		"	srl	%0,28\n"
		"2:\n"
		EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
		: "+d" (cc), "+a" (req)
		: "m" (*req)
		: "cc", "memory");

	return cc ? -EINVAL : 0;
}

/* Sampling control helper functions */

#define SDB_TE_ALERT_REQ_MASK	0x4000000000000000UL
#define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL

/* Return pointer to trailer entry of an sample data block */
static inline unsigned long *trailer_entry_ptr(unsigned long v)
{
	void *ret;

	ret = (void *) v;
	ret += PAGE_SIZE;
	ret -= sizeof(struct hws_trailer_entry);

	return (unsigned long *) ret;
}

/* Return if the entry in the sample data block table (sdbt)
 * is a link to the next sdbt */
static inline int is_link_entry(unsigned long *s)
{
	return *s & 0x1ul ? 1 : 0;
}

/* Return pointer to the linked sdbt */
static inline unsigned long *get_next_sdbt(unsigned long *s)
{
	return (unsigned long *) (*s & ~0x1ul);
}
#endif /* _ASM_S390_CPU_MF_H */
Commit	Line	Data
212188a5 HB	1	/*
	2	* CPU-measurement facilities
	3	*
	4	* Copyright IBM Corp. 2012
	5	* Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
	6	* Jan Glauber <jang@linux.vnet.ibm.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License (version 2 only)
	10	* as published by the Free Software Foundation.
	11	*/
b03d541a JG	12	#ifndef _ASM_S390_CPU_MF_H
	13	#define _ASM_S390_CPU_MF_H
	14
cb16b91a	15	#include <linux/errno.h>
1e3cab2f HC	16	#include <asm/facility.h>
1e3cab2f HC	17
b03d541a JG	18	#define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */
	19	#define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */
	20	#define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */
	21	#define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */
	22	#define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */
212188a5 HB	23	#define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */
212188a5 HB	24	#define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */
e4b8b3f3 JG	25	#define CPU_MF_INT_RI_HALTED (1 << 5) /* run-time instr. halted */
	26	#define CPU_MF_INT_RI_BUF_FULL (1 << 4) /* run-time instr. program
	27	buffer full */
212188a5 HB	28
	29	#define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_CACA\|CPU_MF_INT_CF_LCDA)
	30	#define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE\|CPU_MF_INT_SF_ISE\| \
	31	CPU_MF_INT_SF_PRA\|CPU_MF_INT_SF_SACA\| \
	32	CPU_MF_INT_SF_LSDA)
e4b8b3f3	33	#define CPU_MF_INT_RI_MASK (CPU_MF_INT_RI_HALTED\|CPU_MF_INT_RI_BUF_FULL)
212188a5 HB	34
	35	/* CPU measurement facility support */
	36	static inline int cpum_cf_avail(void)
	37	{
23d18e8d	38	return MACHINE_HAS_LPP && test_facility(67);
212188a5 HB	39	}
	40
	41	static inline int cpum_sf_avail(void)
	42	{
23d18e8d	43	return MACHINE_HAS_LPP && test_facility(68);
212188a5 HB	44	}
	45
	46
	47	struct cpumf_ctr_info {
	48	u16 cfvn;
	49	u16 auth_ctl;
	50	u16 enable_ctl;
	51	u16 act_ctl;
	52	u16 max_cpu;
	53	u16 csvn;
	54	u16 max_cg;
	55	u16 reserved1;
	56	u32 reserved2[12];
	57	} __packed;
	58
cf48ad83 HB	59	/* QUERY SAMPLING INFORMATION block */
	60	struct hws_qsi_info_block { /* Bit(s) */
	61	unsigned int b0_13:14; /* 0-13: zeros */
	62	unsigned int as:1; /* 14: sampling authorisation control*/
	63	unsigned int b15_21:7; /* 15-21: zeros */
	64	unsigned int es:1; /* 22: sampling enable control */
	65	unsigned int b23_29:7; /* 23-29: zeros */
	66	unsigned int cs:1; /* 30: sampling activation control */
	67	unsigned int:1; /* 31: reserved */
	68	unsigned int bsdes:16; /* 4-5: size of basic sampling entry */
	69	unsigned int dsdes:16; /* 6-7: size of diagnostic sampling entry */
	70	unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
	71	unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
	72	unsigned long tear; /* 24-31: TEAR contents */
	73	unsigned long dear; /* 32-39: DEAR contents */
	74	unsigned int rsvrd0; /* 40-43: reserved */
	75	unsigned int cpu_speed; /* 44-47: CPU speed */
	76	unsigned long long rsvrd1; /* 48-55: reserved */
	77	unsigned long long rsvrd2; /* 56-63: reserved */
	78	} __packed;
	79
	80	/* SET SAMPLING CONTROLS request block */
	81	struct hws_lsctl_request_block {
	82	unsigned int s:1; /* 0: maximum buffer indicator */
	83	unsigned int h:1; /* 1: part. level reserved for VM use*/
	84	unsigned long long b2_53:52;/* 2-53: zeros */
	85	unsigned int es:1; /* 54: sampling enable control */
	86	unsigned int b55_61:7; /* 55-61: - zeros */
	87	unsigned int cs:1; /* 62: sampling activation control */
	88	unsigned int b63:1; /* 63: zero */
	89	unsigned long interval; /* 8-15: sampling interval */
	90	unsigned long tear; /* 16-23: TEAR contents */
	91	unsigned long dear; /* 24-31: DEAR contents */
	92	/* 32-63: */
	93	unsigned long rsvrd1; /* reserved */
	94	unsigned long rsvrd2; /* reserved */
	95	unsigned long rsvrd3; /* reserved */
	96	unsigned long rsvrd4; /* reserved */
	97	} __packed;
	98
	99
	100	struct hws_data_entry {
	101	unsigned int def:16; /* 0-15 Data Entry Format */
	102	unsigned int R:4; /* 16-19 reserved */
	103	unsigned int U:4; /* 20-23 Number of unique instruct. */
	104	unsigned int z:2; /* zeros */
	105	unsigned int T:1; /* 26 PSW DAT mode */
	106	unsigned int W:1; /* 27 PSW wait state */
	107	unsigned int P:1; /* 28 PSW Problem state */
	108	unsigned int AS:2; /* 29-30 PSW address-space control */
	109	unsigned int I:1; /* 31 entry valid or invalid */
	110	unsigned int:16;
	111	unsigned int prim_asn:16; /* primary ASN */
	112	unsigned long long ia; /* Instruction Address */
	113	unsigned long long gpp; /* Guest Program Parameter */
	114	unsigned long long hpp; /* Host Program Parameter */
	115	} __packed;
	116
	117	struct hws_trailer_entry {
	118	unsigned int f:1; /* 0 - Block Full Indicator */
	119	unsigned int a:1; /* 1 - Alert request control */
	120	unsigned int t:1; /* 2 - Timestamp format */
	121	unsigned long long:61; /* 3 - 63: Reserved */
	122	unsigned long long overflow; /* 64 - sample Overflow count */
123	unsigned long long timestamp; /* 16 - time-stamp */
124	unsigned long long timestamp1; /* */
125	unsigned long long reserved1; /* 32 -Reserved */
126	unsigned long long reserved2; /* */
127	unsigned long long progusage1; /* 48 - reserved for programming use */
128	unsigned long long progusage2; /* */
129	} __packed;
130
212188a5 HB	131	/* Query counter information */
	132	static inline int qctri(struct cpumf_ctr_info *info)
	133	{
	134	int rc = -EINVAL;
	135
	136	asm volatile (
	137	"0: .insn s,0xb28e0000,%1\n"
	138	"1: lhi %0,0\n"
	139	"2:\n"
	140	EX_TABLE(1b, 2b)
	141	: "+d" (rc), "=Q" (*info));
	142	return rc;
	143	}
	144
	145	/* Load CPU-counter-set controls */
	146	static inline int lcctl(u64 ctl)
	147	{
	148	int cc;
	149
	150	asm volatile (
	151	" .insn s,0xb2840000,%1\n"
	152	" ipm %0\n"
	153	" srl %0,28\n"
	154	: "=d" (cc) : "m" (ctl) : "cc");
	155	return cc;
	156	}
	157
	158	/* Extract CPU counter */
	159	static inline int ecctr(u64 ctr, u64 *val)
	160	{
	161	register u64 content asm("4") = 0;
	162	int cc;
	163
	164	asm volatile (
	165	" .insn rre,0xb2e40000,%0,%2\n"
	166	" ipm %1\n"
	167	" srl %1,28\n"
	168	: "=d" (content), "=d" (cc) : "d" (ctr) : "cc");
	169	if (!cc)
	170	*val = content;
	171	return cc;
	172	}
b03d541a	173
cf48ad83 HB	174	/* Query sampling information */
	175	static inline int qsi(struct hws_qsi_info_block *info)
	176	{
	177	int cc;
	178	cc = 1;
	179
	180	asm volatile(
	181	"0: .insn s,0xb2860000,0(%1)\n"
	182	"1: lhi %0,0\n"
	183	"2:\n"
	184	EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
	185	: "=d" (cc), "+a" (info)
	186	: "m" (*info)
	187	: "cc", "memory");
	188
	189	return cc ? -EINVAL : 0;
	190	}
	191
	192	/* Load sampling controls */
	193	static inline int lsctl(struct hws_lsctl_request_block *req)
	194	{
	195	int cc;
	196
	197	cc = 1;
	198	asm volatile(
	199	"0: .insn s,0xb2870000,0(%1)\n"
	200	"1: ipm %0\n"
	201	" srl %0,28\n"
	202	"2:\n"
	203	EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
	204	: "+d" (cc), "+a" (req)
	205	: "m" (*req)
	206	: "cc", "memory");
	207
	208	return cc ? -EINVAL : 0;
	209	}
	210
	211	/* Sampling control helper functions */
	212
	213	#define SDB_TE_ALERT_REQ_MASK 0x4000000000000000UL
	214	#define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL
	215
	216	/* Return pointer to trailer entry of an sample data block */
	217	static inline unsigned long *trailer_entry_ptr(unsigned long v)
	218	{
	219	void *ret;
	220
	221	ret = (void *) v;
	222	ret += PAGE_SIZE;
	223	ret -= sizeof(struct hws_trailer_entry);
	224
	225	return (unsigned long *) ret;
	226	}
	227
	228	/* Return if the entry in the sample data block table (sdbt)
	229	* is a link to the next sdbt */
	230	static inline int is_link_entry(unsigned long *s)
	231	{
	232	return *s & 0x1ul ? 1 : 0;
	233	}
	234
	235	/* Return pointer to the linked sdbt */
	236	static inline unsigned long get_next_sdbt(unsigned long s)
	237	{
238	return (unsigned long ) (s & ~0x1ul);
239	}
212188a5	240	#endif /* _ASM_S390_CPU_MF_H */