Commit | Line | Data |
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46b05d26 MH |
1 | /* |
2 | * s390 (re)ipl support | |
3 | * | |
4 | * Copyright IBM Corp. 2007 | |
5 | */ | |
6 | ||
7 | #ifndef _ASM_S390_IPL_H | |
8 | #define _ASM_S390_IPL_H | |
9 | ||
10 | #include <asm/types.h> | |
411ed322 MH |
11 | #include <asm/cio.h> |
12 | #include <asm/setup.h> | |
46b05d26 MH |
13 | |
14 | #define IPL_PARMBLOCK_ORIGIN 0x2000 | |
15 | ||
16 | #define IPL_PARM_BLK_FCP_LEN (sizeof(struct ipl_list_hdr) + \ | |
17 | sizeof(struct ipl_block_fcp)) | |
18 | ||
fbb04f38 MH |
19 | #define IPL_PARM_BLK0_FCP_LEN (sizeof(struct ipl_block_fcp) + 8) |
20 | ||
46b05d26 MH |
21 | #define IPL_PARM_BLK_CCW_LEN (sizeof(struct ipl_list_hdr) + \ |
22 | sizeof(struct ipl_block_ccw)) | |
23 | ||
fbb04f38 MH |
24 | #define IPL_PARM_BLK0_CCW_LEN (sizeof(struct ipl_block_ccw) + 8) |
25 | ||
46b05d26 MH |
26 | #define IPL_MAX_SUPPORTED_VERSION (0) |
27 | ||
28 | #define IPL_PARMBLOCK_START ((struct ipl_parameter_block *) \ | |
29 | IPL_PARMBLOCK_ORIGIN) | |
30 | #define IPL_PARMBLOCK_SIZE (IPL_PARMBLOCK_START->hdr.len) | |
31 | ||
32 | struct ipl_list_hdr { | |
33 | u32 len; | |
34 | u8 reserved1[3]; | |
35 | u8 version; | |
36 | u32 blk0_len; | |
37 | u8 pbt; | |
38 | u8 flags; | |
39 | u16 reserved2; | |
40 | } __attribute__((packed)); | |
41 | ||
42 | struct ipl_block_fcp { | |
43 | u8 reserved1[313-1]; | |
44 | u8 opt; | |
45 | u8 reserved2[3]; | |
46 | u16 reserved3; | |
47 | u16 devno; | |
48 | u8 reserved4[4]; | |
49 | u64 wwpn; | |
50 | u64 lun; | |
51 | u32 bootprog; | |
52 | u8 reserved5[12]; | |
53 | u64 br_lba; | |
54 | u32 scp_data_len; | |
55 | u8 reserved6[260]; | |
56 | u8 scp_data[]; | |
57 | } __attribute__((packed)); | |
58 | ||
a0443fbb | 59 | #define DIAG308_VMPARM_SIZE 64 |
684d2fd4 HB |
60 | #define DIAG308_SCPDATA_SIZE (PAGE_SIZE - (sizeof(struct ipl_list_hdr) + \ |
61 | offsetof(struct ipl_block_fcp, scp_data))) | |
a0443fbb | 62 | |
46b05d26 | 63 | struct ipl_block_ccw { |
a0443fbb | 64 | u8 load_parm[8]; |
46b05d26 MH |
65 | u8 reserved1[84]; |
66 | u8 reserved2[2]; | |
67 | u16 devno; | |
68 | u8 vm_flags; | |
69 | u8 reserved3[3]; | |
70 | u32 vm_parm_len; | |
a0443fbb HB |
71 | u8 nss_name[8]; |
72 | u8 vm_parm[DIAG308_VMPARM_SIZE]; | |
73 | u8 reserved4[8]; | |
46b05d26 MH |
74 | } __attribute__((packed)); |
75 | ||
76 | struct ipl_parameter_block { | |
77 | struct ipl_list_hdr hdr; | |
78 | union { | |
79 | struct ipl_block_fcp fcp; | |
80 | struct ipl_block_ccw ccw; | |
81 | } ipl_info; | |
a0443fbb | 82 | } __attribute__((packed,aligned(4096))); |
46b05d26 MH |
83 | |
84 | /* | |
6fc321fd | 85 | * IPL validity flags |
46b05d26 MH |
86 | */ |
87 | extern u32 ipl_flags; | |
c5dd8586 | 88 | extern u32 dump_prefix_page; |
763968e2 | 89 | extern unsigned int zfcpdump_prefix_array[]; |
411ed322 | 90 | |
46b05d26 | 91 | extern void do_reipl(void); |
99ca4e58 MH |
92 | extern void do_halt(void); |
93 | extern void do_poff(void); | |
46b05d26 | 94 | extern void ipl_save_parameters(void); |
a0443fbb | 95 | extern void ipl_update_parameters(void); |
684d2fd4 HB |
96 | extern size_t append_ipl_vmparm(char *, size_t); |
97 | extern size_t append_ipl_scpdata(char *, size_t); | |
46b05d26 MH |
98 | |
99 | enum { | |
100 | IPL_DEVNO_VALID = 1, | |
101 | IPL_PARMBLOCK_VALID = 2, | |
102 | IPL_NSS_VALID = 4, | |
103 | }; | |
104 | ||
411ed322 MH |
105 | enum ipl_type { |
106 | IPL_TYPE_UNKNOWN = 1, | |
107 | IPL_TYPE_CCW = 2, | |
108 | IPL_TYPE_FCP = 4, | |
109 | IPL_TYPE_FCP_DUMP = 8, | |
110 | IPL_TYPE_NSS = 16, | |
111 | }; | |
112 | ||
113 | struct ipl_info | |
114 | { | |
115 | enum ipl_type type; | |
116 | union { | |
117 | struct { | |
118 | struct ccw_dev_id dev_id; | |
119 | } ccw; | |
120 | struct { | |
121 | struct ccw_dev_id dev_id; | |
122 | u64 wwpn; | |
123 | u64 lun; | |
124 | } fcp; | |
125 | struct { | |
126 | char name[NSS_NAME_SIZE + 1]; | |
127 | } nss; | |
128 | } data; | |
129 | }; | |
130 | ||
131 | extern struct ipl_info ipl_info; | |
99ca4e58 | 132 | extern void setup_ipl(void); |
411ed322 | 133 | |
46b05d26 MH |
134 | /* |
135 | * DIAG 308 support | |
136 | */ | |
137 | enum diag308_subcode { | |
138 | DIAG308_REL_HSA = 2, | |
139 | DIAG308_IPL = 3, | |
140 | DIAG308_DUMP = 4, | |
141 | DIAG308_SET = 5, | |
142 | DIAG308_STORE = 6, | |
143 | }; | |
144 | ||
145 | enum diag308_ipl_type { | |
146 | DIAG308_IPL_TYPE_FCP = 0, | |
147 | DIAG308_IPL_TYPE_CCW = 2, | |
148 | }; | |
149 | ||
150 | enum diag308_opt { | |
151 | DIAG308_IPL_OPT_IPL = 0x10, | |
152 | DIAG308_IPL_OPT_DUMP = 0x20, | |
153 | }; | |
154 | ||
48657d22 MH |
155 | enum diag308_flags { |
156 | DIAG308_FLAGS_LP_VALID = 0x80, | |
157 | }; | |
158 | ||
a0443fbb HB |
159 | enum diag308_vm_flags { |
160 | DIAG308_VM_FLAGS_NSS_VALID = 0x80, | |
161 | DIAG308_VM_FLAGS_VP_VALID = 0x40, | |
162 | }; | |
163 | ||
46b05d26 | 164 | enum diag308_rc { |
3a95e8eb MH |
165 | DIAG308_RC_OK = 0x0001, |
166 | DIAG308_RC_NOCONFIG = 0x0102, | |
46b05d26 MH |
167 | }; |
168 | ||
169 | extern int diag308(unsigned long subcode, void *addr); | |
9dc7356e | 170 | extern void diag308_reset(void); |
60a0c68d | 171 | extern void store_status(void); |
3ab121ab | 172 | extern void lgr_info_log(void); |
46b05d26 MH |
173 | |
174 | #endif /* _ASM_S390_IPL_H */ |