Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _ASM_IRQ_H |
2 | #define _ASM_IRQ_H | |
3 | ||
afaa7d29 SO |
4 | #define EXT_INTERRUPT 0 |
5 | #define IO_INTERRUPT 1 | |
6 | #define THIN_INTERRUPT 2 | |
1f44a225 | 7 | |
afaa7d29 | 8 | #define NR_IRQS_BASE 3 |
1f44a225 MS |
9 | |
10 | #ifdef CONFIG_PCI_NR_MSI | |
11 | # define NR_IRQS (NR_IRQS_BASE + CONFIG_PCI_NR_MSI) | |
12 | #else | |
13 | # define NR_IRQS NR_IRQS_BASE | |
14 | #endif | |
15 | ||
072c2790 TH |
16 | /* External interruption codes */ |
17 | #define EXT_IRQ_INTERRUPT_KEY 0x0040 | |
18 | #define EXT_IRQ_CLK_COMP 0x1004 | |
19 | #define EXT_IRQ_CPU_TIMER 0x1005 | |
20 | #define EXT_IRQ_WARNING_TRACK 0x1007 | |
21 | #define EXT_IRQ_MALFUNC_ALERT 0x1200 | |
22 | #define EXT_IRQ_EMERGENCY_SIG 0x1201 | |
23 | #define EXT_IRQ_EXTERNAL_CALL 0x1202 | |
24 | #define EXT_IRQ_TIMING_ALERT 0x1406 | |
25 | #define EXT_IRQ_MEASURE_ALERT 0x1407 | |
26 | #define EXT_IRQ_SERVICE_SIG 0x2401 | |
1dad093b | 27 | #define EXT_IRQ_CP_SERVICE 0x2603 |
072c2790 TH |
28 | #define EXT_IRQ_IUCV 0x4000 |
29 | ||
1f44a225 MS |
30 | #ifndef __ASSEMBLY__ |
31 | ||
1da177e4 | 32 | #include <linux/hardirq.h> |
420f42ec HC |
33 | #include <linux/percpu.h> |
34 | #include <linux/cache.h> | |
d7b250e2 | 35 | #include <linux/types.h> |
1da177e4 | 36 | |
420f42ec HC |
37 | enum interruption_class { |
38 | IRQEXT_CLK, | |
39 | IRQEXT_EXC, | |
40 | IRQEXT_EMS, | |
41 | IRQEXT_TMR, | |
42 | IRQEXT_TLA, | |
43 | IRQEXT_PFL, | |
44 | IRQEXT_DSD, | |
45 | IRQEXT_VRT, | |
46 | IRQEXT_SCP, | |
47 | IRQEXT_IUC, | |
48 | IRQEXT_CMS, | |
49 | IRQEXT_CMC, | |
8f933b10 | 50 | IRQEXT_FTP, |
420f42ec HC |
51 | IRQIO_CIO, |
52 | IRQIO_QAI, | |
53 | IRQIO_DAS, | |
54 | IRQIO_C15, | |
55 | IRQIO_C70, | |
56 | IRQIO_TAP, | |
57 | IRQIO_VMR, | |
58 | IRQIO_LCS, | |
420f42ec HC |
59 | IRQIO_CTC, |
60 | IRQIO_APB, | |
61 | IRQIO_ADM, | |
62 | IRQIO_CSC, | |
63 | IRQIO_PCI, | |
64 | IRQIO_MSI, | |
89f88337 | 65 | IRQIO_VIR, |
96b14536 | 66 | IRQIO_VAI, |
052ff461 | 67 | NMI_NMI, |
93f3b2ee | 68 | CPU_RST, |
420f42ec | 69 | NR_ARCH_IRQS |
1da177e4 LT |
70 | }; |
71 | ||
420f42ec HC |
72 | struct irq_stat { |
73 | unsigned int irqs[NR_ARCH_IRQS]; | |
74 | }; | |
75 | ||
76 | DECLARE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat); | |
77 | ||
78 | static __always_inline void inc_irq_stat(enum interruption_class irq) | |
79 | { | |
eb7e7d76 | 80 | __this_cpu_inc(irq_stat.irqs[irq]); |
420f42ec HC |
81 | } |
82 | ||
fde15c3a HC |
83 | struct ext_code { |
84 | unsigned short subcode; | |
85 | unsigned short code; | |
86 | }; | |
87 | ||
88 | typedef void (*ext_int_handler_t)(struct ext_code, unsigned int, unsigned long); | |
d7b250e2 | 89 | |
1dad093b TH |
90 | int register_external_irq(u16 code, ext_int_handler_t handler); |
91 | int unregister_external_irq(u16 code, ext_int_handler_t handler); | |
82003c3e HC |
92 | |
93 | enum irq_subclass { | |
94 | IRQ_SUBCLASS_MEASUREMENT_ALERT = 5, | |
95 | IRQ_SUBCLASS_SERVICE_SIGNAL = 9, | |
96 | }; | |
97 | ||
db7e007f HC |
98 | #define CR0_IRQ_SUBCLASS_MASK \ |
99 | ((1UL << (63 - 30)) /* Warning Track */ | \ | |
100 | (1UL << (63 - 48)) /* Malfunction Alert */ | \ | |
101 | (1UL << (63 - 49)) /* Emergency Signal */ | \ | |
102 | (1UL << (63 - 50)) /* External Call */ | \ | |
103 | (1UL << (63 - 52)) /* Clock Comparator */ | \ | |
104 | (1UL << (63 - 53)) /* CPU Timer */ | \ | |
105 | (1UL << (63 - 54)) /* Service Signal */ | \ | |
106 | (1UL << (63 - 57)) /* Interrupt Key */ | \ | |
107 | (1UL << (63 - 58)) /* Measurement Alert */ | \ | |
108 | (1UL << (63 - 59)) /* Timing Alert */ | \ | |
109 | (1UL << (63 - 62))) /* IUCV */ | |
110 | ||
82003c3e HC |
111 | void irq_subclass_register(enum irq_subclass subclass); |
112 | void irq_subclass_unregister(enum irq_subclass subclass); | |
d7b250e2 | 113 | |
1f44a225 MS |
114 | #define irq_canonicalize(irq) (irq) |
115 | ||
116 | #endif /* __ASSEMBLY__ */ | |
9a4da8a5 | 117 | |
052ff461 | 118 | #endif /* _ASM_IRQ_H */ |