Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * include/asm-s390/lowcore.h | |
3 | * | |
4 | * S390 version | |
5 | * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
6 | * Author(s): Hartmut Penner (hp@de.ibm.com), | |
7 | * Martin Schwidefsky (schwidefsky@de.ibm.com), | |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) | |
9 | */ | |
10 | ||
11 | #ifndef _ASM_S390_LOWCORE_H | |
12 | #define _ASM_S390_LOWCORE_H | |
13 | ||
866ba284 MS |
14 | #define __LC_IPL_PARMBLOCK_PTR 0x0014 |
15 | #define __LC_EXT_PARAMS 0x0080 | |
16 | #define __LC_CPU_ADDRESS 0x0084 | |
17 | #define __LC_EXT_INT_CODE 0x0086 | |
1da177e4 | 18 | |
866ba284 MS |
19 | #define __LC_SVC_ILC 0x0088 |
20 | #define __LC_SVC_INT_CODE 0x008a | |
21 | #define __LC_PGM_ILC 0x008c | |
22 | #define __LC_PGM_INT_CODE 0x008e | |
1da177e4 | 23 | |
866ba284 MS |
24 | #define __LC_PER_ATMID 0x0096 |
25 | #define __LC_PER_ADDRESS 0x0098 | |
26 | #define __LC_PER_ACCESS_ID 0x00a1 | |
27 | #define __LC_AR_MODE_ID 0x00a3 | |
1da177e4 | 28 | |
866ba284 MS |
29 | #define __LC_SUBCHANNEL_ID 0x00b8 |
30 | #define __LC_SUBCHANNEL_NR 0x00ba | |
31 | #define __LC_IO_INT_PARM 0x00bc | |
32 | #define __LC_IO_INT_WORD 0x00c0 | |
33 | #define __LC_MCCK_CODE 0x00e8 | |
9e74a6b8 | 34 | |
866ba284 | 35 | #define __LC_DUMP_REIPL 0x0e00 |
1da177e4 LT |
36 | |
37 | #ifndef __s390x__ | |
866ba284 MS |
38 | #define __LC_EXT_OLD_PSW 0x0018 |
39 | #define __LC_SVC_OLD_PSW 0x0020 | |
40 | #define __LC_PGM_OLD_PSW 0x0028 | |
41 | #define __LC_MCK_OLD_PSW 0x0030 | |
42 | #define __LC_IO_OLD_PSW 0x0038 | |
43 | #define __LC_EXT_NEW_PSW 0x0058 | |
44 | #define __LC_SVC_NEW_PSW 0x0060 | |
45 | #define __LC_PGM_NEW_PSW 0x0068 | |
46 | #define __LC_MCK_NEW_PSW 0x0070 | |
47 | #define __LC_IO_NEW_PSW 0x0078 | |
48 | #define __LC_SAVE_AREA 0x0200 | |
49 | #define __LC_RETURN_PSW 0x0240 | |
50 | #define __LC_RETURN_MCCK_PSW 0x0248 | |
51 | #define __LC_SYNC_ENTER_TIMER 0x0250 | |
52 | #define __LC_ASYNC_ENTER_TIMER 0x0258 | |
53 | #define __LC_EXIT_TIMER 0x0260 | |
54 | #define __LC_USER_TIMER 0x0268 | |
55 | #define __LC_SYSTEM_TIMER 0x0270 | |
56 | #define __LC_STEAL_TIMER 0x0278 | |
57 | #define __LC_LAST_UPDATE_TIMER 0x0280 | |
58 | #define __LC_LAST_UPDATE_CLOCK 0x0288 | |
59 | #define __LC_CURRENT 0x0290 | |
60 | #define __LC_THREAD_INFO 0x0294 | |
61 | #define __LC_KERNEL_STACK 0x0298 | |
62 | #define __LC_ASYNC_STACK 0x029c | |
63 | #define __LC_PANIC_STACK 0x02a0 | |
64 | #define __LC_KERNEL_ASCE 0x02a4 | |
65 | #define __LC_USER_ASCE 0x02a8 | |
66 | #define __LC_USER_EXEC_ASCE 0x02ac | |
67 | #define __LC_CPUID 0x02b0 | |
68 | #define __LC_INT_CLOCK 0x02c8 | |
25097bf1 | 69 | #define __LC_MACHINE_FLAGS 0x02d8 |
866ba284 MS |
70 | #define __LC_IRB 0x0300 |
71 | #define __LC_PFAULT_INTPARM 0x0080 | |
72 | #define __LC_CPU_TIMER_SAVE_AREA 0x00d8 | |
73 | #define __LC_CLOCK_COMP_SAVE_AREA 0x00e0 | |
74 | #define __LC_PSW_SAVE_AREA 0x0100 | |
75 | #define __LC_PREFIX_SAVE_AREA 0x0108 | |
76 | #define __LC_AREGS_SAVE_AREA 0x0120 | |
77 | #define __LC_FPREGS_SAVE_AREA 0x0160 | |
78 | #define __LC_GPREGS_SAVE_AREA 0x0180 | |
79 | #define __LC_CREGS_SAVE_AREA 0x01c0 | |
1da177e4 | 80 | #else /* __s390x__ */ |
866ba284 MS |
81 | #define __LC_LAST_BREAK 0x0110 |
82 | #define __LC_EXT_OLD_PSW 0x0130 | |
83 | #define __LC_SVC_OLD_PSW 0x0140 | |
84 | #define __LC_PGM_OLD_PSW 0x0150 | |
85 | #define __LC_MCK_OLD_PSW 0x0160 | |
86 | #define __LC_IO_OLD_PSW 0x0170 | |
87 | #define __LC_EXT_NEW_PSW 0x01b0 | |
88 | #define __LC_SVC_NEW_PSW 0x01c0 | |
89 | #define __LC_PGM_NEW_PSW 0x01d0 | |
90 | #define __LC_MCK_NEW_PSW 0x01e0 | |
91 | #define __LC_IO_NEW_PSW 0x01f0 | |
92 | #define __LC_SAVE_AREA 0x0200 | |
93 | #define __LC_RETURN_PSW 0x0280 | |
94 | #define __LC_RETURN_MCCK_PSW 0x0290 | |
95 | #define __LC_SYNC_ENTER_TIMER 0x02a0 | |
96 | #define __LC_ASYNC_ENTER_TIMER 0x02a8 | |
97 | #define __LC_EXIT_TIMER 0x02b0 | |
98 | #define __LC_USER_TIMER 0x02b8 | |
99 | #define __LC_SYSTEM_TIMER 0x02c0 | |
100 | #define __LC_STEAL_TIMER 0x02c8 | |
101 | #define __LC_LAST_UPDATE_TIMER 0x02d0 | |
102 | #define __LC_LAST_UPDATE_CLOCK 0x02d8 | |
103 | #define __LC_CURRENT 0x02e0 | |
104 | #define __LC_THREAD_INFO 0x02e8 | |
105 | #define __LC_KERNEL_STACK 0x02f0 | |
106 | #define __LC_ASYNC_STACK 0x02f8 | |
107 | #define __LC_PANIC_STACK 0x0300 | |
108 | #define __LC_KERNEL_ASCE 0x0308 | |
109 | #define __LC_USER_ASCE 0x0310 | |
110 | #define __LC_USER_EXEC_ASCE 0x0318 | |
111 | #define __LC_CPUID 0x0320 | |
112 | #define __LC_INT_CLOCK 0x0340 | |
113 | #define __LC_VDSO_PER_CPU 0x0350 | |
25097bf1 | 114 | #define __LC_MACHINE_FLAGS 0x0358 |
866ba284 MS |
115 | #define __LC_IRB 0x0380 |
116 | #define __LC_PASTE 0x03c0 | |
117 | #define __LC_PFAULT_INTPARM 0x11b8 | |
ff6b8ea6 | 118 | #define __LC_FPREGS_SAVE_AREA 0x1200 |
866ba284 | 119 | #define __LC_GPREGS_SAVE_AREA 0x1280 |
ff6b8ea6 MH |
120 | #define __LC_PSW_SAVE_AREA 0x1300 |
121 | #define __LC_PREFIX_SAVE_AREA 0x1318 | |
866ba284 | 122 | #define __LC_FP_CREG_SAVE_AREA 0x131c |
ff6b8ea6 | 123 | #define __LC_TODREG_SAVE_AREA 0x1324 |
866ba284 | 124 | #define __LC_CPU_TIMER_SAVE_AREA 0x1328 |
ff6b8ea6 | 125 | #define __LC_CLOCK_COMP_SAVE_AREA 0x1331 |
866ba284 MS |
126 | #define __LC_AREGS_SAVE_AREA 0x1340 |
127 | #define __LC_CREGS_SAVE_AREA 0x1380 | |
1da177e4 LT |
128 | #endif /* __s390x__ */ |
129 | ||
130 | #ifndef __ASSEMBLY__ | |
131 | ||
25097bf1 CE |
132 | #include <asm/cpuid.h> |
133 | #include <asm/ptrace.h> | |
1da177e4 | 134 | #include <linux/types.h> |
1da177e4 LT |
135 | |
136 | void restart_int_handler(void); | |
137 | void ext_int_handler(void); | |
138 | void system_call(void); | |
139 | void pgm_check_handler(void); | |
140 | void mcck_int_handler(void); | |
141 | void io_int_handler(void); | |
142 | ||
411ed322 MH |
143 | struct save_area_s390 { |
144 | u32 ext_save; | |
145 | u64 timer; | |
146 | u64 clk_cmp; | |
147 | u8 pad1[24]; | |
148 | u8 psw[8]; | |
149 | u32 pref_reg; | |
150 | u8 pad2[20]; | |
151 | u32 acc_regs[16]; | |
152 | u64 fp_regs[4]; | |
153 | u32 gp_regs[16]; | |
154 | u32 ctrl_regs[16]; | |
155 | } __attribute__((packed)); | |
156 | ||
157 | struct save_area_s390x { | |
158 | u64 fp_regs[16]; | |
159 | u64 gp_regs[16]; | |
160 | u8 psw[16]; | |
161 | u8 pad1[8]; | |
162 | u32 pref_reg; | |
163 | u32 fp_ctrl_reg; | |
164 | u8 pad2[4]; | |
165 | u32 tod_reg; | |
166 | u64 timer; | |
167 | u64 clk_cmp; | |
168 | u8 pad3[8]; | |
169 | u32 acc_regs[16]; | |
170 | u64 ctrl_regs[16]; | |
171 | } __attribute__((packed)); | |
172 | ||
173 | union save_area { | |
174 | struct save_area_s390 s390; | |
175 | struct save_area_s390x s390x; | |
176 | }; | |
177 | ||
178 | #define SAVE_AREA_BASE_S390 0xd4 | |
179 | #define SAVE_AREA_BASE_S390X 0x1200 | |
180 | ||
181 | #ifndef __s390x__ | |
182 | #define SAVE_AREA_SIZE sizeof(struct save_area_s390) | |
183 | #define SAVE_AREA_BASE SAVE_AREA_BASE_S390 | |
184 | #else | |
185 | #define SAVE_AREA_SIZE sizeof(struct save_area_s390x) | |
186 | #define SAVE_AREA_BASE SAVE_AREA_BASE_S390X | |
187 | #endif | |
188 | ||
1da177e4 LT |
189 | struct _lowcore |
190 | { | |
191 | #ifndef __s390x__ | |
866ba284 MS |
192 | /* 0x0000 - 0x01ff: defined by architecture */ |
193 | psw_t restart_psw; /* 0x0000 */ | |
194 | __u32 ccw2[4]; /* 0x0008 */ | |
195 | psw_t external_old_psw; /* 0x0018 */ | |
196 | psw_t svc_old_psw; /* 0x0020 */ | |
197 | psw_t program_old_psw; /* 0x0028 */ | |
198 | psw_t mcck_old_psw; /* 0x0030 */ | |
199 | psw_t io_old_psw; /* 0x0038 */ | |
200 | __u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */ | |
201 | psw_t external_new_psw; /* 0x0058 */ | |
202 | psw_t svc_new_psw; /* 0x0060 */ | |
203 | psw_t program_new_psw; /* 0x0068 */ | |
204 | psw_t mcck_new_psw; /* 0x0070 */ | |
205 | psw_t io_new_psw; /* 0x0078 */ | |
206 | __u32 ext_params; /* 0x0080 */ | |
207 | __u16 cpu_addr; /* 0x0084 */ | |
208 | __u16 ext_int_code; /* 0x0086 */ | |
209 | __u16 svc_ilc; /* 0x0088 */ | |
210 | __u16 svc_code; /* 0x008a */ | |
211 | __u16 pgm_ilc; /* 0x008c */ | |
212 | __u16 pgm_code; /* 0x008e */ | |
213 | __u32 trans_exc_code; /* 0x0090 */ | |
214 | __u16 mon_class_num; /* 0x0094 */ | |
215 | __u16 per_perc_atmid; /* 0x0096 */ | |
216 | __u32 per_address; /* 0x0098 */ | |
217 | __u32 monitor_code; /* 0x009c */ | |
218 | __u8 exc_access_id; /* 0x00a0 */ | |
219 | __u8 per_access_id; /* 0x00a1 */ | |
220 | __u8 pad_0x00a2[0x00b8-0x00a2]; /* 0x00a2 */ | |
221 | __u16 subchannel_id; /* 0x00b8 */ | |
222 | __u16 subchannel_nr; /* 0x00ba */ | |
223 | __u32 io_int_parm; /* 0x00bc */ | |
224 | __u32 io_int_word; /* 0x00c0 */ | |
225 | __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ | |
226 | __u32 stfl_fac_list; /* 0x00c8 */ | |
227 | __u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */ | |
228 | __u32 extended_save_area_addr; /* 0x00d4 */ | |
229 | __u32 cpu_timer_save_area[2]; /* 0x00d8 */ | |
230 | __u32 clock_comp_save_area[2]; /* 0x00e0 */ | |
231 | __u32 mcck_interruption_code[2]; /* 0x00e8 */ | |
232 | __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ | |
233 | __u32 external_damage_code; /* 0x00f4 */ | |
234 | __u32 failing_storage_address; /* 0x00f8 */ | |
235 | __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */ | |
236 | __u32 st_status_fixed_logout[4]; /* 0x0100 */ | |
237 | __u8 pad_0x0110[0x0120-0x0110]; /* 0x0110 */ | |
238 | ||
239 | /* CPU register save area: defined by architecture */ | |
240 | __u32 access_regs_save_area[16]; /* 0x0120 */ | |
241 | __u32 floating_pt_save_area[8]; /* 0x0160 */ | |
242 | __u32 gpregs_save_area[16]; /* 0x0180 */ | |
243 | __u32 cregs_save_area[16]; /* 0x01c0 */ | |
244 | ||
245 | /* Return psws. */ | |
246 | __u32 save_area[16]; /* 0x0200 */ | |
247 | psw_t return_psw; /* 0x0240 */ | |
248 | psw_t return_mcck_psw; /* 0x0248 */ | |
249 | ||
250 | /* CPU time accounting values */ | |
251 | __u64 sync_enter_timer; /* 0x0250 */ | |
252 | __u64 async_enter_timer; /* 0x0258 */ | |
253 | __u64 exit_timer; /* 0x0260 */ | |
254 | __u64 user_timer; /* 0x0268 */ | |
255 | __u64 system_timer; /* 0x0270 */ | |
256 | __u64 steal_timer; /* 0x0278 */ | |
257 | __u64 last_update_timer; /* 0x0280 */ | |
258 | __u64 last_update_clock; /* 0x0288 */ | |
259 | ||
260 | /* Current process. */ | |
261 | __u32 current_task; /* 0x0290 */ | |
262 | __u32 thread_info; /* 0x0294 */ | |
263 | __u32 kernel_stack; /* 0x0298 */ | |
264 | ||
265 | /* Interrupt and panic stack. */ | |
266 | __u32 async_stack; /* 0x029c */ | |
267 | __u32 panic_stack; /* 0x02a0 */ | |
268 | ||
269 | /* Address space pointer. */ | |
270 | __u32 kernel_asce; /* 0x02a4 */ | |
271 | __u32 user_asce; /* 0x02a8 */ | |
272 | __u32 user_exec_asce; /* 0x02ac */ | |
273 | ||
274 | /* SMP info area */ | |
275 | cpuid_t cpu_id; /* 0x02b0 */ | |
276 | __u32 cpu_nr; /* 0x02b8 */ | |
277 | __u32 softirq_pending; /* 0x02bc */ | |
278 | __u32 percpu_offset; /* 0x02c0 */ | |
279 | __u32 ext_call_fast; /* 0x02c4 */ | |
280 | __u64 int_clock; /* 0x02c8 */ | |
281 | __u64 clock_comparator; /* 0x02d0 */ | |
25097bf1 CE |
282 | __u32 machine_flags; /* 0x02d8 */ |
283 | __u8 pad_0x02dc[0x0300-0x02dc]; /* 0x02dc */ | |
866ba284 MS |
284 | |
285 | /* Interrupt response block */ | |
286 | __u8 irb[64]; /* 0x0300 */ | |
287 | ||
288 | __u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */ | |
289 | ||
290 | /* | |
291 | * 0xe00 contains the address of the IPL Parameter Information | |
292 | * block. Dump tools need IPIB for IPL after dump. | |
293 | * Note: do not change the position of any fields in 0x0e00-0x0f00 | |
294 | */ | |
295 | __u32 ipib; /* 0x0e00 */ | |
296 | __u32 ipib_checksum; /* 0x0e04 */ | |
297 | ||
298 | /* Align to the top 1k of prefix area */ | |
299 | __u8 pad_0x0e08[0x1000-0x0e08]; /* 0x0e08 */ | |
1da177e4 | 300 | #else /* !__s390x__ */ |
866ba284 MS |
301 | /* 0x0000 - 0x01ff: defined by architecture */ |
302 | __u32 ccw1[2]; /* 0x0000 */ | |
303 | __u32 ccw2[4]; /* 0x0008 */ | |
304 | __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ | |
305 | __u32 ext_params; /* 0x0080 */ | |
306 | __u16 cpu_addr; /* 0x0084 */ | |
307 | __u16 ext_int_code; /* 0x0086 */ | |
308 | __u16 svc_ilc; /* 0x0088 */ | |
309 | __u16 svc_code; /* 0x008a */ | |
310 | __u16 pgm_ilc; /* 0x008c */ | |
311 | __u16 pgm_code; /* 0x008e */ | |
312 | __u32 data_exc_code; /* 0x0090 */ | |
313 | __u16 mon_class_num; /* 0x0094 */ | |
314 | __u16 per_perc_atmid; /* 0x0096 */ | |
315 | addr_t per_address; /* 0x0098 */ | |
316 | __u8 exc_access_id; /* 0x00a0 */ | |
317 | __u8 per_access_id; /* 0x00a1 */ | |
318 | __u8 op_access_id; /* 0x00a2 */ | |
319 | __u8 ar_access_id; /* 0x00a3 */ | |
320 | __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */ | |
321 | addr_t trans_exc_code; /* 0x00a8 */ | |
322 | addr_t monitor_code; /* 0x00b0 */ | |
323 | __u16 subchannel_id; /* 0x00b8 */ | |
324 | __u16 subchannel_nr; /* 0x00ba */ | |
325 | __u32 io_int_parm; /* 0x00bc */ | |
326 | __u32 io_int_word; /* 0x00c0 */ | |
327 | __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ | |
328 | __u32 stfl_fac_list; /* 0x00c8 */ | |
329 | __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */ | |
330 | __u32 mcck_interruption_code[2]; /* 0x00e8 */ | |
331 | __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ | |
332 | __u32 external_damage_code; /* 0x00f4 */ | |
333 | addr_t failing_storage_address; /* 0x00f8 */ | |
334 | __u8 pad_0x0100[0x0120-0x0100]; /* 0x0100 */ | |
335 | psw_t restart_old_psw; /* 0x0120 */ | |
336 | psw_t external_old_psw; /* 0x0130 */ | |
337 | psw_t svc_old_psw; /* 0x0140 */ | |
338 | psw_t program_old_psw; /* 0x0150 */ | |
339 | psw_t mcck_old_psw; /* 0x0160 */ | |
340 | psw_t io_old_psw; /* 0x0170 */ | |
341 | __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */ | |
342 | psw_t restart_psw; /* 0x01a0 */ | |
343 | psw_t external_new_psw; /* 0x01b0 */ | |
344 | psw_t svc_new_psw; /* 0x01c0 */ | |
345 | psw_t program_new_psw; /* 0x01d0 */ | |
346 | psw_t mcck_new_psw; /* 0x01e0 */ | |
347 | psw_t io_new_psw; /* 0x01f0 */ | |
348 | ||
349 | /* Entry/exit save area & return psws. */ | |
350 | __u64 save_area[16]; /* 0x0200 */ | |
351 | psw_t return_psw; /* 0x0280 */ | |
352 | psw_t return_mcck_psw; /* 0x0290 */ | |
353 | ||
354 | /* CPU accounting and timing values. */ | |
355 | __u64 sync_enter_timer; /* 0x02a0 */ | |
356 | __u64 async_enter_timer; /* 0x02a8 */ | |
357 | __u64 exit_timer; /* 0x02b0 */ | |
358 | __u64 user_timer; /* 0x02b8 */ | |
359 | __u64 system_timer; /* 0x02c0 */ | |
360 | __u64 steal_timer; /* 0x02c8 */ | |
361 | __u64 last_update_timer; /* 0x02d0 */ | |
362 | __u64 last_update_clock; /* 0x02d8 */ | |
363 | ||
364 | /* Current process. */ | |
365 | __u64 current_task; /* 0x02e0 */ | |
366 | __u64 thread_info; /* 0x02e8 */ | |
367 | __u64 kernel_stack; /* 0x02f0 */ | |
368 | ||
369 | /* Interrupt and panic stack. */ | |
370 | __u64 async_stack; /* 0x02f8 */ | |
371 | __u64 panic_stack; /* 0x0300 */ | |
372 | ||
373 | /* Address space pointer. */ | |
374 | __u64 kernel_asce; /* 0x0308 */ | |
375 | __u64 user_asce; /* 0x0310 */ | |
376 | __u64 user_exec_asce; /* 0x0318 */ | |
377 | ||
378 | /* SMP info area */ | |
379 | cpuid_t cpu_id; /* 0x0320 */ | |
380 | __u32 cpu_nr; /* 0x0328 */ | |
381 | __u32 softirq_pending; /* 0x032c */ | |
382 | __u64 percpu_offset; /* 0x0330 */ | |
383 | __u64 ext_call_fast; /* 0x0338 */ | |
384 | __u64 int_clock; /* 0x0340 */ | |
385 | __u64 clock_comparator; /* 0x0348 */ | |
386 | __u64 vdso_per_cpu_data; /* 0x0350 */ | |
25097bf1 CE |
387 | __u64 machine_flags; /* 0x0358 */ |
388 | __u8 pad_0x0360[0x0380-0x0360]; /* 0x0360 */ | |
866ba284 MS |
389 | |
390 | /* Interrupt response block. */ | |
391 | __u8 irb[64]; /* 0x0380 */ | |
1da177e4 | 392 | |
c742b31c | 393 | /* Per cpu primary space access list */ |
866ba284 MS |
394 | __u32 paste[16]; /* 0x03c0 */ |
395 | ||
396 | __u8 pad_0x0400[0x0e00-0x0400]; /* 0x0400 */ | |
397 | ||
398 | /* | |
399 | * 0xe00 contains the address of the IPL Parameter Information | |
400 | * block. Dump tools need IPIB for IPL after dump. | |
401 | * Note: do not change the position of any fields in 0x0e00-0x0f00 | |
402 | */ | |
403 | __u64 ipib; /* 0x0e00 */ | |
404 | __u32 ipib_checksum; /* 0x0e08 */ | |
405 | __u8 pad_0x0e0c[0x11b8-0x0e0c]; /* 0x0e0c */ | |
406 | ||
407 | /* 64 bit extparam used for pfault/diag 250: defined by architecture */ | |
408 | __u64 ext_params2; /* 0x11B8 */ | |
409 | __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */ | |
410 | ||
411 | /* CPU register save area: defined by architecture */ | |
412 | __u64 floating_pt_save_area[16]; /* 0x1200 */ | |
413 | __u64 gpregs_save_area[16]; /* 0x1280 */ | |
414 | __u32 st_status_fixed_logout[4]; /* 0x1300 */ | |
415 | __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */ | |
416 | __u32 prefixreg_save_area; /* 0x1318 */ | |
417 | __u32 fpt_creg_save_area; /* 0x131c */ | |
418 | __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */ | |
419 | __u32 tod_progreg_save_area; /* 0x1324 */ | |
420 | __u32 cpu_timer_save_area[2]; /* 0x1328 */ | |
421 | __u32 clock_comp_save_area[2]; /* 0x1330 */ | |
422 | __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */ | |
423 | __u32 access_regs_save_area[16]; /* 0x1340 */ | |
424 | __u64 cregs_save_area[16]; /* 0x1380 */ | |
1da177e4 LT |
425 | |
426 | /* align to the top of the prefix area */ | |
866ba284 | 427 | __u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */ |
1da177e4 LT |
428 | #endif /* !__s390x__ */ |
429 | } __attribute__((packed)); /* End structure*/ | |
430 | ||
431 | #define S390_lowcore (*((struct _lowcore *) 0)) | |
432 | extern struct _lowcore *lowcore_ptr[]; | |
433 | ||
4448aaf0 | 434 | static inline void set_prefix(__u32 address) |
1da177e4 | 435 | { |
94c12cc7 | 436 | asm volatile("spx %0" : : "m" (address) : "memory"); |
1da177e4 LT |
437 | } |
438 | ||
15e9b586 HC |
439 | static inline __u32 store_prefix(void) |
440 | { | |
441 | __u32 address; | |
442 | ||
443 | asm volatile("stpx %0" : "=m" (address)); | |
444 | return address; | |
445 | } | |
446 | ||
1da177e4 LT |
447 | #endif |
448 | ||
449 | #endif |