s390/pci: fix possible information leak in mmio syscall
[deliverable/linux.git] / arch / s390 / include / asm / page.h
CommitLineData
1da177e4 1/*
1da177e4 2 * S390 version
a53c8fab 3 * Copyright IBM Corp. 1999, 2000
1da177e4
LT
4 * Author(s): Hartmut Penner (hp@de.ibm.com)
5 */
6
7#ifndef _S390_PAGE_H
8#define _S390_PAGE_H
9
52480ee5 10#include <linux/const.h>
1da177e4
LT
11#include <asm/types.h>
12
13/* PAGE_SHIFT determines the page size */
14#define PAGE_SHIFT 12
52480ee5 15#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
1da177e4 16#define PAGE_MASK (~(PAGE_SIZE-1))
0b642ede
PO
17#define PAGE_DEFAULT_ACC 0
18#define PAGE_DEFAULT_KEY (PAGE_DEFAULT_ACC << 4)
1da177e4 19
53492b1d
GS
20#define HPAGE_SHIFT 20
21#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
22#define HPAGE_MASK (~(HPAGE_SIZE - 1))
23#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
24
25#define ARCH_HAS_SETCLEAR_HUGE_PTE
26#define ARCH_HAS_HUGE_PTE_TYPE
27#define ARCH_HAS_PREPARE_HUGEPAGE
28#define ARCH_HAS_HUGEPAGE_CLEAR_FLUSH
29
274f5946 30#include <asm/setup.h>
1da177e4
LT
31#ifndef __ASSEMBLY__
32
127c1fef
MS
33static inline void storage_key_init_range(unsigned long start, unsigned long end)
34{
35#if PAGE_DEFAULT_KEY
36 __storage_key_init_range(start, end);
37#endif
38}
6b70a920 39
1da177e4
LT
40static inline void clear_page(void *page)
41{
617e164c
CB
42 register unsigned long reg1 asm ("1") = 0;
43 register void *reg2 asm ("2") = page;
44 register unsigned long reg3 asm ("3") = 4096;
45 asm volatile(
46 " mvcl 2,0"
47 : "+d" (reg2), "+d" (reg3) : "d" (reg1)
48 : "memory", "cc");
1da177e4
LT
49}
50
dba6bb60
HC
51/*
52 * copy_page uses the mvcl instruction with 0xb0 padding byte in order to
53 * bypass caches when copying a page. Especially when copying huge pages
54 * this keeps L1 and L2 data caches alive.
55 */
1da177e4
LT
56static inline void copy_page(void *to, void *from)
57{
dba6bb60
HC
58 register void *reg2 asm ("2") = to;
59 register unsigned long reg3 asm ("3") = 0x1000;
60 register void *reg4 asm ("4") = from;
61 register unsigned long reg5 asm ("5") = 0xb0001000;
62 asm volatile(
63 " mvcl 2,4"
64 : "+d" (reg2), "+d" (reg3), "+d" (reg4), "+d" (reg5)
65 : : "memory", "cc");
1da177e4
LT
66}
67
1da177e4
LT
68#define clear_user_page(page, vaddr, pg) clear_page(page)
69#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
70
769848c0
MG
71#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
72 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
1da177e4
LT
73#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
74
1da177e4
LT
75/*
76 * These are used to make use of C type-checking..
77 */
78
79typedef struct { unsigned long pgprot; } pgprot_t;
b2fa47e6 80typedef struct { unsigned long pgste; } pgste_t;
1da177e4 81typedef struct { unsigned long pte; } pte_t;
1da177e4 82typedef struct { unsigned long pmd; } pmd_t;
190a1d72 83typedef struct { unsigned long pud; } pud_t;
1da177e4 84typedef struct { unsigned long pgd; } pgd_t;
146e4b3c 85typedef pte_t *pgtable_t;
1da177e4 86
146e4b3c 87#define pgprot_val(x) ((x).pgprot)
b2fa47e6 88#define pgste_val(x) ((x).pgste)
146e4b3c
MS
89#define pte_val(x) ((x).pte)
90#define pmd_val(x) ((x).pmd)
190a1d72 91#define pud_val(x) ((x).pud)
1da177e4
LT
92#define pgd_val(x) ((x).pgd)
93
b2fa47e6 94#define __pgste(x) ((pgste_t) { (x) } )
1da177e4
LT
95#define __pte(x) ((pte_t) { (x) } )
96#define __pmd(x) ((pmd_t) { (x) } )
b2fa47e6 97#define __pud(x) ((pud_t) { (x) } )
1da177e4
LT
98#define __pgd(x) ((pgd_t) { (x) } )
99#define __pgprot(x) ((pgprot_t) { (x) } )
100
2d42552d
MS
101static inline void page_set_storage_key(unsigned long addr,
102 unsigned char skey, int mapped)
1da177e4 103{
e2b8d7af
MS
104 if (!mapped)
105 asm volatile(".insn rrf,0xb22b0000,%0,%1,8,0"
106 : : "d" (skey), "a" (addr));
107 else
108 asm volatile("sske %0,%1" : : "d" (skey), "a" (addr));
1da177e4
LT
109}
110
2d42552d 111static inline unsigned char page_get_storage_key(unsigned long addr)
1da177e4 112{
2d42552d 113 unsigned char skey;
1da177e4 114
2d42552d 115 asm volatile("iske %0,%1" : "=d" (skey) : "a" (addr));
1da177e4
LT
116 return skey;
117}
118
2d42552d
MS
119static inline int page_reset_referenced(unsigned long addr)
120{
121 unsigned int ipm;
122
123 asm volatile(
124 " rrbe 0,%1\n"
125 " ipm %0\n"
126 : "=d" (ipm) : "a" (addr) : "cc");
127 return !!(ipm & 0x20000000);
128}
129
130/* Bits int the storage key */
131#define _PAGE_CHANGED 0x02 /* HW changed bit */
132#define _PAGE_REFERENCED 0x04 /* HW referenced bit */
133#define _PAGE_FP_BIT 0x08 /* HW fetch protection bit */
134#define _PAGE_ACC_BITS 0xf0 /* HW access control bits */
135
45e576b1
MS
136struct page;
137void arch_free_page(struct page *page, int order);
138void arch_alloc_page(struct page *page, int order);
638ad34a 139void arch_set_page_states(int make_stable);
45e576b1 140
ec6743bb
HB
141static inline int devmem_is_allowed(unsigned long pfn)
142{
143 return 0;
144}
145
45e576b1
MS
146#define HAVE_ARCH_FREE_PAGE
147#define HAVE_ARCH_ALLOC_PAGE
148
1da177e4
LT
149#endif /* !__ASSEMBLY__ */
150
1da177e4
LT
151#define __PAGE_OFFSET 0x0UL
152#define PAGE_OFFSET 0x0UL
153#define __pa(x) (unsigned long)(x)
154#define __va(x) (void *)(unsigned long)(x)
1da177e4 155#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
0b2b6e1d 156#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
1da177e4
LT
157#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
158
146e4b3c 159#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
1da177e4
LT
160 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
161
aed63043 162#include <asm-generic/memory_model.h>
5b17e1cd 163#include <asm-generic/getorder.h>
fd4fd5aa 164
1da177e4 165#endif /* _S390_PAGE_H */
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