[deliverable/linux.git] / arch / s390 / include / asm / pci.h

#ifndef __ASM_S390_PCI_H
#define __ASM_S390_PCI_H

/* must be set before including asm-generic/pci.h */
#define PCI_DMA_BUS_IS_PHYS (0)
/* must be set before including pci_clp.h */
#define PCI_BAR_COUNT	6

#include <asm-generic/pci.h>
#include <asm-generic/pci-dma-compat.h>
#include <asm/pci_clp.h>

#define PCIBIOS_MIN_IO		0x1000
#define PCIBIOS_MIN_MEM		0x10000000

#define pcibios_assign_all_busses()	(0)

void __iomem *pci_iomap(struct pci_dev *, int, unsigned long);
void pci_iounmap(struct pci_dev *, void __iomem *);
int pci_domain_nr(struct pci_bus *);
int pci_proc_domain(struct pci_bus *);

/* MSI arch hooks */
#define arch_setup_msi_irqs	arch_setup_msi_irqs
#define arch_teardown_msi_irqs	arch_teardown_msi_irqs

#define ZPCI_BUS_NR			0	/* default bus number */
#define ZPCI_DEVFN			0	/* default device number */

/* PCI Function Controls */
#define ZPCI_FC_FN_ENABLED		0x80
#define ZPCI_FC_ERROR			0x40
#define ZPCI_FC_BLOCKED			0x20
#define ZPCI_FC_DMA_ENABLED		0x10

struct msi_map {
	unsigned long irq;
	struct msi_desc *msi;
	struct hlist_node msi_chain;
};

#define ZPCI_NR_MSI_VECS	64
#define ZPCI_MSI_MASK		(ZPCI_NR_MSI_VECS - 1)

enum zpci_state {
	ZPCI_FN_STATE_RESERVED,
	ZPCI_FN_STATE_STANDBY,
	ZPCI_FN_STATE_CONFIGURED,
	ZPCI_FN_STATE_ONLINE,
	NR_ZPCI_FN_STATES,
};

struct zpci_bar_struct {
	u32		val;		/* bar start & 3 flag bits */
	u8		size;		/* order 2 exponent */
	u16		map_idx;	/* index into bar mapping array */
};

/* Private data per function */
struct zpci_dev {
	struct pci_dev	*pdev;
	struct pci_bus	*bus;
	struct list_head entry;		/* list of all zpci_devices, needed for hotplug, etc. */

	enum zpci_state state;
	u32		fid;		/* function ID, used by sclp */
	u32		fh;		/* function handle, used by insn's */
	u16		pchid;		/* physical channel ID */
	u8		pfgid;		/* function group ID */
	u16		domain;

	/* IRQ stuff */
	u64		msi_addr;	/* MSI address */
	struct zdev_irq_map *irq_map;
	struct msi_map *msi_map[ZPCI_NR_MSI_VECS];
	unsigned int	aisb;		/* number of the summary bit */

	struct zpci_bar_struct bars[PCI_BAR_COUNT];

	enum pci_bus_speed max_bus_speed;
};

static inline bool zdev_enabled(struct zpci_dev *zdev)
{
	return (zdev->fh & (1UL << 31)) ? true : false;
}

/* -----------------------------------------------------------------------------
  Prototypes
----------------------------------------------------------------------------- */
/* Base stuff */
struct zpci_dev *zpci_alloc_device(void);
int zpci_create_device(struct zpci_dev *);
int zpci_enable_device(struct zpci_dev *);
void zpci_stop_device(struct zpci_dev *);
void zpci_free_device(struct zpci_dev *);
int zpci_scan_device(struct zpci_dev *);

/* CLP */
int clp_find_pci_devices(void);
int clp_add_pci_device(u32, u32, int);
int clp_enable_fh(struct zpci_dev *, u8);
int clp_disable_fh(struct zpci_dev *);

/* MSI */
struct msi_desc *__irq_get_msi_desc(unsigned int);
int zpci_msi_set_mask_bits(struct msi_desc *, u32, u32);
int zpci_setup_msi_irq(struct zpci_dev *, struct msi_desc *, unsigned int, int);
void zpci_teardown_msi_irq(struct zpci_dev *, struct msi_desc *);
int zpci_msihash_init(void);
void zpci_msihash_exit(void);

/* Helpers */
struct zpci_dev *get_zdev(struct pci_dev *);
struct zpci_dev *get_zdev_by_fid(u32);
bool zpci_fid_present(u32);

#endif
Commit	Line	Data
1da177e4 LT	1	#ifndef __ASM_S390_PCI_H
	2	#define __ASM_S390_PCI_H
	3
cd248341	4	/* must be set before including asm-generic/pci.h */
1da177e4	5	#define PCI_DMA_BUS_IS_PHYS (0)
cd248341 JG	6	/* must be set before including pci_clp.h */
cd248341 JG	7	#define PCI_BAR_COUNT 6
1da177e4	8
cd248341 JG	9	#include <asm-generic/pci.h>
cd248341 JG	10	#include <asm-generic/pci-dma-compat.h>
a755a45d	11	#include <asm/pci_clp.h>
1da177e4	12
cd248341 JG	13	#define PCIBIOS_MIN_IO 0x1000
	14	#define PCIBIOS_MIN_MEM 0x10000000
	15
	16	#define pcibios_assign_all_busses() (0)
	17
	18	void __iomem pci_iomap(struct pci_dev , int, unsigned long);
	19	void pci_iounmap(struct pci_dev , void __iomem );
	20	int pci_domain_nr(struct pci_bus *);
	21	int pci_proc_domain(struct pci_bus *);
	22
9a4da8a5 JG	23	/* MSI arch hooks */
	24	#define arch_setup_msi_irqs arch_setup_msi_irqs
	25	#define arch_teardown_msi_irqs arch_teardown_msi_irqs
	26
cd248341 JG	27	#define ZPCI_BUS_NR 0 /* default bus number */
	28	#define ZPCI_DEVFN 0 /* default device number */
	29
	30	/* PCI Function Controls */
	31	#define ZPCI_FC_FN_ENABLED 0x80
	32	#define ZPCI_FC_ERROR 0x40
	33	#define ZPCI_FC_BLOCKED 0x20
	34	#define ZPCI_FC_DMA_ENABLED 0x10
	35
9a4da8a5 JG	36	struct msi_map {
	37	unsigned long irq;
	38	struct msi_desc *msi;
	39	struct hlist_node msi_chain;
	40	};
	41
	42	#define ZPCI_NR_MSI_VECS 64
	43	#define ZPCI_MSI_MASK (ZPCI_NR_MSI_VECS - 1)
	44
cd248341 JG	45	enum zpci_state {
	46	ZPCI_FN_STATE_RESERVED,
	47	ZPCI_FN_STATE_STANDBY,
	48	ZPCI_FN_STATE_CONFIGURED,
	49	ZPCI_FN_STATE_ONLINE,
	50	NR_ZPCI_FN_STATES,
	51	};
	52
	53	struct zpci_bar_struct {
	54	u32 val; /* bar start & 3 flag bits */
	55	u8 size; /* order 2 exponent */
	56	u16 map_idx; /* index into bar mapping array */
	57	};
	58
	59	/* Private data per function */
	60	struct zpci_dev {
	61	struct pci_dev *pdev;
	62	struct pci_bus *bus;
	63	struct list_head entry; /* list of all zpci_devices, needed for hotplug, etc. */
	64
	65	enum zpci_state state;
	66	u32 fid; /* function ID, used by sclp */
	67	u32 fh; /* function handle, used by insn's */
	68	u16 pchid; /* physical channel ID */
	69	u8 pfgid; /* function group ID */
	70	u16 domain;
	71
9a4da8a5 JG	72	/* IRQ stuff */
	73	u64 msi_addr; /* MSI address */
	74	struct zdev_irq_map *irq_map;
	75	struct msi_map *msi_map[ZPCI_NR_MSI_VECS];
	76	unsigned int aisb; /* number of the summary bit */
	77
cd248341 JG	78	struct zpci_bar_struct bars[PCI_BAR_COUNT];
	79
	80	enum pci_bus_speed max_bus_speed;
	81	};
	82
	83	static inline bool zdev_enabled(struct zpci_dev *zdev)
	84	{
	85	return (zdev->fh & (1UL << 31)) ? true : false;
	86	}
	87
	88	/* -----------------------------------------------------------------------------
	89	Prototypes
	90	----------------------------------------------------------------------------- */
	91	/* Base stuff */
	92	struct zpci_dev *zpci_alloc_device(void);
	93	int zpci_create_device(struct zpci_dev *);
	94	int zpci_enable_device(struct zpci_dev *);
	95	void zpci_stop_device(struct zpci_dev *);
	96	void zpci_free_device(struct zpci_dev *);
	97	int zpci_scan_device(struct zpci_dev *);
	98
a755a45d JG	99	/* CLP */
	100	int clp_find_pci_devices(void);
	101	int clp_add_pci_device(u32, u32, int);
	102	int clp_enable_fh(struct zpci_dev *, u8);
	103	int clp_disable_fh(struct zpci_dev *);
	104
9a4da8a5 JG	105	/* MSI */
	106	struct msi_desc *__irq_get_msi_desc(unsigned int);
	107	int zpci_msi_set_mask_bits(struct msi_desc *, u32, u32);
	108	int zpci_setup_msi_irq(struct zpci_dev , struct msi_desc , unsigned int, int);
	109	void zpci_teardown_msi_irq(struct zpci_dev , struct msi_desc );
	110	int zpci_msihash_init(void);
	111	void zpci_msihash_exit(void);
	112
cd248341 JG	113	/* Helpers */
	114	struct zpci_dev get_zdev(struct pci_dev );
	115	struct zpci_dev *get_zdev_by_fid(u32);
	116	bool zpci_fid_present(u32);
	117
	118	#endif