[deliverable/linux.git] / arch / s390 / include / asm / pci_dma.h

#ifndef _ASM_S390_PCI_DMA_H
#define _ASM_S390_PCI_DMA_H

/* I/O Translation Anchor (IOTA) */
enum zpci_ioat_dtype {
	ZPCI_IOTA_STO = 0,
	ZPCI_IOTA_RTTO = 1,
	ZPCI_IOTA_RSTO = 2,
	ZPCI_IOTA_RFTO = 3,
	ZPCI_IOTA_PFAA = 4,
	ZPCI_IOTA_IOPFAA = 5,
	ZPCI_IOTA_IOPTO = 7
};

#define ZPCI_IOTA_IOT_ENABLED		0x800UL
#define ZPCI_IOTA_DT_ST			(ZPCI_IOTA_STO	<< 2)
#define ZPCI_IOTA_DT_RT			(ZPCI_IOTA_RTTO << 2)
#define ZPCI_IOTA_DT_RS			(ZPCI_IOTA_RSTO << 2)
#define ZPCI_IOTA_DT_RF			(ZPCI_IOTA_RFTO << 2)
#define ZPCI_IOTA_DT_PF			(ZPCI_IOTA_PFAA << 2)
#define ZPCI_IOTA_FS_4K			0
#define ZPCI_IOTA_FS_1M			1
#define ZPCI_IOTA_FS_2G			2
#define ZPCI_KEY			(PAGE_DEFAULT_KEY << 5)

#define ZPCI_IOTA_STO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_ST)
#define ZPCI_IOTA_RTTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RT)
#define ZPCI_IOTA_RSTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RS)
#define ZPCI_IOTA_RFTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RF)
#define ZPCI_IOTA_RFAA_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_PF | ZPCI_IOTA_FS_2G)

/* I/O Region and segment tables */
#define ZPCI_INDEX_MASK			0x7ffUL

#define ZPCI_TABLE_TYPE_MASK		0xc
#define ZPCI_TABLE_TYPE_RFX		0xc
#define ZPCI_TABLE_TYPE_RSX		0x8
#define ZPCI_TABLE_TYPE_RTX		0x4
#define ZPCI_TABLE_TYPE_SX		0x0

#define ZPCI_TABLE_LEN_RFX		0x3
#define ZPCI_TABLE_LEN_RSX		0x3
#define ZPCI_TABLE_LEN_RTX		0x3

#define ZPCI_TABLE_OFFSET_MASK		0xc0
#define ZPCI_TABLE_SIZE			0x4000
#define ZPCI_TABLE_ALIGN		ZPCI_TABLE_SIZE
#define ZPCI_TABLE_ENTRY_SIZE		(sizeof(unsigned long))
#define ZPCI_TABLE_ENTRIES		(ZPCI_TABLE_SIZE / ZPCI_TABLE_ENTRY_SIZE)

#define ZPCI_TABLE_BITS			11
#define ZPCI_PT_BITS			8
#define ZPCI_ST_SHIFT			(ZPCI_PT_BITS + PAGE_SHIFT)
#define ZPCI_RT_SHIFT			(ZPCI_ST_SHIFT + ZPCI_TABLE_BITS)

#define ZPCI_RTE_FLAG_MASK		0x3fffUL
#define ZPCI_RTE_ADDR_MASK		(~ZPCI_RTE_FLAG_MASK)
#define ZPCI_STE_FLAG_MASK		0x7ffUL
#define ZPCI_STE_ADDR_MASK		(~ZPCI_STE_FLAG_MASK)

/* I/O Page tables */
#define ZPCI_PTE_VALID_MASK		0x400
#define ZPCI_PTE_INVALID		0x400
#define ZPCI_PTE_VALID			0x000
#define ZPCI_PT_SIZE			0x800
#define ZPCI_PT_ALIGN			ZPCI_PT_SIZE
#define ZPCI_PT_ENTRIES			(ZPCI_PT_SIZE / ZPCI_TABLE_ENTRY_SIZE)
#define ZPCI_PT_MASK			(ZPCI_PT_ENTRIES - 1)

#define ZPCI_PTE_FLAG_MASK		0xfffUL
#define ZPCI_PTE_ADDR_MASK		(~ZPCI_PTE_FLAG_MASK)

/* Shared bits */
#define ZPCI_TABLE_VALID		0x00
#define ZPCI_TABLE_INVALID		0x20
#define ZPCI_TABLE_PROTECTED		0x200
#define ZPCI_TABLE_UNPROTECTED		0x000

#define ZPCI_TABLE_VALID_MASK		0x20
#define ZPCI_TABLE_PROT_MASK		0x200

static inline unsigned int calc_rtx(dma_addr_t ptr)
{
	return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
}

static inline unsigned int calc_sx(dma_addr_t ptr)
{
	return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
}

static inline unsigned int calc_px(dma_addr_t ptr)
{
	return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
}

static inline void set_pt_pfaa(unsigned long *entry, void *pfaa)
{
	*entry &= ZPCI_PTE_FLAG_MASK;
	*entry |= ((unsigned long) pfaa & ZPCI_PTE_ADDR_MASK);
}

static inline void set_rt_sto(unsigned long *entry, void *sto)
{
	*entry &= ZPCI_RTE_FLAG_MASK;
	*entry |= ((unsigned long) sto & ZPCI_RTE_ADDR_MASK);
	*entry |= ZPCI_TABLE_TYPE_RTX;
}

static inline void set_st_pto(unsigned long *entry, void *pto)
{
	*entry &= ZPCI_STE_FLAG_MASK;
	*entry |= ((unsigned long) pto & ZPCI_STE_ADDR_MASK);
	*entry |= ZPCI_TABLE_TYPE_SX;
}

static inline void validate_rt_entry(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_VALID_MASK;
	*entry &= ~ZPCI_TABLE_OFFSET_MASK;
	*entry |= ZPCI_TABLE_VALID;
	*entry |= ZPCI_TABLE_LEN_RTX;
}

static inline void validate_st_entry(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_VALID_MASK;
	*entry |= ZPCI_TABLE_VALID;
}

static inline void invalidate_table_entry(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_VALID_MASK;
	*entry |= ZPCI_TABLE_INVALID;
}

static inline void invalidate_pt_entry(unsigned long *entry)
{
	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_INVALID);
	*entry &= ~ZPCI_PTE_VALID_MASK;
	*entry |= ZPCI_PTE_INVALID;
}

static inline void validate_pt_entry(unsigned long *entry)
{
	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID);
	*entry &= ~ZPCI_PTE_VALID_MASK;
	*entry |= ZPCI_PTE_VALID;
}

static inline void entry_set_protected(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_PROT_MASK;
	*entry |= ZPCI_TABLE_PROTECTED;
}

static inline void entry_clr_protected(unsigned long *entry)
{
	*entry &= ~ZPCI_TABLE_PROT_MASK;
	*entry |= ZPCI_TABLE_UNPROTECTED;
}

static inline int reg_entry_isvalid(unsigned long entry)
{
	return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
}

static inline int pt_entry_isvalid(unsigned long entry)
{
	return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
}

static inline int entry_isprotected(unsigned long entry)
{
	return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED;
}

static inline unsigned long *get_rt_sto(unsigned long entry)
{
	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
		? (unsigned long *) (entry & ZPCI_RTE_ADDR_MASK)
		: NULL;
}

static inline unsigned long *get_st_pto(unsigned long entry)
{
	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
		? (unsigned long *) (entry & ZPCI_STE_ADDR_MASK)
		: NULL;
}

/* Prototypes */
int zpci_dma_init_device(struct zpci_dev *);
void zpci_dma_exit_device(struct zpci_dev *);

#endif
Commit	Line	Data
828b35f6 JG	1	#ifndef _ASM_S390_PCI_DMA_H
	2	#define _ASM_S390_PCI_DMA_H
	3
	4	/* I/O Translation Anchor (IOTA) */
	5	enum zpci_ioat_dtype {
	6	ZPCI_IOTA_STO = 0,
	7	ZPCI_IOTA_RTTO = 1,
	8	ZPCI_IOTA_RSTO = 2,
	9	ZPCI_IOTA_RFTO = 3,
	10	ZPCI_IOTA_PFAA = 4,
	11	ZPCI_IOTA_IOPFAA = 5,
	12	ZPCI_IOTA_IOPTO = 7
	13	};
	14
	15	#define ZPCI_IOTA_IOT_ENABLED 0x800UL
	16	#define ZPCI_IOTA_DT_ST (ZPCI_IOTA_STO << 2)
	17	#define ZPCI_IOTA_DT_RT (ZPCI_IOTA_RTTO << 2)
	18	#define ZPCI_IOTA_DT_RS (ZPCI_IOTA_RSTO << 2)
	19	#define ZPCI_IOTA_DT_RF (ZPCI_IOTA_RFTO << 2)
	20	#define ZPCI_IOTA_DT_PF (ZPCI_IOTA_PFAA << 2)
	21	#define ZPCI_IOTA_FS_4K 0
	22	#define ZPCI_IOTA_FS_1M 1
	23	#define ZPCI_IOTA_FS_2G 2
	24	#define ZPCI_KEY (PAGE_DEFAULT_KEY << 5)
	25
	26	#define ZPCI_IOTA_STO_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_ST)
	27	#define ZPCI_IOTA_RTTO_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_RT)
	28	#define ZPCI_IOTA_RSTO_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_RS)
	29	#define ZPCI_IOTA_RFTO_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_RF)
	30	#define ZPCI_IOTA_RFAA_FLAG (ZPCI_IOTA_IOT_ENABLED \| ZPCI_KEY \| ZPCI_IOTA_DT_PF \| ZPCI_IOTA_FS_2G)
	31
	32	/* I/O Region and segment tables */
	33	#define ZPCI_INDEX_MASK 0x7ffUL
	34
	35	#define ZPCI_TABLE_TYPE_MASK 0xc
	36	#define ZPCI_TABLE_TYPE_RFX 0xc
	37	#define ZPCI_TABLE_TYPE_RSX 0x8
	38	#define ZPCI_TABLE_TYPE_RTX 0x4
	39	#define ZPCI_TABLE_TYPE_SX 0x0
	40
	41	#define ZPCI_TABLE_LEN_RFX 0x3
	42	#define ZPCI_TABLE_LEN_RSX 0x3
	43	#define ZPCI_TABLE_LEN_RTX 0x3
	44
	45	#define ZPCI_TABLE_OFFSET_MASK 0xc0
	46	#define ZPCI_TABLE_SIZE 0x4000
	47	#define ZPCI_TABLE_ALIGN ZPCI_TABLE_SIZE
	48	#define ZPCI_TABLE_ENTRY_SIZE (sizeof(unsigned long))
	49	#define ZPCI_TABLE_ENTRIES (ZPCI_TABLE_SIZE / ZPCI_TABLE_ENTRY_SIZE)
	50
	51	#define ZPCI_TABLE_BITS 11
	52	#define ZPCI_PT_BITS 8
	53	#define ZPCI_ST_SHIFT (ZPCI_PT_BITS + PAGE_SHIFT)
	54	#define ZPCI_RT_SHIFT (ZPCI_ST_SHIFT + ZPCI_TABLE_BITS)
	55
	56	#define ZPCI_RTE_FLAG_MASK 0x3fffUL
	57	#define ZPCI_RTE_ADDR_MASK (~ZPCI_RTE_FLAG_MASK)
	58	#define ZPCI_STE_FLAG_MASK 0x7ffUL
	59	#define ZPCI_STE_ADDR_MASK (~ZPCI_STE_FLAG_MASK)
	60
	61	/* I/O Page tables */
	62	#define ZPCI_PTE_VALID_MASK 0x400
	63	#define ZPCI_PTE_INVALID 0x400
	64	#define ZPCI_PTE_VALID 0x000
65	#define ZPCI_PT_SIZE 0x800
66	#define ZPCI_PT_ALIGN ZPCI_PT_SIZE
67	#define ZPCI_PT_ENTRIES (ZPCI_PT_SIZE / ZPCI_TABLE_ENTRY_SIZE)
68	#define ZPCI_PT_MASK (ZPCI_PT_ENTRIES - 1)
69
70	#define ZPCI_PTE_FLAG_MASK 0xfffUL
71	#define ZPCI_PTE_ADDR_MASK (~ZPCI_PTE_FLAG_MASK)
72
73	/* Shared bits */
74	#define ZPCI_TABLE_VALID 0x00
75	#define ZPCI_TABLE_INVALID 0x20
76	#define ZPCI_TABLE_PROTECTED 0x200
77	#define ZPCI_TABLE_UNPROTECTED 0x000
78
79	#define ZPCI_TABLE_VALID_MASK 0x20
80	#define ZPCI_TABLE_PROT_MASK 0x200
81
82	static inline unsigned int calc_rtx(dma_addr_t ptr)
83	{
84	return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
85	}
86
87	static inline unsigned int calc_sx(dma_addr_t ptr)
88	{
89	return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
90	}
91
92	static inline unsigned int calc_px(dma_addr_t ptr)
93	{
94	return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
95	}
96
97	static inline void set_pt_pfaa(unsigned long entry, void pfaa)
98	{
99	*entry &= ZPCI_PTE_FLAG_MASK;
100	*entry \|= ((unsigned long) pfaa & ZPCI_PTE_ADDR_MASK);
101	}
102
103	static inline void set_rt_sto(unsigned long entry, void sto)
104	{
105	*entry &= ZPCI_RTE_FLAG_MASK;
106	*entry \|= ((unsigned long) sto & ZPCI_RTE_ADDR_MASK);
107	*entry \|= ZPCI_TABLE_TYPE_RTX;
108	}
109
110	static inline void set_st_pto(unsigned long entry, void pto)
111	{
112	*entry &= ZPCI_STE_FLAG_MASK;
113	*entry \|= ((unsigned long) pto & ZPCI_STE_ADDR_MASK);
114	*entry \|= ZPCI_TABLE_TYPE_SX;
115	}
116
117	static inline void validate_rt_entry(unsigned long *entry)
118	{
119	*entry &= ~ZPCI_TABLE_VALID_MASK;
120	*entry &= ~ZPCI_TABLE_OFFSET_MASK;
121	*entry \|= ZPCI_TABLE_VALID;
122	*entry \|= ZPCI_TABLE_LEN_RTX;
123	}
124
125	static inline void validate_st_entry(unsigned long *entry)
126	{
127	*entry &= ~ZPCI_TABLE_VALID_MASK;
128	*entry \|= ZPCI_TABLE_VALID;
129	}
130
131	static inline void invalidate_table_entry(unsigned long *entry)
132	{
133	*entry &= ~ZPCI_TABLE_VALID_MASK;
134	*entry \|= ZPCI_TABLE_INVALID;
135	}
136
137	static inline void invalidate_pt_entry(unsigned long *entry)
138	{
139	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_INVALID);
140	*entry &= ~ZPCI_PTE_VALID_MASK;
141	*entry \|= ZPCI_PTE_INVALID;
142	}
143
144	static inline void validate_pt_entry(unsigned long *entry)
145	{
146	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID);
147	*entry &= ~ZPCI_PTE_VALID_MASK;
148	*entry \|= ZPCI_PTE_VALID;
149	}
150
151	static inline void entry_set_protected(unsigned long *entry)
152	{
153	*entry &= ~ZPCI_TABLE_PROT_MASK;
154	*entry \|= ZPCI_TABLE_PROTECTED;
155	}
156
157	static inline void entry_clr_protected(unsigned long *entry)
158	{
159	*entry &= ~ZPCI_TABLE_PROT_MASK;
160	*entry \|= ZPCI_TABLE_UNPROTECTED;
161	}
162
163	static inline int reg_entry_isvalid(unsigned long entry)
164	{
165	return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
166	}
167
168	static inline int pt_entry_isvalid(unsigned long entry)
169	{
170	return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
171	}
172
173	static inline int entry_isprotected(unsigned long entry)
174	{
175	return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED;
176	}
177
178	static inline unsigned long *get_rt_sto(unsigned long entry)
179	{
180	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
181	? (unsigned long *) (entry & ZPCI_RTE_ADDR_MASK)
182	: NULL;
183	}
184
185	static inline unsigned long *get_st_pto(unsigned long entry)
186	{
187	return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
188	? (unsigned long *) (entry & ZPCI_STE_ADDR_MASK)
189	: NULL;
190	}
191
192	/* Prototypes */
193	int zpci_dma_init_device(struct zpci_dev *);
194	void zpci_dma_exit_device(struct zpci_dev *);
195
196	#endif