[deliverable/linux.git] / arch / s390 / include / asm / processor.h

/*
 *  include/asm-s390/processor.h
 *
 *  S390 version
 *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
 *    Author(s): Hartmut Penner (hp@de.ibm.com),
 *               Martin Schwidefsky (schwidefsky@de.ibm.com)
 *
 *  Derived from "include/asm-i386/processor.h"
 *    Copyright (C) 1994, Linus Torvalds
 */

#ifndef __ASM_S390_PROCESSOR_H
#define __ASM_S390_PROCESSOR_H

#include <linux/linkage.h>
#include <asm/cpu.h>
#include <asm/page.h>
#include <asm/ptrace.h>
#include <asm/setup.h>

#ifdef __KERNEL__
/*
 * Default implementation of macro that returns current
 * instruction pointer ("program counter").
 */
#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })

static inline void get_cpu_id(struct cpuid *ptr)
{
	asm volatile("stidp %0" : "=Q" (*ptr));
}

extern void s390_adjust_jiffies(void);
extern int get_cpu_capability(unsigned int *);

/*
 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
 */
#ifndef __s390x__

#define TASK_SIZE		(1UL << 31)
#define TASK_UNMAPPED_BASE	(1UL << 30)

#else /* __s390x__ */

#define TASK_SIZE_OF(tsk)	((tsk)->mm->context.asce_limit)
#define TASK_UNMAPPED_BASE	(test_thread_flag(TIF_31BIT) ? \
					(1UL << 30) : (1UL << 41))
#define TASK_SIZE		TASK_SIZE_OF(current)

#endif /* __s390x__ */

#ifdef __KERNEL__

#ifndef __s390x__
#define STACK_TOP		(1UL << 31)
#define STACK_TOP_MAX		(1UL << 31)
#else /* __s390x__ */
#define STACK_TOP		(1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
#define STACK_TOP_MAX		(1UL << 42)
#endif /* __s390x__ */


#endif

#define HAVE_ARCH_PICK_MMAP_LAYOUT

typedef struct {
        __u32 ar4;
} mm_segment_t;

/*
 * Thread structure
 */
struct thread_struct {
	s390_fp_regs fp_regs;
	unsigned int  acrs[NUM_ACRS];
        unsigned long ksp;              /* kernel stack pointer             */
	mm_segment_t mm_segment;
        unsigned long prot_addr;        /* address of protection-excep.     */
        unsigned int trap_no;
	struct per_regs per_user;	/* User specified PER registers */
	struct per_event per_event;	/* Cause of the last PER trap */
        /* pfault_wait is used to block the process on a pfault event */
	unsigned long pfault_wait;
	struct list_head list;
};

typedef struct thread_struct thread_struct;

/*
 * Stack layout of a C stack frame.
 */
#ifndef __PACK_STACK
struct stack_frame {
	unsigned long back_chain;
	unsigned long empty1[5];
	unsigned long gprs[10];
	unsigned int  empty2[8];
};
#else
struct stack_frame {
	unsigned long empty1[5];
	unsigned int  empty2[8];
	unsigned long gprs[10];
	unsigned long back_chain;
};
#endif

#define ARCH_MIN_TASKALIGN	8

#define INIT_THREAD {							\
	.ksp = sizeof(init_stack) + (unsigned long) &init_stack,	\
}

/*
 * Do necessary setup to start up a new thread.
 */
#define start_thread(regs, new_psw, new_stackp) do {		\
	set_fs(USER_DS);					\
	regs->psw.mask	= psw_user_bits;			\
	regs->psw.addr	= new_psw | PSW_ADDR_AMODE;		\
	regs->gprs[15]	= new_stackp;				\
} while (0)

#define start_thread31(regs, new_psw, new_stackp) do {		\
	set_fs(USER_DS);					\
	regs->psw.mask	= psw_user32_bits;			\
	regs->psw.addr	= new_psw | PSW_ADDR_AMODE;		\
	regs->gprs[15]	= new_stackp;				\
	crst_table_downgrade(current->mm, 1UL << 31);		\
} while (0)

/* Forward declaration, a strange C thing */
struct task_struct;
struct mm_struct;
struct seq_file;

/* Free all resources held by a thread. */
extern void release_thread(struct task_struct *);
extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);

/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk)	do { } while (0)

/*
 * Return saved PC of a blocked thread.
 */
extern unsigned long thread_saved_pc(struct task_struct *t);

extern void show_code(struct pt_regs *regs);

unsigned long get_wchan(struct task_struct *p);
#define task_pt_regs(tsk) ((struct pt_regs *) \
        (task_stack_page(tsk) + THREAD_SIZE) - 1)
#define KSTK_EIP(tsk)	(task_pt_regs(tsk)->psw.addr)
#define KSTK_ESP(tsk)	(task_pt_regs(tsk)->gprs[15])

/*
 * Give up the time slice of the virtual PU.
 */
static inline void cpu_relax(void)
{
	if (MACHINE_HAS_DIAG44)
		asm volatile("diag 0,0,68");
	barrier();
}

static inline void psw_set_key(unsigned int key)
{
	asm volatile("spka 0(%0)" : : "d" (key));
}

/*
 * Set PSW to specified value.
 */
static inline void __load_psw(psw_t psw)
{
#ifndef __s390x__
	asm volatile("lpsw  %0" : : "Q" (psw) : "cc");
#else
	asm volatile("lpswe %0" : : "Q" (psw) : "cc");
#endif
}

/*
 * Set PSW mask to specified value, while leaving the
 * PSW addr pointing to the next instruction.
 */

static inline void __load_psw_mask (unsigned long mask)
{
	unsigned long addr;
	psw_t psw;

	psw.mask = mask;

#ifndef __s390x__
	asm volatile(
		"	basr	%0,0\n"
		"0:	ahi	%0,1f-0b\n"
		"	st	%0,%O1+4(%R1)\n"
		"	lpsw	%1\n"
		"1:"
		: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
#else /* __s390x__ */
	asm volatile(
		"	larl	%0,1f\n"
		"	stg	%0,%O1+8(%R1)\n"
		"	lpswe	%1\n"
		"1:"
		: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
#endif /* __s390x__ */
}
 
/*
 * Function to stop a processor until an interruption occurred
 */
static inline void enabled_wait(void)
{
	__load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT |
			PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY);
}

/*
 * Function to drop a processor into disabled wait state
 */

static inline void ATTRIB_NORET disabled_wait(unsigned long code)
{
        unsigned long ctl_buf;
        psw_t dw_psw;

        dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT;
        dw_psw.addr = code;
        /* 
         * Store status and then load disabled wait psw,
         * the processor is dead afterwards
         */
#ifndef __s390x__
	asm volatile(
		"	stctl	0,0,0(%2)\n"
		"	ni	0(%2),0xef\n"	/* switch off protection */
		"	lctl	0,0,0(%2)\n"
		"	stpt	0xd8\n"		/* store timer */
		"	stckc	0xe0\n"		/* store clock comparator */
		"	stpx	0x108\n"	/* store prefix register */
		"	stam	0,15,0x120\n"	/* store access registers */
		"	std	0,0x160\n"	/* store f0 */
		"	std	2,0x168\n"	/* store f2 */
		"	std	4,0x170\n"	/* store f4 */
		"	std	6,0x178\n"	/* store f6 */
		"	stm	0,15,0x180\n"	/* store general registers */
		"	stctl	0,15,0x1c0\n"	/* store control registers */
		"	oi	0x1c0,0x10\n"	/* fake protection bit */
		"	lpsw	0(%1)"
		: "=m" (ctl_buf)
		: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
#else /* __s390x__ */
	asm volatile(
		"	stctg	0,0,0(%2)\n"
		"	ni	4(%2),0xef\n"	/* switch off protection */
		"	lctlg	0,0,0(%2)\n"
		"	lghi	1,0x1000\n"
		"	stpt	0x328(1)\n"	/* store timer */
		"	stckc	0x330(1)\n"	/* store clock comparator */
		"	stpx	0x318(1)\n"	/* store prefix register */
		"	stam	0,15,0x340(1)\n"/* store access registers */
		"	stfpc	0x31c(1)\n"	/* store fpu control */
		"	std	0,0x200(1)\n"	/* store f0 */
		"	std	1,0x208(1)\n"	/* store f1 */
		"	std	2,0x210(1)\n"	/* store f2 */
		"	std	3,0x218(1)\n"	/* store f3 */
		"	std	4,0x220(1)\n"	/* store f4 */
		"	std	5,0x228(1)\n"	/* store f5 */
		"	std	6,0x230(1)\n"	/* store f6 */
		"	std	7,0x238(1)\n"	/* store f7 */
		"	std	8,0x240(1)\n"	/* store f8 */
		"	std	9,0x248(1)\n"	/* store f9 */
		"	std	10,0x250(1)\n"	/* store f10 */
		"	std	11,0x258(1)\n"	/* store f11 */
		"	std	12,0x260(1)\n"	/* store f12 */
		"	std	13,0x268(1)\n"	/* store f13 */
		"	std	14,0x270(1)\n"	/* store f14 */
		"	std	15,0x278(1)\n"	/* store f15 */
		"	stmg	0,15,0x280(1)\n"/* store general registers */
		"	stctg	0,15,0x380(1)\n"/* store control registers */
		"	oi	0x384(1),0x10\n"/* fake protection bit */
		"	lpswe	0(%1)"
		: "=m" (ctl_buf)
		: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
#endif /* __s390x__ */
	while (1);
}

/*
 * Basic Machine Check/Program Check Handler.
 */

extern void s390_base_mcck_handler(void);
extern void s390_base_pgm_handler(void);
extern void s390_base_ext_handler(void);

extern void (*s390_base_mcck_handler_fn)(void);
extern void (*s390_base_pgm_handler_fn)(void);
extern void (*s390_base_ext_handler_fn)(void);

#define ARCH_LOW_ADDRESS_LIMIT	0x7fffffffUL

#endif

/*
 * Helper macro for exception table entries
 */
#ifndef __s390x__
#define EX_TABLE(_fault,_target)			\
	".section __ex_table,\"a\"\n"			\
	"	.align 4\n"				\
	"	.long  " #_fault "," #_target "\n"	\
	".previous\n"
#else
#define EX_TABLE(_fault,_target)			\
	".section __ex_table,\"a\"\n"			\
	"	.align 8\n"				\
	"	.quad  " #_fault "," #_target "\n"	\
	".previous\n"
#endif

#endif                                 /* __ASM_S390_PROCESSOR_H           */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/asm-s390/processor.h
	3	*
	4	* S390 version
	5	* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
	6	* Author(s): Hartmut Penner (hp@de.ibm.com),
	7	* Martin Schwidefsky (schwidefsky@de.ibm.com)
	8	*
	9	* Derived from "include/asm-i386/processor.h"
	10	* Copyright (C) 1994, Linus Torvalds
	11	*/
	12
	13	#ifndef __ASM_S390_PROCESSOR_H
	14	#define __ASM_S390_PROCESSOR_H
	15
edd53787	16	#include <linux/linkage.h>
e86a6ed6	17	#include <asm/cpu.h>
25097bf1	18	#include <asm/page.h>
1da177e4	19	#include <asm/ptrace.h>
25097bf1	20	#include <asm/setup.h>
1da177e4 LT	21
	22	#ifdef __KERNEL__
	23	/*
	24	* Default implementation of macro that returns current
	25	* instruction pointer ("program counter").
	26	*/
94c12cc7	27	#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
1da177e4	28
e86a6ed6	29	static inline void get_cpu_id(struct cpuid *ptr)
72960a02	30	{
987bcdac	31	asm volatile("stidp %0" : "=Q" (*ptr));
72960a02 MH	32	}
72960a02 MH	33
31ee4b2f	34	extern void s390_adjust_jiffies(void);
2fc2d1e9	35	extern int get_cpu_capability(unsigned int *);
1da177e4	36
1da177e4	37	/*
f481bfaf	38	* User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
1da177e4 LT	39	*/
	40	#ifndef __s390x__
	41
5a216a20 MS	42	#define TASK_SIZE (1UL << 31)
5a216a20 MS	43	#define TASK_UNMAPPED_BASE (1UL << 30)
1da177e4 LT	44
	45	#else /* __s390x__ */
	46
f481bfaf	47	#define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
5a216a20 MS	48	#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
	49	(1UL << 30) : (1UL << 41))
	50	#define TASK_SIZE TASK_SIZE_OF(current)
1da177e4 LT	51
	52	#endif /* __s390x__ */
	53
922a70d3 DH	54	#ifdef __KERNEL__
922a70d3 DH	55
5a216a20 MS	56	#ifndef __s390x__
5a216a20 MS	57	#define STACK_TOP (1UL << 31)
6252d702	58	#define STACK_TOP_MAX (1UL << 31)
5a216a20	59	#else /* __s390x__ */
6252d702 MS	60	#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
6252d702 MS	61	#define STACK_TOP_MAX (1UL << 42)
5a216a20 MS	62	#endif /* __s390x__ */
5a216a20 MS	63
922a70d3 DH	64
	65	#endif
	66
1da177e4 LT	67	#define HAVE_ARCH_PICK_MMAP_LAYOUT
	68
	69	typedef struct {
	70	__u32 ar4;
	71	} mm_segment_t;
	72
	73	/*
	74	* Thread structure
	75	*/
	76	struct thread_struct {
	77	s390_fp_regs fp_regs;
	78	unsigned int acrs[NUM_ACRS];
	79	unsigned long ksp; /* kernel stack pointer */
1da177e4 LT	80	mm_segment_t mm_segment;
1da177e4 LT	81	unsigned long prot_addr; /* address of protection-excep. */
1da177e4	82	unsigned int trap_no;
5e9a2692 MS	83	struct per_regs per_user; /* User specified PER registers */
5e9a2692 MS	84	struct per_event per_event; /* Cause of the last PER trap */
1da177e4 LT	85	/* pfault_wait is used to block the process on a pfault event */
1da177e4 LT	86	unsigned long pfault_wait;
f2db2e6c	87	struct list_head list;
1da177e4 LT	88	};
	89
	90	typedef struct thread_struct thread_struct;
	91
	92	/*
	93	* Stack layout of a C stack frame.
	94	*/
	95	#ifndef __PACK_STACK
	96	struct stack_frame {
	97	unsigned long back_chain;
	98	unsigned long empty1[5];
	99	unsigned long gprs[10];
	100	unsigned int empty2[8];
	101	};
	102	#else
	103	struct stack_frame {
	104	unsigned long empty1[5];
	105	unsigned int empty2[8];
	106	unsigned long gprs[10];
	107	unsigned long back_chain;
	108	};
	109	#endif
	110
	111	#define ARCH_MIN_TASKALIGN 8
	112
6f3fa3f0 MS	113	#define INIT_THREAD { \
	114	.ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
	115	}
1da177e4 LT	116
	117	/*
	118	* Do necessary setup to start up a new thread.
	119	*/
63506c41	120	#define start_thread(regs, new_psw, new_stackp) do { \
9b241cc8	121	set_fs(USER_DS); \
c1821c2e	122	regs->psw.mask = psw_user_bits; \
63506c41 MS	123	regs->psw.addr = new_psw \| PSW_ADDR_AMODE; \
	124	regs->gprs[15] = new_stackp; \
	125	} while (0)
	126
	127	#define start_thread31(regs, new_psw, new_stackp) do { \
	128	set_fs(USER_DS); \
	129	regs->psw.mask = psw_user32_bits; \
	130	regs->psw.addr = new_psw \| PSW_ADDR_AMODE; \
	131	regs->gprs[15] = new_stackp; \
	132	crst_table_downgrade(current->mm, 1UL << 31); \
1da177e4 LT	133	} while (0)
1da177e4 LT	134
1da177e4 LT	135	/* Forward declaration, a strange C thing */
	136	struct task_struct;
	137	struct mm_struct;
df5f8314	138	struct seq_file;
1da177e4 LT	139
	140	/* Free all resources held by a thread. */
	141	extern void release_thread(struct task_struct *);
	142	extern int kernel_thread(int (fn)(void ), void * arg, unsigned long flags);
	143
	144	/* Prepare to copy thread state - unlazy all lazy status */
	145	#define prepare_to_copy(tsk) do { } while (0)
	146
	147	/*
	148	* Return saved PC of a blocked thread.
	149	*/
	150	extern unsigned long thread_saved_pc(struct task_struct *t);
	151
bb11e3bd	152	extern void show_code(struct pt_regs *regs);
1da177e4 LT	153
1da177e4 LT	154	unsigned long get_wchan(struct task_struct *p);
c7584fb6	155	#define task_pt_regs(tsk) ((struct pt_regs *) \
30af7120	156	(task_stack_page(tsk) + THREAD_SIZE) - 1)
c7584fb6 AV	157	#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
c7584fb6 AV	158	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
1da177e4 LT	159
	160	/*
	161	* Give up the time slice of the virtual PU.
	162	*/
abdba61a HC	163	static inline void cpu_relax(void)
	164	{
	165	if (MACHINE_HAS_DIAG44)
c48e0913 HC	166	asm volatile("diag 0,0,68");
c48e0913 HC	167	barrier();
abdba61a	168	}
1da177e4	169
dc74d7f9 HC	170	static inline void psw_set_key(unsigned int key)
	171	{
	172	asm volatile("spka 0(%0)" : : "d" (key));
	173	}
	174
77fa2245 HC	175	/*
	176	* Set PSW to specified value.
	177	*/
	178	static inline void __load_psw(psw_t psw)
	179	{
	180	#ifndef __s390x__
987bcdac	181	asm volatile("lpsw %0" : : "Q" (psw) : "cc");
77fa2245	182	#else
987bcdac	183	asm volatile("lpswe %0" : : "Q" (psw) : "cc");
77fa2245 HC	184	#endif
	185	}
	186
1da177e4 LT	187	/*
	188	* Set PSW mask to specified value, while leaving the
	189	* PSW addr pointing to the next instruction.
	190	*/
	191
	192	static inline void __load_psw_mask (unsigned long mask)
	193	{
	194	unsigned long addr;
1da177e4	195	psw_t psw;
77fa2245	196
1da177e4 LT	197	psw.mask = mask;
	198
	199	#ifndef __s390x__
94c12cc7 MS	200	asm volatile(
	201	" basr %0,0\n"
	202	"0: ahi %0,1f-0b\n"
987bcdac MS	203	" st %0,%O1+4(%R1)\n"
987bcdac MS	204	" lpsw %1\n"
1da177e4	205	"1:"
987bcdac	206	: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
1da177e4	207	#else /* __s390x__ */
94c12cc7 MS	208	asm volatile(
94c12cc7 MS	209	" larl %0,1f\n"
987bcdac MS	210	" stg %0,%O1+8(%R1)\n"
987bcdac MS	211	" lpswe %1\n"
1da177e4	212	"1:"
987bcdac	213	: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
1da177e4 LT	214	#endif /* __s390x__ */
	215	}
	216
	217	/*
	218	* Function to stop a processor until an interruption occurred
	219	*/
	220	static inline void enabled_wait(void)
	221	{
77fa2245 HC	222	__load_psw_mask(PSW_BASE_BITS \| PSW_MASK_IO \| PSW_MASK_EXT \|
77fa2245 HC	223	PSW_MASK_MCHECK \| PSW_MASK_WAIT \| PSW_DEFAULT_KEY);
1da177e4 LT	224	}
	225
	226	/*
	227	* Function to drop a processor into disabled wait state
	228	*/
	229
edd53787	230	static inline void ATTRIB_NORET disabled_wait(unsigned long code)
1da177e4	231	{
1da177e4	232	unsigned long ctl_buf;
77fa2245	233	psw_t dw_psw;
1da177e4	234
77fa2245 HC	235	dw_psw.mask = PSW_BASE_BITS \| PSW_MASK_WAIT;
77fa2245 HC	236	dw_psw.addr = code;
1da177e4 LT	237	/*
	238	* Store status and then load disabled wait psw,
	239	* the processor is dead afterwards
	240	*/
	241	#ifndef __s390x__
94c12cc7 MS	242	asm volatile(
	243	" stctl 0,0,0(%2)\n"
	244	" ni 0(%2),0xef\n" /* switch off protection */
	245	" lctl 0,0,0(%2)\n"
	246	" stpt 0xd8\n" /* store timer */
	247	" stckc 0xe0\n" /* store clock comparator */
	248	" stpx 0x108\n" /* store prefix register */
	249	" stam 0,15,0x120\n" /* store access registers */
	250	" std 0,0x160\n" /* store f0 */
	251	" std 2,0x168\n" /* store f2 */
	252	" std 4,0x170\n" /* store f4 */
	253	" std 6,0x178\n" /* store f6 */
	254	" stm 0,15,0x180\n" /* store general registers */
	255	" stctl 0,15,0x1c0\n" /* store control registers */
	256	" oi 0x1c0,0x10\n" /* fake protection bit */
	257	" lpsw 0(%1)"
	258	: "=m" (ctl_buf)
	259	: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
1da177e4	260	#else /* __s390x__ */
94c12cc7 MS	261	asm volatile(
	262	" stctg 0,0,0(%2)\n"
	263	" ni 4(%2),0xef\n" /* switch off protection */
	264	" lctlg 0,0,0(%2)\n"
	265	" lghi 1,0x1000\n"
	266	" stpt 0x328(1)\n" /* store timer */
	267	" stckc 0x330(1)\n" /* store clock comparator */
	268	" stpx 0x318(1)\n" /* store prefix register */
	269	" stam 0,15,0x340(1)\n"/* store access registers */
	270	" stfpc 0x31c(1)\n" /* store fpu control */
	271	" std 0,0x200(1)\n" /* store f0 */
	272	" std 1,0x208(1)\n" /* store f1 */
	273	" std 2,0x210(1)\n" /* store f2 */
	274	" std 3,0x218(1)\n" /* store f3 */
	275	" std 4,0x220(1)\n" /* store f4 */
	276	" std 5,0x228(1)\n" /* store f5 */
	277	" std 6,0x230(1)\n" /* store f6 */
	278	" std 7,0x238(1)\n" /* store f7 */
	279	" std 8,0x240(1)\n" /* store f8 */
	280	" std 9,0x248(1)\n" /* store f9 */
	281	" std 10,0x250(1)\n" /* store f10 */
	282	" std 11,0x258(1)\n" /* store f11 */
	283	" std 12,0x260(1)\n" /* store f12 */
	284	" std 13,0x268(1)\n" /* store f13 */
	285	" std 14,0x270(1)\n" /* store f14 */
	286	" std 15,0x278(1)\n" /* store f15 */
	287	" stmg 0,15,0x280(1)\n"/* store general registers */
	288	" stctg 0,15,0x380(1)\n"/* store control registers */
	289	" oi 0x384(1),0x10\n"/* fake protection bit */
	290	" lpswe 0(%1)"
	291	: "=m" (ctl_buf)
bdd42b28	292	: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
1da177e4	293	#endif /* __s390x__ */
edd53787	294	while (1);
1da177e4 LT	295	}
1da177e4 LT	296
ab14de6c HC	297	/*
	298	* Basic Machine Check/Program Check Handler.
	299	*/
	300
	301	extern void s390_base_mcck_handler(void);
	302	extern void s390_base_pgm_handler(void);
	303	extern void s390_base_ext_handler(void);
	304
	305	extern void (*s390_base_mcck_handler_fn)(void);
	306	extern void (*s390_base_pgm_handler_fn)(void);
	307	extern void (*s390_base_ext_handler_fn)(void);
	308
dfd54cbc HC	309	#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
dfd54cbc HC	310
1da177e4 LT	311	#endif
1da177e4 LT	312
de1a3f1c MS	313	/*
	314	* Helper macro for exception table entries
	315	*/
	316	#ifndef __s390x__
	317	#define EX_TABLE(_fault,_target) \
	318	".section __ex_table,\"a\"\n" \
	319	" .align 4\n" \
	320	" .long " #_fault "," #_target "\n" \
	321	".previous\n"
	322	#else
	323	#define EX_TABLE(_fault,_target) \
	324	".section __ex_table,\"a\"\n" \
	325	" .align 8\n" \
	326	" .quad " #_fault "," #_target "\n" \
	327	".previous\n"
	328	#endif
	329
1da177e4	330	#endif /* __ASM_S390_PROCESSOR_H */