[deliverable/linux.git] / arch / s390 / include / asm / ptrace.h

/*
 *  S390 version
 *    Copyright IBM Corp. 1999, 2000
 *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
 */
#ifndef _S390_PTRACE_H
#define _S390_PTRACE_H

#include <linux/const.h>
#include <uapi/asm/ptrace.h>

#define PIF_SYSCALL		0	/* inside a system call */
#define PIF_PER_TRAP		1	/* deliver sigtrap on return to user */

#define _PIF_SYSCALL		_BITUL(PIF_SYSCALL)
#define _PIF_PER_TRAP		_BITUL(PIF_PER_TRAP)

#ifndef __ASSEMBLY__

#define PSW_KERNEL_BITS	(PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
			 PSW_MASK_EA | PSW_MASK_BA)
#define PSW_USER_BITS	(PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
			 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
			 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)

struct psw_bits {
	unsigned long	   :  1;
	unsigned long r	   :  1; /* PER-Mask */
	unsigned long	   :  3;
	unsigned long t	   :  1; /* DAT Mode */
	unsigned long i	   :  1; /* Input/Output Mask */
	unsigned long e	   :  1; /* External Mask */
	unsigned long key  :  4; /* PSW Key */
	unsigned long	   :  1;
	unsigned long m	   :  1; /* Machine-Check Mask */
	unsigned long w	   :  1; /* Wait State */
	unsigned long p	   :  1; /* Problem State */
	unsigned long as   :  2; /* Address Space Control */
	unsigned long cc   :  2; /* Condition Code */
	unsigned long pm   :  4; /* Program Mask */
	unsigned long ri   :  1; /* Runtime Instrumentation */
	unsigned long	   :  6;
	unsigned long eaba :  2; /* Addressing Mode */
	unsigned long	   : 31;
	unsigned long ia   : 64; /* Instruction Address */
};

enum {
	PSW_AMODE_24BIT = 0,
	PSW_AMODE_31BIT = 1,
	PSW_AMODE_64BIT = 3
};

enum {
	PSW_AS_PRIMARY	 = 0,
	PSW_AS_ACCREG	 = 1,
	PSW_AS_SECONDARY = 2,
	PSW_AS_HOME	 = 3
};

#define psw_bits(__psw) (*({			\
	typecheck(psw_t, __psw);		\
	&(*(struct psw_bits *)(&(__psw)));	\
}))

/*
 * The pt_regs struct defines the way the registers are stored on
 * the stack during a system call.
 */
struct pt_regs 
{
	unsigned long args[1];
	psw_t psw;
	unsigned long gprs[NUM_GPRS];
	unsigned long orig_gpr2;
	unsigned int int_code;
	unsigned int int_parm;
	unsigned long int_parm_long;
	unsigned long flags;
};

/*
 * Program event recording (PER) register set.
 */
struct per_regs {
	unsigned long control;		/* PER control bits */
	unsigned long start;		/* PER starting address */
	unsigned long end;		/* PER ending address */
};

/*
 * PER event contains information about the cause of the last PER exception.
 */
struct per_event {
	unsigned short cause;		/* PER code, ATMID and AI */
	unsigned long address;		/* PER address */
	unsigned char paid;		/* PER access identification */
};

/*
 * Simplified per_info structure used to decode the ptrace user space ABI.
 */
struct per_struct_kernel {
	unsigned long cr9;		/* PER control bits */
	unsigned long cr10;		/* PER starting address */
	unsigned long cr11;		/* PER ending address */
	unsigned long bits;		/* Obsolete software bits */
	unsigned long starting_addr;	/* User specified start address */
	unsigned long ending_addr;	/* User specified end address */
	unsigned short perc_atmid;	/* PER trap ATMID */
	unsigned long address;		/* PER trap instruction address */
	unsigned char access_id;	/* PER trap access identification */
};

#define PER_EVENT_MASK			0xEB000000UL

#define PER_EVENT_BRANCH		0x80000000UL
#define PER_EVENT_IFETCH		0x40000000UL
#define PER_EVENT_STORE			0x20000000UL
#define PER_EVENT_STORE_REAL		0x08000000UL
#define PER_EVENT_TRANSACTION_END	0x02000000UL
#define PER_EVENT_NULLIFICATION		0x01000000UL

#define PER_CONTROL_MASK		0x00e00000UL

#define PER_CONTROL_BRANCH_ADDRESS	0x00800000UL
#define PER_CONTROL_SUSPENSION		0x00400000UL
#define PER_CONTROL_ALTERATION		0x00200000UL

static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
{
	regs->flags |= (1UL << flag);
}

static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
{
	regs->flags &= ~(1UL << flag);
}

static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
{
	return !!(regs->flags & (1UL << flag));
}

/*
 * These are defined as per linux/ptrace.h, which see.
 */
#define arch_has_single_step()	(1)
#define arch_has_block_step()	(1)

#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
#define instruction_pointer(regs) ((regs)->psw.addr)
#define user_stack_pointer(regs)((regs)->gprs[15])
#define profile_pc(regs) instruction_pointer(regs)

static inline long regs_return_value(struct pt_regs *regs)
{
	return regs->gprs[2];
}

static inline void instruction_pointer_set(struct pt_regs *regs,
					   unsigned long val)
{
	regs->psw.addr = val;
}

int regs_query_register_offset(const char *name);
const char *regs_query_register_name(unsigned int offset);
unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);

static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
{
	return regs->gprs[15];
}

#endif /* __ASSEMBLY__ */
#endif /* _S390_PTRACE_H */
Commit	Line	Data
1da177e4	1	/*
1da177e4	2	* S390 version
a53c8fab	3	* Copyright IBM Corp. 1999, 2000
1da177e4 LT	4	* Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
1da177e4 LT	5	*/
1da177e4 LT	6	#ifndef _S390_PTRACE_H
	7	#define _S390_PTRACE_H
	8
92778b99	9	#include <linux/const.h>
9807f759	10	#include <uapi/asm/ptrace.h>
1da177e4	11
d3a73acb MS	12	#define PIF_SYSCALL 0 /* inside a system call */
	13	#define PIF_PER_TRAP 1 /* deliver sigtrap on return to user */
	14
92778b99 HC	15	#define _PIF_SYSCALL _BITUL(PIF_SYSCALL)
92778b99 HC	16	#define _PIF_PER_TRAP _BITUL(PIF_PER_TRAP)
d3a73acb	17
1da177e4	18	#ifndef __ASSEMBLY__
63dd9b44	19
e258d719 MS	20	#define PSW_KERNEL_BITS (PSW_DEFAULT_KEY \| PSW_MASK_BASE \| PSW_ASC_HOME \| \
	21	PSW_MASK_EA \| PSW_MASK_BA)
	22	#define PSW_USER_BITS (PSW_MASK_DAT \| PSW_MASK_IO \| PSW_MASK_EXT \| \
	23	PSW_DEFAULT_KEY \| PSW_MASK_BASE \| PSW_MASK_MCHECK \| \
	24	PSW_MASK_PSTATE \| PSW_ASC_PRIMARY)
274f5946	25
1365632b	26	struct psw_bits {
cb951785 HC	27	unsigned long : 1;
	28	unsigned long r : 1; /* PER-Mask */
	29	unsigned long : 3;
	30	unsigned long t : 1; /* DAT Mode */
	31	unsigned long i : 1; /* Input/Output Mask */
	32	unsigned long e : 1; /* External Mask */
	33	unsigned long key : 4; /* PSW Key */
	34	unsigned long : 1;
	35	unsigned long m : 1; /* Machine-Check Mask */
	36	unsigned long w : 1; /* Wait State */
	37	unsigned long p : 1; /* Problem State */
	38	unsigned long as : 2; /* Address Space Control */
	39	unsigned long cc : 2; /* Condition Code */
	40	unsigned long pm : 4; /* Program Mask */
	41	unsigned long ri : 1; /* Runtime Instrumentation */
	42	unsigned long : 6;
	43	unsigned long eaba : 2; /* Addressing Mode */
	44	unsigned long : 31;
	45	unsigned long ia : 64; /* Instruction Address */
1365632b HC	46	};
	47
	48	enum {
	49	PSW_AMODE_24BIT = 0,
	50	PSW_AMODE_31BIT = 1,
	51	PSW_AMODE_64BIT = 3
	52	};
	53
	54	enum {
	55	PSW_AS_PRIMARY = 0,
	56	PSW_AS_ACCREG = 1,
	57	PSW_AS_SECONDARY = 2,
	58	PSW_AS_HOME = 3
	59	};
	60
	61	#define psw_bits(__psw) (*({ \
	62	typecheck(psw_t, __psw); \
	63	&((struct psw_bits )(&(__psw))); \
	64	}))
	65
1da177e4 LT	66	/*
	67	* The pt_regs struct defines the way the registers are stored on
	68	* the stack during a system call.
	69	*/
	70	struct pt_regs
	71	{
	72	unsigned long args[1];
	73	psw_t psw;
	74	unsigned long gprs[NUM_GPRS];
	75	unsigned long orig_gpr2;
aa33c8cb	76	unsigned int int_code;
48f6b00c	77	unsigned int int_parm;
aa33c8cb	78	unsigned long int_parm_long;
d3a73acb	79	unsigned long flags;
1da177e4	80	};
5e9a2692 MS	81
	82	/*
	83	* Program event recording (PER) register set.
	84	*/
	85	struct per_regs {
	86	unsigned long control; /* PER control bits */
	87	unsigned long start; /* PER starting address */
	88	unsigned long end; /* PER ending address */
	89	};
	90
	91	/*
	92	* PER event contains information about the cause of the last PER exception.
	93	*/
	94	struct per_event {
	95	unsigned short cause; /* PER code, ATMID and AI */
	96	unsigned long address; /* PER address */
	97	unsigned char paid; /* PER access identification */
	98	};
	99
	100	/*
	101	* Simplified per_info structure used to decode the ptrace user space ABI.
	102	*/
	103	struct per_struct_kernel {
	104	unsigned long cr9; /* PER control bits */
	105	unsigned long cr10; /* PER starting address */
	106	unsigned long cr11; /* PER ending address */
	107	unsigned long bits; /* Obsolete software bits */
	108	unsigned long starting_addr; /* User specified start address */
	109	unsigned long ending_addr; /* User specified end address */
	110	unsigned short perc_atmid; /* PER trap ATMID */
	111	unsigned long address; /* PER trap instruction address */
	112	unsigned char access_id; /* PER trap access identification */
	113	};
	114
d35339a4	115	#define PER_EVENT_MASK 0xEB000000UL
5e9a2692 MS	116
	117	#define PER_EVENT_BRANCH 0x80000000UL
	118	#define PER_EVENT_IFETCH 0x40000000UL
	119	#define PER_EVENT_STORE 0x20000000UL
	120	#define PER_EVENT_STORE_REAL 0x08000000UL
d35339a4	121	#define PER_EVENT_TRANSACTION_END 0x02000000UL
5e9a2692 MS	122	#define PER_EVENT_NULLIFICATION 0x01000000UL
5e9a2692 MS	123
d35339a4	124	#define PER_CONTROL_MASK 0x00e00000UL
5e9a2692 MS	125
5e9a2692 MS	126	#define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
d35339a4	127	#define PER_CONTROL_SUSPENSION 0x00400000UL
5e9a2692 MS	128	#define PER_CONTROL_ALTERATION 0x00200000UL
5e9a2692 MS	129
d3a73acb MS	130	static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
d3a73acb MS	131	{
ac25e790	132	regs->flags \|= (1UL << flag);
d3a73acb MS	133	}
	134
	135	static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
	136	{
ac25e790	137	regs->flags &= ~(1UL << flag);
d3a73acb MS	138	}
	139
	140	static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
	141	{
ac25e790	142	return !!(regs->flags & (1UL << flag));
d3a73acb MS	143	}
d3a73acb MS	144
0ac30be4 RM	145	/*
	146	* These are defined as per linux/ptrace.h, which see.
	147	*/
	148	#define arch_has_single_step() (1)
818a330c	149	#define arch_has_block_step() (1)
0ac30be4	150
1da177e4	151	#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
9cb1ccec	152	#define instruction_pointer(regs) ((regs)->psw.addr)
753c4dd6	153	#define user_stack_pointer(regs)((regs)->gprs[15])
1da177e4	154	#define profile_pc(regs) instruction_pointer(regs)
952974ac	155
d7e7528b EP	156	static inline long regs_return_value(struct pt_regs *regs)
	157	{
	158	return regs->gprs[2];
	159	}
	160
2a0a5b22 JW	161	static inline void instruction_pointer_set(struct pt_regs *regs,
	162	unsigned long val)
	163	{
fecc868a	164	regs->psw.addr = val;
2a0a5b22 JW	165	}
2a0a5b22 JW	166
952974ac HC	167	int regs_query_register_offset(const char *name);
	168	const char *regs_query_register_name(unsigned int offset);
	169	unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
	170	unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
	171
	172	static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
	173	{
9cb1ccec	174	return regs->gprs[15];
952974ac HC	175	}
952974ac HC	176
1da177e4	177	#endif /* __ASSEMBLY__ */
1da177e4	178	#endif /* _S390_PTRACE_H */