projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 9b747530 HC |
1 | #ifndef __S390_ASM_SIGP_H |
| 2 | #define __S390_ASM_SIGP_H | |
| 3 | ||
| 4 | /* SIGP order codes */ | |
| 5 | #define SIGP_SENSE 1 | |
| 6 | #define SIGP_EXTERNAL_CALL 2 | |
| 7 | #define SIGP_EMERGENCY_SIGNAL 3 | |
| 58bc33b2 | 8 | #define SIGP_START 4 |
| 9b747530 HC |
9 | #define SIGP_STOP 5 |
| 10 | #define SIGP_RESTART 6 | |
| 11 | #define SIGP_STOP_AND_STORE_STATUS 9 | |
| 12 | #define SIGP_INITIAL_CPU_RESET 11 | |
| b8983830 | 13 | #define SIGP_CPU_RESET 12 |
| 9b747530 HC |
14 | #define SIGP_SET_PREFIX 13 |
| 15 | #define SIGP_STORE_STATUS_AT_ADDRESS 14 | |
| 16 | #define SIGP_SET_ARCHITECTURE 18 | |
| b13d3580 | 17 | #define SIGP_COND_EMERGENCY_SIGNAL 19 |
| 9b747530 | 18 | #define SIGP_SENSE_RUNNING 21 |
| 10ad34bc | 19 | #define SIGP_SET_MULTI_THREADING 22 |
| a62bc073 | 20 | #define SIGP_STORE_ADDITIONAL_STATUS 23 |
| 9b747530 HC |
21 | |
| 22 | /* SIGP condition codes */ | |
| 23 | #define SIGP_CC_ORDER_CODE_ACCEPTED 0 | |
| 24 | #define SIGP_CC_STATUS_STORED 1 | |
| 25 | #define SIGP_CC_BUSY 2 | |
| 26 | #define SIGP_CC_NOT_OPERATIONAL 3 | |
| 27 | ||
| 28 | /* SIGP cpu status bits */ | |
| 29 | ||
| 30 | #define SIGP_STATUS_CHECK_STOP 0x00000010UL | |
| 31 | #define SIGP_STATUS_STOPPED 0x00000040UL | |
| 21b26c08 | 32 | #define SIGP_STATUS_EXT_CALL_PENDING 0x00000080UL |
| 9b747530 HC |
33 | #define SIGP_STATUS_INVALID_PARAMETER 0x00000100UL |
| 34 | #define SIGP_STATUS_INCORRECT_STATE 0x00000200UL | |
| 35 | #define SIGP_STATUS_NOT_RUNNING 0x00000400UL | |
| 36 | ||
| e7c46c66 HC |
37 | #ifndef __ASSEMBLY__ |
| 38 | ||
| a62bc073 MH |
39 | static inline int __pcpu_sigp(u16 addr, u8 order, unsigned long parm, |
| 40 | u32 *status) | |
| e7c46c66 | 41 | { |
| a62bc073 | 42 | register unsigned long reg1 asm ("1") = parm; |
| e7c46c66 HC |
43 | int cc; |
| 44 | ||
| 45 | asm volatile( | |
| 46 | " sigp %1,%2,0(%3)\n" | |
| 47 | " ipm %0\n" | |
| 48 | " srl %0,28\n" | |
| 49 | : "=d" (cc), "+d" (reg1) : "d" (addr), "a" (order) : "cc"); | |
| 50 | if (status && cc == 1) | |
| 51 | *status = reg1; | |
| 52 | return cc; | |
| 53 | } | |
| 54 | ||
| 55 | #endif /* __ASSEMBLY__ */ | |
| 56 | ||
| 9b747530 | 57 | #endif /* __S390_ASM_SIGP_H */ |