Commit | Line | Data |
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881730ad HC |
1 | /* |
2 | * Extract CPU cache information and expose them via sysfs. | |
3 | * | |
4 | * Copyright IBM Corp. 2012 | |
5 | * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> | |
6 | */ | |
7 | ||
6668022c | 8 | #include <linux/seq_file.h> |
881730ad | 9 | #include <linux/cpu.h> |
d97d929f | 10 | #include <linux/cacheinfo.h> |
881730ad HC |
11 | #include <asm/facility.h> |
12 | ||
881730ad HC |
13 | enum { |
14 | CACHE_SCOPE_NOTEXISTS, | |
15 | CACHE_SCOPE_PRIVATE, | |
16 | CACHE_SCOPE_SHARED, | |
17 | CACHE_SCOPE_RESERVED, | |
18 | }; | |
19 | ||
20 | enum { | |
d97d929f SH |
21 | CTYPE_SEPARATE, |
22 | CTYPE_DATA, | |
23 | CTYPE_INSTRUCTION, | |
24 | CTYPE_UNIFIED, | |
881730ad HC |
25 | }; |
26 | ||
27 | enum { | |
28 | EXTRACT_TOPOLOGY, | |
29 | EXTRACT_LINE_SIZE, | |
30 | EXTRACT_SIZE, | |
31 | EXTRACT_ASSOCIATIVITY, | |
32 | }; | |
33 | ||
34 | enum { | |
35 | CACHE_TI_UNIFIED = 0, | |
d18f99c2 HC |
36 | CACHE_TI_DATA = 0, |
37 | CACHE_TI_INSTRUCTION, | |
881730ad HC |
38 | }; |
39 | ||
40 | struct cache_info { | |
41 | unsigned char : 4; | |
42 | unsigned char scope : 2; | |
43 | unsigned char type : 2; | |
44 | }; | |
45 | ||
46 | #define CACHE_MAX_LEVEL 8 | |
881730ad HC |
47 | union cache_topology { |
48 | struct cache_info ci[CACHE_MAX_LEVEL]; | |
49 | unsigned long long raw; | |
50 | }; | |
51 | ||
52 | static const char * const cache_type_string[] = { | |
d97d929f | 53 | "", |
881730ad | 54 | "Instruction", |
d97d929f SH |
55 | "Data", |
56 | "", | |
881730ad HC |
57 | "Unified", |
58 | }; | |
59 | ||
d97d929f SH |
60 | static const enum cache_type cache_type_map[] = { |
61 | [CTYPE_SEPARATE] = CACHE_TYPE_SEPARATE, | |
62 | [CTYPE_DATA] = CACHE_TYPE_DATA, | |
63 | [CTYPE_INSTRUCTION] = CACHE_TYPE_INST, | |
64 | [CTYPE_UNIFIED] = CACHE_TYPE_UNIFIED, | |
65 | }; | |
881730ad | 66 | |
6668022c HC |
67 | void show_cacheinfo(struct seq_file *m) |
68 | { | |
45cce4cc | 69 | struct cpu_cacheinfo *this_cpu_ci; |
d97d929f | 70 | struct cacheinfo *cache; |
45cce4cc | 71 | int idx; |
6668022c | 72 | |
45cce4cc HC |
73 | get_online_cpus(); |
74 | this_cpu_ci = get_cpu_cacheinfo(cpumask_any(cpu_online_mask)); | |
d97d929f SH |
75 | for (idx = 0; idx < this_cpu_ci->num_leaves; idx++) { |
76 | cache = this_cpu_ci->info_list + idx; | |
77 | seq_printf(m, "cache%-11d: ", idx); | |
6668022c HC |
78 | seq_printf(m, "level=%d ", cache->level); |
79 | seq_printf(m, "type=%s ", cache_type_string[cache->type]); | |
d97d929f SH |
80 | seq_printf(m, "scope=%s ", |
81 | cache->disable_sysfs ? "Shared" : "Private"); | |
82 | seq_printf(m, "size=%dK ", cache->size >> 10); | |
83 | seq_printf(m, "line_size=%u ", cache->coherency_line_size); | |
84 | seq_printf(m, "associativity=%d", cache->ways_of_associativity); | |
6668022c | 85 | seq_puts(m, "\n"); |
6668022c | 86 | } |
45cce4cc | 87 | put_online_cpus(); |
6668022c HC |
88 | } |
89 | ||
d97d929f SH |
90 | static inline enum cache_type get_cache_type(struct cache_info *ci, int level) |
91 | { | |
92 | if (level >= CACHE_MAX_LEVEL) | |
93 | return CACHE_TYPE_NOCACHE; | |
d97d929f | 94 | ci += level; |
d97d929f SH |
95 | if (ci->scope != CACHE_SCOPE_SHARED && ci->scope != CACHE_SCOPE_PRIVATE) |
96 | return CACHE_TYPE_NOCACHE; | |
d97d929f SH |
97 | return cache_type_map[ci->type]; |
98 | } | |
99 | ||
881730ad HC |
100 | static inline unsigned long ecag(int ai, int li, int ti) |
101 | { | |
102 | unsigned long cmd, val; | |
103 | ||
104 | cmd = ai << 4 | li << 1 | ti; | |
105 | asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */ | |
106 | : "=d" (val) : "a" (cmd)); | |
107 | return val; | |
108 | } | |
109 | ||
d97d929f | 110 | static void ci_leaf_init(struct cacheinfo *this_leaf, int private, |
4fd4f1c7 | 111 | enum cache_type type, unsigned int level, int cpu) |
881730ad | 112 | { |
d97d929f | 113 | int ti, num_sets; |
881730ad | 114 | |
d97d929f | 115 | if (type == CACHE_TYPE_INST) |
d18f99c2 HC |
116 | ti = CACHE_TI_INSTRUCTION; |
117 | else | |
118 | ti = CACHE_TI_UNIFIED; | |
d97d929f SH |
119 | this_leaf->level = level + 1; |
120 | this_leaf->type = type; | |
121 | this_leaf->coherency_line_size = ecag(EXTRACT_LINE_SIZE, level, ti); | |
f4dce5c9 | 122 | this_leaf->ways_of_associativity = ecag(EXTRACT_ASSOCIATIVITY, level, ti); |
d97d929f | 123 | this_leaf->size = ecag(EXTRACT_SIZE, level, ti); |
d97d929f SH |
124 | num_sets = this_leaf->size / this_leaf->coherency_line_size; |
125 | num_sets /= this_leaf->ways_of_associativity; | |
126 | this_leaf->number_of_sets = num_sets; | |
127 | cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map); | |
128 | if (!private) | |
129 | this_leaf->disable_sysfs = true; | |
881730ad | 130 | } |
881730ad | 131 | |
d97d929f | 132 | int init_cache_level(unsigned int cpu) |
881730ad | 133 | { |
d97d929f SH |
134 | struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
135 | unsigned int level = 0, leaves = 0; | |
136 | union cache_topology ct; | |
137 | enum cache_type ctype; | |
881730ad | 138 | |
d97d929f SH |
139 | if (!this_cpu_ci) |
140 | return -EINVAL; | |
d97d929f SH |
141 | ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0); |
142 | do { | |
143 | ctype = get_cache_type(&ct.ci[0], level); | |
144 | if (ctype == CACHE_TYPE_NOCACHE) | |
6668022c | 145 | break; |
d97d929f SH |
146 | /* Separate instruction and data caches */ |
147 | leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1; | |
148 | } while (++level < CACHE_MAX_LEVEL); | |
d97d929f SH |
149 | this_cpu_ci->num_levels = level; |
150 | this_cpu_ci->num_leaves = leaves; | |
d97d929f | 151 | return 0; |
881730ad HC |
152 | } |
153 | ||
d97d929f | 154 | int populate_cache_leaves(unsigned int cpu) |
881730ad | 155 | { |
f4dce5c9 HC |
156 | struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); |
157 | struct cacheinfo *this_leaf = this_cpu_ci->info_list; | |
d97d929f SH |
158 | unsigned int level, idx, pvt; |
159 | union cache_topology ct; | |
160 | enum cache_type ctype; | |
881730ad | 161 | |
d97d929f SH |
162 | ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0); |
163 | for (idx = 0, level = 0; level < this_cpu_ci->num_levels && | |
164 | idx < this_cpu_ci->num_leaves; idx++, level++) { | |
165 | if (!this_leaf) | |
166 | return -EINVAL; | |
d97d929f SH |
167 | pvt = (ct.ci[level].scope == CACHE_SCOPE_PRIVATE) ? 1 : 0; |
168 | ctype = get_cache_type(&ct.ci[0], level); | |
169 | if (ctype == CACHE_TYPE_SEPARATE) { | |
4fd4f1c7 HC |
170 | ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_DATA, level, cpu); |
171 | ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_INST, level, cpu); | |
d97d929f | 172 | } else { |
4fd4f1c7 | 173 | ci_leaf_init(this_leaf++, pvt, ctype, level, cpu); |
d97d929f | 174 | } |
881730ad | 175 | } |
881730ad HC |
176 | return 0; |
177 | } |