s390/cacheinfo: fix shared cpu masks
[deliverable/linux.git] / arch / s390 / kernel / cache.c
CommitLineData
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1/*
2 * Extract CPU cache information and expose them via sysfs.
3 *
4 * Copyright IBM Corp. 2012
5 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
6 */
7
6668022c 8#include <linux/seq_file.h>
881730ad 9#include <linux/cpu.h>
d97d929f 10#include <linux/cacheinfo.h>
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11#include <asm/facility.h>
12
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13enum {
14 CACHE_SCOPE_NOTEXISTS,
15 CACHE_SCOPE_PRIVATE,
16 CACHE_SCOPE_SHARED,
17 CACHE_SCOPE_RESERVED,
18};
19
20enum {
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21 CTYPE_SEPARATE,
22 CTYPE_DATA,
23 CTYPE_INSTRUCTION,
24 CTYPE_UNIFIED,
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25};
26
27enum {
28 EXTRACT_TOPOLOGY,
29 EXTRACT_LINE_SIZE,
30 EXTRACT_SIZE,
31 EXTRACT_ASSOCIATIVITY,
32};
33
34enum {
35 CACHE_TI_UNIFIED = 0,
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36 CACHE_TI_DATA = 0,
37 CACHE_TI_INSTRUCTION,
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38};
39
40struct cache_info {
41 unsigned char : 4;
42 unsigned char scope : 2;
43 unsigned char type : 2;
44};
45
46#define CACHE_MAX_LEVEL 8
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47union cache_topology {
48 struct cache_info ci[CACHE_MAX_LEVEL];
49 unsigned long long raw;
50};
51
52static const char * const cache_type_string[] = {
d97d929f 53 "",
881730ad 54 "Instruction",
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55 "Data",
56 "",
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57 "Unified",
58};
59
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60static const enum cache_type cache_type_map[] = {
61 [CTYPE_SEPARATE] = CACHE_TYPE_SEPARATE,
62 [CTYPE_DATA] = CACHE_TYPE_DATA,
63 [CTYPE_INSTRUCTION] = CACHE_TYPE_INST,
64 [CTYPE_UNIFIED] = CACHE_TYPE_UNIFIED,
65};
881730ad 66
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67void show_cacheinfo(struct seq_file *m)
68{
45cce4cc 69 struct cpu_cacheinfo *this_cpu_ci;
d97d929f 70 struct cacheinfo *cache;
45cce4cc 71 int idx;
6668022c 72
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73 get_online_cpus();
74 this_cpu_ci = get_cpu_cacheinfo(cpumask_any(cpu_online_mask));
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75 for (idx = 0; idx < this_cpu_ci->num_leaves; idx++) {
76 cache = this_cpu_ci->info_list + idx;
77 seq_printf(m, "cache%-11d: ", idx);
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78 seq_printf(m, "level=%d ", cache->level);
79 seq_printf(m, "type=%s ", cache_type_string[cache->type]);
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80 seq_printf(m, "scope=%s ",
81 cache->disable_sysfs ? "Shared" : "Private");
82 seq_printf(m, "size=%dK ", cache->size >> 10);
83 seq_printf(m, "line_size=%u ", cache->coherency_line_size);
84 seq_printf(m, "associativity=%d", cache->ways_of_associativity);
6668022c 85 seq_puts(m, "\n");
6668022c 86 }
45cce4cc 87 put_online_cpus();
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88}
89
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90static inline enum cache_type get_cache_type(struct cache_info *ci, int level)
91{
92 if (level >= CACHE_MAX_LEVEL)
93 return CACHE_TYPE_NOCACHE;
94
95 ci += level;
96
97 if (ci->scope != CACHE_SCOPE_SHARED && ci->scope != CACHE_SCOPE_PRIVATE)
98 return CACHE_TYPE_NOCACHE;
99
100 return cache_type_map[ci->type];
101}
102
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103static inline unsigned long ecag(int ai, int li, int ti)
104{
105 unsigned long cmd, val;
106
107 cmd = ai << 4 | li << 1 | ti;
108 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */
109 : "=d" (val) : "a" (cmd));
110 return val;
111}
112
d97d929f 113static void ci_leaf_init(struct cacheinfo *this_leaf, int private,
4fd4f1c7 114 enum cache_type type, unsigned int level, int cpu)
881730ad 115{
d97d929f 116 int ti, num_sets;
881730ad 117
d97d929f 118 if (type == CACHE_TYPE_INST)
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119 ti = CACHE_TI_INSTRUCTION;
120 else
121 ti = CACHE_TI_UNIFIED;
881730ad 122
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123 this_leaf->level = level + 1;
124 this_leaf->type = type;
125 this_leaf->coherency_line_size = ecag(EXTRACT_LINE_SIZE, level, ti);
126 this_leaf->ways_of_associativity = ecag(EXTRACT_ASSOCIATIVITY,
127 level, ti);
128 this_leaf->size = ecag(EXTRACT_SIZE, level, ti);
881730ad 129
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130 num_sets = this_leaf->size / this_leaf->coherency_line_size;
131 num_sets /= this_leaf->ways_of_associativity;
132 this_leaf->number_of_sets = num_sets;
133 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
134 if (!private)
135 this_leaf->disable_sysfs = true;
881730ad 136}
881730ad 137
d97d929f 138int init_cache_level(unsigned int cpu)
881730ad 139{
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140 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
141 unsigned int level = 0, leaves = 0;
142 union cache_topology ct;
143 enum cache_type ctype;
881730ad 144
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145 if (!this_cpu_ci)
146 return -EINVAL;
881730ad 147
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148 ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);
149 do {
150 ctype = get_cache_type(&ct.ci[0], level);
151 if (ctype == CACHE_TYPE_NOCACHE)
6668022c 152 break;
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153 /* Separate instruction and data caches */
154 leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1;
155 } while (++level < CACHE_MAX_LEVEL);
881730ad 156
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157 this_cpu_ci->num_levels = level;
158 this_cpu_ci->num_leaves = leaves;
881730ad 159
d97d929f 160 return 0;
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161}
162
d97d929f 163int populate_cache_leaves(unsigned int cpu)
881730ad 164{
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165 unsigned int level, idx, pvt;
166 union cache_topology ct;
167 enum cache_type ctype;
168 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
169 struct cacheinfo *this_leaf = this_cpu_ci->info_list;
881730ad 170
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171 ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);
172 for (idx = 0, level = 0; level < this_cpu_ci->num_levels &&
173 idx < this_cpu_ci->num_leaves; idx++, level++) {
174 if (!this_leaf)
175 return -EINVAL;
176
177 pvt = (ct.ci[level].scope == CACHE_SCOPE_PRIVATE) ? 1 : 0;
178 ctype = get_cache_type(&ct.ci[0], level);
179 if (ctype == CACHE_TYPE_SEPARATE) {
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180 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_DATA, level, cpu);
181 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_INST, level, cpu);
d97d929f 182 } else {
4fd4f1c7 183 ci_leaf_init(this_leaf++, pvt, ctype, level, cpu);
d97d929f 184 }
881730ad 185 }
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186 return 0;
187}
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