Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/entry.S | |
3 | * S390 low-level entry points. | |
4 | * | |
54dfe5dd | 5 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
2bc89b5e | 12 | #include <linux/init.h> |
144d634a | 13 | #include <linux/linkage.h> |
1da177e4 | 14 | #include <asm/cache.h> |
1da177e4 LT |
15 | #include <asm/errno.h> |
16 | #include <asm/ptrace.h> | |
17 | #include <asm/thread_info.h> | |
0013a854 | 18 | #include <asm/asm-offsets.h> |
1da177e4 LT |
19 | #include <asm/unistd.h> |
20 | #include <asm/page.h> | |
21 | ||
22 | /* | |
23 | * Stack layout for the system_call stack entry. | |
24 | * The first few entries are identical to the user_regs_struct. | |
25 | */ | |
25d83cbf HC |
26 | SP_PTREGS = STACK_FRAME_OVERHEAD |
27 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
28 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
29 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
30 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 | |
31 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
32 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 | |
33 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
34 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 | |
35 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
36 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 | |
37 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
38 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36 | |
39 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
40 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44 | |
41 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
42 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52 | |
43 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
44 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60 | |
45 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
20b40a79 | 46 | SP_SVC_CODE = STACK_FRAME_OVERHEAD + __PT_SVC_CODE |
25d83cbf | 47 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE |
1da177e4 | 48 | |
753c4dd6 | 49 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
b6ef5bb3 | 50 | _TIF_MCCK_PENDING | _TIF_PER_TRAP ) |
753c4dd6 | 51 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 52 | _TIF_MCCK_PENDING) |
b6ef5bb3 MS |
53 | _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ |
54 | _TIF_SYSCALL_TRACEPOINT) | |
1da177e4 LT |
55 | |
56 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
57 | STACK_SIZE = 1 << STACK_SHIFT | |
58 | ||
59 | #define BASED(name) name-system_call(%r13) | |
60 | ||
1f194a4c HC |
61 | #ifdef CONFIG_TRACE_IRQFLAGS |
62 | .macro TRACE_IRQS_ON | |
50bec4ce HC |
63 | basr %r2,%r0 |
64 | l %r1,BASED(.Ltrace_irq_on_caller) | |
1f194a4c HC |
65 | basr %r14,%r1 |
66 | .endm | |
67 | ||
68 | .macro TRACE_IRQS_OFF | |
50bec4ce HC |
69 | basr %r2,%r0 |
70 | l %r1,BASED(.Ltrace_irq_off_caller) | |
1f194a4c HC |
71 | basr %r14,%r1 |
72 | .endm | |
73 | #else | |
74 | #define TRACE_IRQS_ON | |
75 | #define TRACE_IRQS_OFF | |
411788ea HC |
76 | #endif |
77 | ||
78 | #ifdef CONFIG_LOCKDEP | |
79 | .macro LOCKDEP_SYS_EXIT | |
80 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
81 | jz 0f | |
82 | l %r1,BASED(.Llockdep_sys_exit) | |
83 | basr %r14,%r1 | |
84 | 0: | |
85 | .endm | |
86 | #else | |
523b44cf | 87 | #define LOCKDEP_SYS_EXIT |
1f194a4c HC |
88 | #endif |
89 | ||
1da177e4 LT |
90 | /* |
91 | * Register usage in interrupt handlers: | |
92 | * R9 - pointer to current task structure | |
93 | * R13 - pointer to literal pool | |
94 | * R14 - return register for function calls | |
95 | * R15 - kernel stack pointer | |
96 | */ | |
97 | ||
25d83cbf | 98 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum |
1da177e4 LT |
99 | lm %r10,%r11,\lc_from |
100 | sl %r10,\lc_to | |
101 | sl %r11,\lc_to+4 | |
102 | bc 3,BASED(0f) | |
103 | sl %r10,BASED(.Lc_1) | |
104 | 0: al %r10,\lc_sum | |
105 | al %r11,\lc_sum+4 | |
106 | bc 12,BASED(1f) | |
107 | al %r10,BASED(.Lc_1) | |
108 | 1: stm %r10,%r11,\lc_sum | |
109 | .endm | |
1da177e4 | 110 | |
1de3447a | 111 | .macro SAVE_ALL_SVC psworg,savearea |
1da177e4 LT |
112 | stm %r12,%r15,\savearea |
113 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 | |
1de3447a MS |
114 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp |
115 | s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
1da177e4 LT |
116 | .endm |
117 | ||
1de3447a MS |
118 | .macro SAVE_ALL_BASE savearea |
119 | stm %r12,%r15,\savearea | |
120 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 | |
987ad70a MS |
121 | .endm |
122 | ||
1de3447a | 123 | .macro SAVE_ALL_PGM psworg,savearea |
1da177e4 | 124 | tm \psworg+1,0x01 # test problem state bit |
63b12246 | 125 | #ifdef CONFIG_CHECK_STACK |
1de3447a MS |
126 | bnz BASED(1f) |
127 | tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
128 | bnz BASED(2f) | |
129 | la %r12,\psworg | |
130 | b BASED(stack_overflow) | |
131 | #else | |
132 | bz BASED(2f) | |
63b12246 | 133 | #endif |
1de3447a MS |
134 | 1: l %r15,__LC_KERNEL_STACK # problem state -> load ksp |
135 | 2: s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
63b12246 MS |
136 | .endm |
137 | ||
138 | .macro SAVE_ALL_ASYNC psworg,savearea | |
1de3447a MS |
139 | stm %r12,%r15,\savearea |
140 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 | |
63b12246 | 141 | la %r12,\psworg |
1da177e4 LT |
142 | tm \psworg+1,0x01 # test problem state bit |
143 | bnz BASED(1f) # from user -> load async stack | |
144 | clc \psworg+4(4),BASED(.Lcritical_end) | |
145 | bhe BASED(0f) | |
146 | clc \psworg+4(4),BASED(.Lcritical_start) | |
147 | bl BASED(0f) | |
148 | l %r14,BASED(.Lcleanup_critical) | |
149 | basr %r14,%r14 | |
6add9f7f | 150 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
151 | bnz BASED(1f) |
152 | 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ? | |
153 | slr %r14,%r15 | |
154 | sra %r14,STACK_SHIFT | |
1da177e4 | 155 | #ifdef CONFIG_CHECK_STACK |
1de3447a MS |
156 | bnz BASED(1f) |
157 | tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
158 | bnz BASED(2f) | |
159 | b BASED(stack_overflow) | |
160 | #else | |
161 | bz BASED(2f) | |
1da177e4 | 162 | #endif |
1de3447a MS |
163 | 1: l %r15,__LC_ASYNC_STACK |
164 | 2: s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
77fa2245 HC |
165 | .endm |
166 | ||
1de3447a MS |
167 | .macro CREATE_STACK_FRAME savearea |
168 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) | |
1da177e4 | 169 | st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 |
1da177e4 | 170 | mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack |
1de3447a | 171 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack |
1da177e4 LT |
172 | .endm |
173 | ||
25d83cbf | 174 | .macro RESTORE_ALL psworg,sync |
ae6aa2ea | 175 | mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore |
1da177e4 | 176 | .if !\sync |
ae6aa2ea | 177 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 LT |
178 | .endif |
179 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user | |
c185b783 | 180 | stpt __LC_EXIT_TIMER |
ae6aa2ea | 181 | lpsw \psworg # back to caller |
1da177e4 LT |
182 | .endm |
183 | ||
1e54622e MS |
184 | .macro REENABLE_IRQS |
185 | mvc __SF_EMPTY(1,%r15),SP_PSW(%r15) | |
186 | ni __SF_EMPTY(%r15),0xbf | |
187 | ssm __SF_EMPTY(%r15) | |
188 | .endm | |
189 | ||
860dba45 MS |
190 | .section .kprobes.text, "ax" |
191 | ||
1da177e4 LT |
192 | /* |
193 | * Scheduler resume function, called by switch_to | |
194 | * gpr2 = (task_struct *) prev | |
195 | * gpr3 = (task_struct *) next | |
196 | * Returns: | |
197 | * gpr2 = prev | |
198 | */ | |
144d634a | 199 | ENTRY(__switch_to) |
25d83cbf | 200 | basr %r1,0 |
5e9a2692 MS |
201 | 0: l %r4,__THREAD_info(%r2) # get thread_info of prev |
202 | l %r5,__THREAD_info(%r3) # get thread_info of next | |
77fa2245 | 203 | tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? |
5e9a2692 MS |
204 | bz 1f-0b(%r1) |
205 | ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
206 | oi __TI_flags+3(%r5),_TIF_MCCK_PENDING # set it in next | |
207 | 1: stm %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task | |
208 | st %r15,__THREAD_ksp(%r2) # store kernel stack of prev | |
209 | l %r15,__THREAD_ksp(%r3) # load kernel stack of next | |
210 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
211 | lm %r6,%r15,__SF_GPRS(%r15) # load gprs of next task | |
212 | st %r3,__LC_CURRENT # store task struct of next | |
f2db2e6c | 213 | mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next |
5e9a2692 MS |
214 | st %r5,__LC_THREAD_INFO # store thread info of next |
215 | ahi %r5,STACK_SIZE # end of kernel stack of next | |
216 | st %r5,__LC_KERNEL_STACK # store end of kernel stack | |
1da177e4 LT |
217 | br %r14 |
218 | ||
219 | __critical_start: | |
220 | /* | |
221 | * SVC interrupt handler routine. System calls are synchronous events and | |
222 | * are executed with interrupts enabled. | |
223 | */ | |
224 | ||
144d634a | 225 | ENTRY(system_call) |
c185b783 | 226 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 | 227 | sysc_saveall: |
987ad70a | 228 | SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1de3447a | 229 | CREATE_STACK_FRAME __LC_SAVE_AREA |
b6ef5bb3 | 230 | l %r12,__LC_THREAD_INFO # load pointer to thread_info struct |
1de3447a | 231 | mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW |
20b40a79 | 232 | mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC |
b6ef5bb3 | 233 | oi __TI_flags+3(%r12),_TIF_SYSCALL |
1da177e4 | 234 | sysc_vtime: |
1da177e4 LT |
235 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
236 | sysc_stime: | |
237 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
238 | sysc_update: | |
239 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 | 240 | sysc_do_svc: |
1de3447a | 241 | xr %r7,%r7 |
20b40a79 | 242 | icm %r7,3,SP_SVC_CODE+2(%r15)# load svc number and test for svc 0 |
25d83cbf | 243 | bnz BASED(sysc_nr_ok) # svc number > 0 |
1da177e4 LT |
244 | # svc 0: system call number in %r1 |
245 | cl %r1,BASED(.Lnr_syscalls) | |
246 | bnl BASED(sysc_nr_ok) | |
20b40a79 | 247 | sth %r1,SP_SVC_CODE+2(%r15) |
25d83cbf | 248 | lr %r7,%r1 # copy svc number to %r7 |
1da177e4 | 249 | sysc_nr_ok: |
59da2139 | 250 | sll %r7,2 # svc number *4 |
1de3447a | 251 | l %r10,BASED(.Lsysc_table) |
b6ef5bb3 | 252 | tm __TI_flags+2(%r12),_TIF_TRACE >> 8 |
baa07158 | 253 | mvc SP_ARGS(4,%r15),SP_R7(%r15) |
1de3447a | 254 | l %r8,0(%r7,%r10) # get system call addr. |
25d83cbf HC |
255 | bnz BASED(sysc_tracesys) |
256 | basr %r14,%r8 # call sys_xxxx | |
257 | st %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
1da177e4 LT |
258 | |
259 | sysc_return: | |
6a2df3a8 MS |
260 | LOCKDEP_SYS_EXIT |
261 | sysc_tif: | |
b6ef5bb3 MS |
262 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
263 | bno BASED(sysc_restore) | |
1de3447a | 264 | tm __TI_flags+3(%r12),_TIF_WORK_SVC |
1da177e4 | 265 | bnz BASED(sysc_work) # there is work to do (signals etc.) |
b6ef5bb3 | 266 | ni __TI_flags+3(%r12),255-_TIF_SYSCALL |
411788ea | 267 | sysc_restore: |
25d83cbf | 268 | RESTORE_ALL __LC_RETURN_PSW,1 |
411788ea HC |
269 | sysc_done: |
270 | ||
43d399d2 MS |
271 | # |
272 | # One of the work bits is on. Find out which one. | |
273 | # | |
b6ef5bb3 | 274 | sysc_work: |
1de3447a | 275 | tm __TI_flags+3(%r12),_TIF_MCCK_PENDING |
77fa2245 | 276 | bo BASED(sysc_mcck_pending) |
1de3447a | 277 | tm __TI_flags+3(%r12),_TIF_NEED_RESCHED |
1da177e4 | 278 | bo BASED(sysc_reschedule) |
1de3447a | 279 | tm __TI_flags+3(%r12),_TIF_SIGPENDING |
43d399d2 | 280 | bo BASED(sysc_sigpending) |
1de3447a | 281 | tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME |
43d399d2 | 282 | bo BASED(sysc_notify_resume) |
5e9a2692 | 283 | tm __TI_flags+3(%r12),_TIF_PER_TRAP |
1da177e4 | 284 | bo BASED(sysc_singlestep) |
43d399d2 | 285 | b BASED(sysc_return) # beware of critical section cleanup |
1da177e4 LT |
286 | |
287 | # | |
288 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
289 | # |
290 | sysc_reschedule: | |
291 | l %r1,BASED(.Lschedule) | |
6a2df3a8 | 292 | la %r14,BASED(sysc_return) |
25d83cbf | 293 | br %r1 # call scheduler |
1da177e4 | 294 | |
77fa2245 HC |
295 | # |
296 | # _TIF_MCCK_PENDING is set, call handler | |
297 | # | |
298 | sysc_mcck_pending: | |
299 | l %r1,BASED(.Ls390_handle_mcck) | |
6a2df3a8 | 300 | la %r14,BASED(sysc_return) |
77fa2245 HC |
301 | br %r1 # TIF bit will be cleared by handler |
302 | ||
1da177e4 | 303 | # |
02a029b3 | 304 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 305 | # |
25d83cbf | 306 | sysc_sigpending: |
5e9a2692 | 307 | ni __TI_flags+3(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP |
25d83cbf HC |
308 | la %r2,SP_PTREGS(%r15) # load pt_regs |
309 | l %r1,BASED(.Ldo_signal) | |
310 | basr %r14,%r1 # call do_signal | |
b6ef5bb3 MS |
311 | tm __TI_flags+3(%r12),_TIF_SYSCALL |
312 | bno BASED(sysc_return) | |
313 | lm %r2,%r6,SP_R2(%r15) # load svc arguments | |
314 | xr %r7,%r7 # svc 0 returns -ENOSYS | |
315 | clc SP_SVC_CODE+2(2,%r15),BASED(.Lnr_syscalls+2) | |
316 | bnl BASED(sysc_nr_ok) # invalid svc number -> do svc 0 | |
317 | icm %r7,3,SP_SVC_CODE+2(%r15)# load new svc number | |
318 | b BASED(sysc_nr_ok) # restart svc | |
1da177e4 | 319 | |
753c4dd6 MS |
320 | # |
321 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
322 | # | |
323 | sysc_notify_resume: | |
324 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
325 | l %r1,BASED(.Ldo_notify_resume) | |
6a2df3a8 | 326 | la %r14,BASED(sysc_return) |
753c4dd6 MS |
327 | br %r1 # call do_notify_resume |
328 | ||
1da177e4 | 329 | # |
5e9a2692 | 330 | # _TIF_PER_TRAP is set, call do_per_trap |
1da177e4 LT |
331 | # |
332 | sysc_singlestep: | |
b6ef5bb3 | 333 | ni __TI_flags+3(%r12),255-(_TIF_SYSCALL | _TIF_PER_TRAP) |
1da177e4 LT |
334 | la %r2,SP_PTREGS(%r15) # address of register-save area |
335 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
6a2df3a8 | 336 | la %r14,BASED(sysc_return) # load adr. of system return |
5e9a2692 | 337 | br %r1 # branch to do_per_trap |
1da177e4 | 338 | |
1da177e4 | 339 | # |
753c4dd6 MS |
340 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
341 | # and after the system call | |
1da177e4 LT |
342 | # |
343 | sysc_tracesys: | |
753c4dd6 | 344 | l %r1,BASED(.Ltrace_entry) |
25d83cbf | 345 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 | 346 | la %r3,0 |
1de3447a | 347 | xr %r0,%r0 |
20b40a79 | 348 | icm %r0,3,SP_SVC_CODE(%r15) |
1de3447a | 349 | st %r0,SP_R2(%r15) |
1da177e4 | 350 | basr %r14,%r1 |
753c4dd6 | 351 | cl %r2,BASED(.Lnr_syscalls) |
1da177e4 | 352 | bnl BASED(sysc_tracenogo) |
753c4dd6 | 353 | lr %r7,%r2 |
59da2139 | 354 | sll %r7,2 # svc number *4 |
1de3447a | 355 | l %r8,0(%r7,%r10) |
1da177e4 LT |
356 | sysc_tracego: |
357 | lm %r3,%r6,SP_R3(%r15) | |
baa07158 | 358 | mvc SP_ARGS(4,%r15),SP_R7(%r15) |
1da177e4 | 359 | l %r2,SP_ORIG_R2(%r15) |
25d83cbf HC |
360 | basr %r14,%r8 # call sys_xxx |
361 | st %r2,SP_R2(%r15) # store return value | |
1da177e4 | 362 | sysc_tracenogo: |
b6ef5bb3 | 363 | tm __TI_flags+2(%r12),_TIF_TRACE >> 8 |
25d83cbf | 364 | bz BASED(sysc_return) |
753c4dd6 | 365 | l %r1,BASED(.Ltrace_exit) |
25d83cbf | 366 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 LT |
367 | la %r14,BASED(sysc_return) |
368 | br %r1 | |
369 | ||
370 | # | |
371 | # a new process exits the kernel with ret_from_fork | |
372 | # | |
144d634a | 373 | ENTRY(ret_from_fork) |
1da177e4 | 374 | l %r13,__LC_SVC_NEW_PSW+4 |
1de3447a | 375 | l %r12,__LC_THREAD_INFO # load pointer to thread_info struct |
1da177e4 LT |
376 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? |
377 | bo BASED(0f) | |
378 | st %r15,SP_R15(%r15) # store stack pointer for new kthread | |
25d83cbf HC |
379 | 0: l %r1,BASED(.Lschedtail) |
380 | basr %r14,%r1 | |
1f194a4c | 381 | TRACE_IRQS_ON |
25d83cbf | 382 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
8f2961c3 | 383 | b BASED(sysc_tracenogo) |
1da177e4 LT |
384 | |
385 | # | |
03ff9a23 MS |
386 | # kernel_execve function needs to deal with pt_regs that is not |
387 | # at the usual place | |
1da177e4 | 388 | # |
144d634a | 389 | ENTRY(kernel_execve) |
03ff9a23 MS |
390 | stm %r12,%r15,48(%r15) |
391 | lr %r14,%r15 | |
392 | l %r13,__LC_SVC_NEW_PSW+4 | |
393 | s %r15,BASED(.Lc_spsize) | |
394 | st %r14,__SF_BACKCHAIN(%r15) | |
395 | la %r12,SP_PTREGS(%r15) | |
396 | xc 0(__PT_SIZE,%r12),0(%r12) | |
397 | l %r1,BASED(.Ldo_execve) | |
398 | lr %r5,%r12 | |
399 | basr %r14,%r1 | |
400 | ltr %r2,%r2 | |
401 | be BASED(0f) | |
402 | a %r15,BASED(.Lc_spsize) | |
403 | lm %r12,%r15,48(%r15) | |
404 | br %r14 | |
405 | # execve succeeded. | |
406 | 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts | |
407 | l %r15,__LC_KERNEL_STACK # load ksp | |
408 | s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
03ff9a23 | 409 | mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs |
1de3447a | 410 | l %r12,__LC_THREAD_INFO |
03ff9a23 MS |
411 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) |
412 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
413 | l %r1,BASED(.Lexecve_tail) | |
414 | basr %r14,%r1 | |
415 | b BASED(sysc_return) | |
1da177e4 LT |
416 | |
417 | /* | |
418 | * Program check handler routine | |
419 | */ | |
420 | ||
144d634a | 421 | ENTRY(pgm_check_handler) |
1da177e4 LT |
422 | /* |
423 | * First we need to check for a special case: | |
424 | * Single stepping an instruction that disables the PER event mask will | |
425 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
426 | * For a single stepped SVC the program check handler gets control after | |
427 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
428 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
429 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
430 | * if we have to load the kernel stack register. | |
431 | * For every other possible cause for PER event without the PER mask set | |
432 | * we just ignore the PER event (FIXME: is there anything we have to do | |
433 | * for LPSW?). | |
434 | */ | |
c185b783 | 435 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 | 436 | SAVE_ALL_BASE __LC_SAVE_AREA |
25d83cbf HC |
437 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
438 | bnz BASED(pgm_per) # got per exception -> special case | |
1de3447a MS |
439 | SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
440 | CREATE_STACK_FRAME __LC_SAVE_AREA | |
1de3447a MS |
441 | mvc SP_PSW(8,%r15),__LC_PGM_OLD_PSW |
442 | l %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
1da177e4 LT |
443 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
444 | bz BASED(pgm_no_vtime) | |
445 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
446 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
447 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
448 | pgm_no_vtime: | |
25d83cbf | 449 | l %r3,__LC_PGM_ILC # load program interruption code |
1e54622e MS |
450 | l %r4,__LC_TRANS_EXC_CODE |
451 | REENABLE_IRQS | |
1da177e4 LT |
452 | la %r8,0x7f |
453 | nr %r8,%r3 | |
25d83cbf | 454 | sll %r8,2 |
1de3447a MS |
455 | l %r1,BASED(.Ljump_table) |
456 | l %r1,0(%r8,%r1) # load address of handler routine | |
25d83cbf | 457 | la %r2,SP_PTREGS(%r15) # address of register-save area |
1de3447a | 458 | basr %r14,%r1 # branch to interrupt-handler |
6a2df3a8 | 459 | pgm_exit: |
6a2df3a8 | 460 | b BASED(sysc_return) |
1da177e4 LT |
461 | |
462 | # | |
463 | # handle per exception | |
464 | # | |
465 | pgm_per: | |
25d83cbf HC |
466 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on |
467 | bnz BASED(pgm_per_std) # ok, normal per event from user space | |
1da177e4 | 468 | # ok its one of the special cases, now we need to find out which one |
25d83cbf HC |
469 | clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW |
470 | be BASED(pgm_svcper) | |
1da177e4 | 471 | # no interesting special case, ignore PER event |
25d83cbf HC |
472 | lm %r12,%r15,__LC_SAVE_AREA |
473 | lpsw 0x28 | |
1da177e4 LT |
474 | |
475 | # | |
476 | # Normal per exception | |
477 | # | |
478 | pgm_per_std: | |
1de3447a MS |
479 | SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
480 | CREATE_STACK_FRAME __LC_SAVE_AREA | |
481 | mvc SP_PSW(8,%r15),__LC_PGM_OLD_PSW | |
482 | l %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
1da177e4 LT |
483 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
484 | bz BASED(pgm_no_vtime2) | |
485 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
486 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
487 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
488 | pgm_no_vtime2: | |
1de3447a | 489 | l %r1,__TI_task(%r12) |
6a2df3a8 MS |
490 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
491 | bz BASED(kernel_per) | |
5e9a2692 MS |
492 | mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE |
493 | mvc __THREAD_per_address(4,%r1),__LC_PER_ADDRESS | |
494 | mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID | |
495 | oi __TI_flags+3(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP | |
25d83cbf | 496 | l %r3,__LC_PGM_ILC # load program interruption code |
1e54622e MS |
497 | l %r4,__LC_TRANS_EXC_CODE |
498 | REENABLE_IRQS | |
1da177e4 | 499 | la %r8,0x7f |
25d83cbf | 500 | nr %r8,%r3 # clear per-event-bit and ilc |
f5cdac27 | 501 | be BASED(pgm_exit2) # only per or per+check ? |
f5cdac27 | 502 | sll %r8,2 |
1de3447a MS |
503 | l %r1,BASED(.Ljump_table) |
504 | l %r1,0(%r8,%r1) # load address of handler routine | |
f5cdac27 | 505 | la %r2,SP_PTREGS(%r15) # address of register-save area |
1de3447a | 506 | basr %r14,%r1 # branch to interrupt-handler |
f5cdac27 | 507 | pgm_exit2: |
f5cdac27 | 508 | b BASED(sysc_return) |
1da177e4 LT |
509 | |
510 | # | |
511 | # it was a single stepped SVC that is causing all the trouble | |
512 | # | |
513 | pgm_svcper: | |
1de3447a MS |
514 | SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
515 | CREATE_STACK_FRAME __LC_SAVE_AREA | |
b6ef5bb3 | 516 | l %r12,__LC_THREAD_INFO # load pointer to thread_info struct |
1de3447a | 517 | mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW |
20b40a79 | 518 | mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC |
b6ef5bb3 | 519 | oi __TI_flags+3(%r12),(_TIF_SYSCALL | _TIF_PER_TRAP) |
1da177e4 LT |
520 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
521 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
522 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1de3447a | 523 | l %r8,__TI_task(%r12) |
5e9a2692 MS |
524 | mvc __THREAD_per_cause(2,%r8),__LC_PER_CAUSE |
525 | mvc __THREAD_per_address(4,%r8),__LC_PER_ADDRESS | |
526 | mvc __THREAD_per_paid(1,%r8),__LC_PER_PAID | |
1da177e4 | 527 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
6a2df3a8 | 528 | lm %r2,%r6,SP_R2(%r15) # load svc arguments |
1da177e4 LT |
529 | b BASED(sysc_do_svc) |
530 | ||
4ba069b8 MG |
531 | # |
532 | # per was called from kernel, must be kprobes | |
533 | # | |
534 | kernel_per: | |
9ec27080 | 535 | REENABLE_IRQS |
4ba069b8 MG |
536 | la %r2,SP_PTREGS(%r15) # address of register-save area |
537 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
6a2df3a8 MS |
538 | basr %r14,%r1 # branch to do_single_step |
539 | b BASED(pgm_exit) | |
4ba069b8 | 540 | |
1da177e4 LT |
541 | /* |
542 | * IO interrupt handler routine | |
543 | */ | |
544 | ||
144d634a | 545 | ENTRY(io_int_handler) |
1da177e4 | 546 | stck __LC_INT_CLOCK |
9cfb9b3c | 547 | stpt __LC_ASYNC_ENTER_TIMER |
63b12246 | 548 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
1de3447a MS |
549 | CREATE_STACK_FRAME __LC_SAVE_AREA+16 |
550 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack | |
551 | l %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
1da177e4 LT |
552 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
553 | bz BASED(io_no_vtime) | |
554 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
555 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
556 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
557 | io_no_vtime: | |
1f194a4c | 558 | TRACE_IRQS_OFF |
25d83cbf HC |
559 | l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ |
560 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
561 | basr %r14,%r1 # branch to standard irq handler | |
1da177e4 | 562 | io_return: |
6a2df3a8 MS |
563 | LOCKDEP_SYS_EXIT |
564 | TRACE_IRQS_ON | |
565 | io_tif: | |
1de3447a | 566 | tm __TI_flags+3(%r12),_TIF_WORK_INT |
25d83cbf | 567 | bnz BASED(io_work) # there is work to do (signals etc.) |
411788ea | 568 | io_restore: |
25d83cbf | 569 | RESTORE_ALL __LC_RETURN_PSW,0 |
ae6aa2ea | 570 | io_done: |
1da177e4 | 571 | |
2688905e | 572 | # |
43d399d2 MS |
573 | # There is work todo, find out in which context we have been interrupted: |
574 | # 1) if we return to user space we can do all _TIF_WORK_INT work | |
575 | # 2) if we return to kernel code and preemptive scheduling is enabled check | |
576 | # the preemption counter and if it is zero call preempt_schedule_irq | |
577 | # Before any work can be done, a switch to the kernel stack is required. | |
2688905e MS |
578 | # |
579 | io_work: | |
580 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
43d399d2 MS |
581 | bo BASED(io_work_user) # yes -> do resched & signal |
582 | #ifdef CONFIG_PREEMPT | |
2688905e | 583 | # check for preemptive scheduling |
1de3447a | 584 | icm %r0,15,__TI_precount(%r12) |
2688905e | 585 | bnz BASED(io_restore) # preemption disabled |
1de3447a | 586 | tm __TI_flags+3(%r12),_TIF_NEED_RESCHED |
6a2df3a8 | 587 | bno BASED(io_restore) |
43d399d2 | 588 | # switch to kernel stack |
1da177e4 LT |
589 | l %r1,SP_R15(%r15) |
590 | s %r1,BASED(.Lc_spsize) | |
591 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 592 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 | 593 | lr %r15,%r1 |
6a2df3a8 MS |
594 | # TRACE_IRQS_ON already done at io_return, call |
595 | # TRACE_IRQS_OFF to keep things symmetrical | |
596 | TRACE_IRQS_OFF | |
b8e7a54c | 597 | l %r1,BASED(.Lpreempt_schedule_irq) |
6a2df3a8 MS |
598 | basr %r14,%r1 # call preempt_schedule_irq |
599 | b BASED(io_return) | |
600 | #else | |
43d399d2 | 601 | b BASED(io_restore) |
6a2df3a8 | 602 | #endif |
1da177e4 | 603 | |
43d399d2 MS |
604 | # |
605 | # Need to do work before returning to userspace, switch to kernel stack | |
606 | # | |
2688905e | 607 | io_work_user: |
1da177e4 LT |
608 | l %r1,__LC_KERNEL_STACK |
609 | s %r1,BASED(.Lc_spsize) | |
610 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 611 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 | 612 | lr %r15,%r1 |
6a2df3a8 | 613 | |
1da177e4 LT |
614 | # |
615 | # One of the work bits is on. Find out which one. | |
43d399d2 | 616 | # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED |
25d83cbf | 617 | # and _TIF_MCCK_PENDING |
1da177e4 | 618 | # |
6a2df3a8 | 619 | io_work_tif: |
1de3447a | 620 | tm __TI_flags+3(%r12),_TIF_MCCK_PENDING |
25d83cbf | 621 | bo BASED(io_mcck_pending) |
1de3447a | 622 | tm __TI_flags+3(%r12),_TIF_NEED_RESCHED |
1da177e4 | 623 | bo BASED(io_reschedule) |
1de3447a | 624 | tm __TI_flags+3(%r12),_TIF_SIGPENDING |
43d399d2 | 625 | bo BASED(io_sigpending) |
1de3447a | 626 | tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME |
43d399d2 MS |
627 | bo BASED(io_notify_resume) |
628 | b BASED(io_return) # beware of critical section cleanup | |
1da177e4 | 629 | |
77fa2245 HC |
630 | # |
631 | # _TIF_MCCK_PENDING is set, call handler | |
632 | # | |
633 | io_mcck_pending: | |
6a2df3a8 | 634 | # TRACE_IRQS_ON already done at io_return |
77fa2245 | 635 | l %r1,BASED(.Ls390_handle_mcck) |
b771aeac | 636 | basr %r14,%r1 # TIF bit will be cleared by handler |
6a2df3a8 MS |
637 | TRACE_IRQS_OFF |
638 | b BASED(io_return) | |
77fa2245 | 639 | |
1da177e4 LT |
640 | # |
641 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
642 | # |
643 | io_reschedule: | |
6a2df3a8 | 644 | # TRACE_IRQS_ON already done at io_return |
25d83cbf HC |
645 | l %r1,BASED(.Lschedule) |
646 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
647 | basr %r14,%r1 # call scheduler | |
648 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 649 | TRACE_IRQS_OFF |
6a2df3a8 | 650 | b BASED(io_return) |
1da177e4 LT |
651 | |
652 | # | |
02a029b3 | 653 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 654 | # |
25d83cbf | 655 | io_sigpending: |
6a2df3a8 | 656 | # TRACE_IRQS_ON already done at io_return |
25d83cbf HC |
657 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
658 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
659 | l %r1,BASED(.Ldo_signal) | |
660 | basr %r14,%r1 # call do_signal | |
661 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 662 | TRACE_IRQS_OFF |
6a2df3a8 | 663 | b BASED(io_return) |
1da177e4 | 664 | |
753c4dd6 MS |
665 | # |
666 | # _TIF_SIGPENDING is set, call do_signal | |
667 | # | |
668 | io_notify_resume: | |
6a2df3a8 | 669 | # TRACE_IRQS_ON already done at io_return |
753c4dd6 MS |
670 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
671 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
672 | l %r1,BASED(.Ldo_notify_resume) | |
673 | basr %r14,%r1 # call do_signal | |
674 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
675 | TRACE_IRQS_OFF | |
6a2df3a8 | 676 | b BASED(io_return) |
753c4dd6 | 677 | |
1da177e4 LT |
678 | /* |
679 | * External interrupt handler routine | |
680 | */ | |
681 | ||
144d634a | 682 | ENTRY(ext_int_handler) |
1da177e4 | 683 | stck __LC_INT_CLOCK |
9cfb9b3c | 684 | stpt __LC_ASYNC_ENTER_TIMER |
63b12246 | 685 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
1de3447a MS |
686 | CREATE_STACK_FRAME __LC_SAVE_AREA+16 |
687 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack | |
688 | l %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
1da177e4 LT |
689 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
690 | bz BASED(ext_no_vtime) | |
691 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
692 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
693 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
694 | ext_no_vtime: | |
1f194a4c | 695 | TRACE_IRQS_OFF |
25d83cbf | 696 | la %r2,SP_PTREGS(%r15) # address of register-save area |
f6649a7e MS |
697 | l %r3,__LC_CPU_ADDRESS # get cpu address + interruption code |
698 | l %r4,__LC_EXT_PARAMS # get external parameters | |
1da177e4 LT |
699 | l %r1,BASED(.Ldo_extint) |
700 | basr %r14,%r1 | |
701 | b BASED(io_return) | |
702 | ||
ae6aa2ea MS |
703 | __critical_end: |
704 | ||
1da177e4 LT |
705 | /* |
706 | * Machine check handler routines | |
707 | */ | |
708 | ||
144d634a | 709 | ENTRY(mcck_int_handler) |
6377981f | 710 | stck __LC_MCCK_CLOCK |
77fa2245 HC |
711 | spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer |
712 | lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs | |
1da177e4 | 713 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
77fa2245 | 714 | la %r12,__LC_MCK_OLD_PSW |
25d83cbf | 715 | tm __LC_MCCK_CODE,0x80 # system damage? |
77fa2245 | 716 | bo BASED(mcck_int_main) # yes -> rest of mcck code invalid |
6377981f | 717 | mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA |
63b12246 MS |
718 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? |
719 | bo BASED(1f) | |
720 | la %r14,__LC_SYNC_ENTER_TIMER | |
721 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
722 | bl BASED(0f) | |
723 | la %r14,__LC_ASYNC_ENTER_TIMER | |
724 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
725 | bl BASED(0f) | |
726 | la %r14,__LC_EXIT_TIMER | |
727 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
728 | bl BASED(0f) | |
729 | la %r14,__LC_LAST_UPDATE_TIMER | |
730 | 0: spt 0(%r14) | |
6377981f | 731 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) |
c185b783 | 732 | 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 HC |
733 | bno BASED(mcck_int_main) # no -> skip cleanup critical |
734 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit | |
735 | bnz BASED(mcck_int_main) # from user -> load async stack | |
736 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) | |
737 | bhe BASED(mcck_int_main) | |
738 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) | |
739 | bl BASED(mcck_int_main) | |
740 | l %r14,BASED(.Lcleanup_critical) | |
741 | basr %r14,%r14 | |
742 | mcck_int_main: | |
743 | l %r14,__LC_PANIC_STACK # are we already on the panic stack? | |
744 | slr %r14,%r15 | |
745 | sra %r14,PAGE_SHIFT | |
746 | be BASED(0f) | |
747 | l %r15,__LC_PANIC_STACK # load panic stack | |
1de3447a MS |
748 | 0: s %r15,BASED(.Lc_spsize) # make room for registers & psw |
749 | CREATE_STACK_FRAME __LC_SAVE_AREA+32 | |
750 | mvc SP_PSW(8,%r15),0(%r12) | |
751 | l %r12,__LC_THREAD_INFO # load pointer to thread_info struct | |
25d83cbf | 752 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
ae6aa2ea | 753 | bno BASED(mcck_no_vtime) # no -> skip cleanup critical |
63b12246 | 754 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea | 755 | bz BASED(mcck_no_vtime) |
6377981f | 756 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER |
ae6aa2ea | 757 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER |
6377981f | 758 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER |
ae6aa2ea | 759 | mcck_no_vtime: |
77fa2245 | 760 | la %r2,SP_PTREGS(%r15) # load pt_regs |
25d83cbf HC |
761 | l %r1,BASED(.Ls390_mcck) |
762 | basr %r14,%r1 # call machine check handler | |
763 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
77fa2245 | 764 | bno BASED(mcck_return) |
25d83cbf | 765 | l %r1,__LC_KERNEL_STACK # switch to kernel stack |
77fa2245 HC |
766 | s %r1,BASED(.Lc_spsize) |
767 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 768 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
77fa2245 HC |
769 | lr %r15,%r1 |
770 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
1de3447a | 771 | tm __TI_flags+3(%r12),_TIF_MCCK_PENDING |
77fa2245 | 772 | bno BASED(mcck_return) |
1f194a4c | 773 | TRACE_IRQS_OFF |
77fa2245 HC |
774 | l %r1,BASED(.Ls390_handle_mcck) |
775 | basr %r14,%r1 # call machine check handler | |
1f194a4c | 776 | TRACE_IRQS_ON |
1da177e4 | 777 | mcck_return: |
63b12246 MS |
778 | mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW |
779 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
63b12246 MS |
780 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? |
781 | bno BASED(0f) | |
782 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
783 | stpt __LC_EXIT_TIMER | |
784 | lpsw __LC_RETURN_MCCK_PSW # back to caller | |
c185b783 | 785 | 0: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 |
63b12246 MS |
786 | lpsw __LC_RETURN_MCCK_PSW # back to caller |
787 | ||
25d83cbf | 788 | RESTORE_ALL __LC_RETURN_MCCK_PSW,0 |
1da177e4 | 789 | |
1da177e4 LT |
790 | /* |
791 | * Restart interruption handler, kick starter for additional CPUs | |
792 | */ | |
84b36a8e | 793 | #ifdef CONFIG_SMP |
2bc89b5e | 794 | __CPUINIT |
144d634a | 795 | ENTRY(restart_int_handler) |
5b409ed1 MS |
796 | basr %r1,0 |
797 | restart_base: | |
798 | spt restart_vtime-restart_base(%r1) | |
799 | stck __LC_LAST_UPDATE_CLOCK | |
800 | mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1) | |
801 | mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1) | |
25d83cbf HC |
802 | l %r15,__LC_SAVE_AREA+60 # load ksp |
803 | lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs | |
804 | lam %a0,%a15,__LC_AREGS_SAVE_AREA | |
805 | lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
5b409ed1 MS |
806 | l %r1,__LC_THREAD_INFO |
807 | mvc __LC_USER_TIMER(8),__TI_user_timer(%r1) | |
808 | mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1) | |
809 | xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER | |
25d83cbf HC |
810 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on |
811 | basr %r14,0 | |
812 | l %r14,restart_addr-.(%r14) | |
8eb4bd66 | 813 | basr %r14,%r14 # branch to start_secondary |
1da177e4 | 814 | restart_addr: |
25d83cbf | 815 | .long start_secondary |
5b409ed1 MS |
816 | .align 8 |
817 | restart_vtime: | |
818 | .long 0x7fffffff,0xffffffff | |
84b36a8e | 819 | .previous |
1da177e4 LT |
820 | #else |
821 | /* | |
822 | * If we do not run with SMP enabled, let the new CPU crash ... | |
823 | */ | |
144d634a | 824 | ENTRY(restart_int_handler) |
25d83cbf | 825 | basr %r1,0 |
1da177e4 | 826 | restart_base: |
25d83cbf HC |
827 | lpsw restart_crash-restart_base(%r1) |
828 | .align 8 | |
1da177e4 | 829 | restart_crash: |
25d83cbf | 830 | .long 0x000a0000,0x00000000 |
1da177e4 LT |
831 | restart_go: |
832 | #endif | |
833 | ||
7dd6b334 MH |
834 | # |
835 | # PSW restart interrupt handler | |
836 | # | |
837 | ENTRY(psw_restart_int_handler) | |
0edc8faa | 838 | st %r15,__LC_SAVE_AREA+48(%r0) # save r15 |
7dd6b334 MH |
839 | basr %r15,0 |
840 | 0: l %r15,.Lrestart_stack-0b(%r15) # load restart stack | |
841 | l %r15,0(%r15) | |
842 | ahi %r15,-SP_SIZE # make room for pt_regs | |
843 | stm %r0,%r14,SP_R0(%r15) # store gprs %r0-%r14 to stack | |
0edc8faa | 844 | mvc SP_R15(4,%r15),__LC_SAVE_AREA+48(%r0)# store saved %r15 to stack |
7dd6b334 MH |
845 | mvc SP_PSW(8,%r15),__LC_RST_OLD_PSW(%r0) # store restart old psw |
846 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # set backchain to 0 | |
847 | basr %r14,0 | |
848 | 1: l %r14,.Ldo_restart-1b(%r14) | |
849 | basr %r14,%r14 | |
850 | ||
851 | basr %r14,0 # load disabled wait PSW if | |
852 | 2: lpsw restart_psw_crash-2b(%r14) # do_restart returns | |
853 | .align 4 | |
854 | .Ldo_restart: | |
855 | .long do_restart | |
856 | .Lrestart_stack: | |
857 | .long restart_stack | |
858 | .align 8 | |
859 | restart_psw_crash: | |
860 | .long 0x000a0000,0x00000000 + restart_psw_crash | |
861 | ||
860dba45 MS |
862 | .section .kprobes.text, "ax" |
863 | ||
1da177e4 LT |
864 | #ifdef CONFIG_CHECK_STACK |
865 | /* | |
866 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
867 | * No need to properly save the registers, we are going to panic anyway. | |
868 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
869 | */ | |
870 | stack_overflow: | |
871 | l %r15,__LC_PANIC_STACK # change to panic stack | |
872 | sl %r15,BASED(.Lc_spsize) | |
873 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack | |
874 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
875 | la %r1,__LC_SAVE_AREA | |
876 | ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? | |
877 | be BASED(0f) | |
878 | ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? | |
879 | be BASED(0f) | |
880 | la %r1,__LC_SAVE_AREA+16 | |
881 | 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack | |
25d83cbf | 882 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain |
1da177e4 | 883 | l %r1,BASED(1f) # branch to kernel_stack_overflow |
25d83cbf | 884 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 | 885 | br %r1 |
25d83cbf | 886 | 1: .long kernel_stack_overflow |
1da177e4 LT |
887 | #endif |
888 | ||
889 | cleanup_table_system_call: | |
890 | .long system_call + 0x80000000, sysc_do_svc + 0x80000000 | |
6a2df3a8 MS |
891 | cleanup_table_sysc_tif: |
892 | .long sysc_tif + 0x80000000, sysc_restore + 0x80000000 | |
893 | cleanup_table_sysc_restore: | |
894 | .long sysc_restore + 0x80000000, sysc_done + 0x80000000 | |
895 | cleanup_table_io_tif: | |
896 | .long io_tif + 0x80000000, io_restore + 0x80000000 | |
897 | cleanup_table_io_restore: | |
898 | .long io_restore + 0x80000000, io_done + 0x80000000 | |
1da177e4 LT |
899 | |
900 | cleanup_critical: | |
901 | clc 4(4,%r12),BASED(cleanup_table_system_call) | |
902 | bl BASED(0f) | |
903 | clc 4(4,%r12),BASED(cleanup_table_system_call+4) | |
904 | bl BASED(cleanup_system_call) | |
905 | 0: | |
6a2df3a8 | 906 | clc 4(4,%r12),BASED(cleanup_table_sysc_tif) |
1da177e4 | 907 | bl BASED(0f) |
6a2df3a8 MS |
908 | clc 4(4,%r12),BASED(cleanup_table_sysc_tif+4) |
909 | bl BASED(cleanup_sysc_tif) | |
1da177e4 | 910 | 0: |
6a2df3a8 | 911 | clc 4(4,%r12),BASED(cleanup_table_sysc_restore) |
1da177e4 | 912 | bl BASED(0f) |
6a2df3a8 MS |
913 | clc 4(4,%r12),BASED(cleanup_table_sysc_restore+4) |
914 | bl BASED(cleanup_sysc_restore) | |
63b12246 | 915 | 0: |
6a2df3a8 | 916 | clc 4(4,%r12),BASED(cleanup_table_io_tif) |
63b12246 | 917 | bl BASED(0f) |
6a2df3a8 MS |
918 | clc 4(4,%r12),BASED(cleanup_table_io_tif+4) |
919 | bl BASED(cleanup_io_tif) | |
ae6aa2ea | 920 | 0: |
6a2df3a8 | 921 | clc 4(4,%r12),BASED(cleanup_table_io_restore) |
ae6aa2ea | 922 | bl BASED(0f) |
6a2df3a8 MS |
923 | clc 4(4,%r12),BASED(cleanup_table_io_restore+4) |
924 | bl BASED(cleanup_io_restore) | |
1da177e4 LT |
925 | 0: |
926 | br %r14 | |
927 | ||
928 | cleanup_system_call: | |
929 | mvc __LC_RETURN_PSW(8),0(%r12) | |
1da177e4 LT |
930 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) |
931 | bh BASED(0f) | |
6377981f MS |
932 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER |
933 | c %r12,BASED(.Lmck_old_psw) | |
934 | be BASED(0f) | |
1da177e4 | 935 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER |
6377981f MS |
936 | 0: c %r12,BASED(.Lmck_old_psw) |
937 | la %r12,__LC_SAVE_AREA+32 | |
938 | be BASED(0f) | |
939 | la %r12,__LC_SAVE_AREA+16 | |
1da177e4 LT |
940 | 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) |
941 | bhe BASED(cleanup_vtime) | |
1da177e4 LT |
942 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) |
943 | bh BASED(0f) | |
ae6aa2ea MS |
944 | mvc __LC_SAVE_AREA(16),0(%r12) |
945 | 0: st %r13,4(%r12) | |
1de3447a MS |
946 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp |
947 | s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
ae6aa2ea | 948 | st %r15,12(%r12) |
1de3447a | 949 | CREATE_STACK_FRAME __LC_SAVE_AREA |
b6ef5bb3 MS |
950 | mvc 0(4,%r12),__LC_THREAD_INFO |
951 | l %r12,__LC_THREAD_INFO | |
1de3447a | 952 | mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW |
20b40a79 | 953 | mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC |
b6ef5bb3 | 954 | oi __TI_flags+3(%r12),_TIF_SYSCALL |
1da177e4 LT |
955 | cleanup_vtime: |
956 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) | |
957 | bhe BASED(cleanup_stime) | |
1da177e4 LT |
958 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
959 | cleanup_stime: | |
960 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) | |
961 | bh BASED(cleanup_update) | |
962 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
963 | cleanup_update: | |
964 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
965 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) |
966 | la %r12,__LC_RETURN_PSW | |
967 | br %r14 | |
968 | cleanup_system_call_insn: | |
969 | .long sysc_saveall + 0x80000000 | |
25d83cbf HC |
970 | .long system_call + 0x80000000 |
971 | .long sysc_vtime + 0x80000000 | |
972 | .long sysc_stime + 0x80000000 | |
973 | .long sysc_update + 0x80000000 | |
1da177e4 | 974 | |
6a2df3a8 | 975 | cleanup_sysc_tif: |
1da177e4 | 976 | mvc __LC_RETURN_PSW(4),0(%r12) |
6a2df3a8 | 977 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif) |
1da177e4 LT |
978 | la %r12,__LC_RETURN_PSW |
979 | br %r14 | |
980 | ||
6a2df3a8 MS |
981 | cleanup_sysc_restore: |
982 | clc 4(4,%r12),BASED(cleanup_sysc_restore_insn) | |
ae6aa2ea | 983 | be BASED(2f) |
6377981f MS |
984 | mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER |
985 | c %r12,BASED(.Lmck_old_psw) | |
986 | be BASED(0f) | |
1da177e4 | 987 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER |
6377981f | 988 | 0: clc 4(4,%r12),BASED(cleanup_sysc_restore_insn+4) |
ae6aa2ea | 989 | be BASED(2f) |
1da177e4 | 990 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) |
ae6aa2ea | 991 | c %r12,BASED(.Lmck_old_psw) |
6377981f MS |
992 | la %r12,__LC_SAVE_AREA+32 |
993 | be BASED(1f) | |
994 | la %r12,__LC_SAVE_AREA+16 | |
995 | 1: mvc 0(16,%r12),SP_R12(%r15) | |
996 | lm %r0,%r11,SP_R0(%r15) | |
1da177e4 | 997 | l %r15,SP_R15(%r15) |
ae6aa2ea | 998 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 | 999 | br %r14 |
6a2df3a8 | 1000 | cleanup_sysc_restore_insn: |
411788ea | 1001 | .long sysc_done - 4 + 0x80000000 |
411788ea | 1002 | .long sysc_done - 8 + 0x80000000 |
1da177e4 | 1003 | |
6a2df3a8 | 1004 | cleanup_io_tif: |
176b1803 | 1005 | mvc __LC_RETURN_PSW(4),0(%r12) |
6a2df3a8 | 1006 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif) |
176b1803 MS |
1007 | la %r12,__LC_RETURN_PSW |
1008 | br %r14 | |
1009 | ||
6a2df3a8 MS |
1010 | cleanup_io_restore: |
1011 | clc 4(4,%r12),BASED(cleanup_io_restore_insn) | |
6377981f MS |
1012 | be BASED(1f) |
1013 | mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER | |
6a2df3a8 | 1014 | clc 4(4,%r12),BASED(cleanup_io_restore_insn+4) |
6377981f | 1015 | be BASED(1f) |
ae6aa2ea | 1016 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) |
ae6aa2ea | 1017 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) |
6377981f | 1018 | lm %r0,%r11,SP_R0(%r15) |
ae6aa2ea | 1019 | l %r15,SP_R15(%r15) |
6377981f | 1020 | 1: la %r12,__LC_RETURN_PSW |
ae6aa2ea | 1021 | br %r14 |
6a2df3a8 | 1022 | cleanup_io_restore_insn: |
411788ea | 1023 | .long io_done - 4 + 0x80000000 |
411788ea | 1024 | .long io_done - 8 + 0x80000000 |
ae6aa2ea | 1025 | |
1da177e4 LT |
1026 | /* |
1027 | * Integer constants | |
1028 | */ | |
25d83cbf HC |
1029 | .align 4 |
1030 | .Lc_spsize: .long SP_SIZE | |
1031 | .Lc_overhead: .long STACK_FRAME_OVERHEAD | |
25d83cbf HC |
1032 | .Lnr_syscalls: .long NR_syscalls |
1033 | .L0x018: .short 0x018 | |
1034 | .L0x020: .short 0x020 | |
1035 | .L0x028: .short 0x028 | |
1036 | .L0x030: .short 0x030 | |
1037 | .L0x038: .short 0x038 | |
1038 | .Lc_1: .long 1 | |
1da177e4 LT |
1039 | |
1040 | /* | |
1041 | * Symbol constants | |
1042 | */ | |
25d83cbf | 1043 | .Ls390_mcck: .long s390_do_machine_check |
77fa2245 | 1044 | .Ls390_handle_mcck: |
25d83cbf HC |
1045 | .long s390_handle_mcck |
1046 | .Lmck_old_psw: .long __LC_MCK_OLD_PSW | |
1047 | .Ldo_IRQ: .long do_IRQ | |
1048 | .Ldo_extint: .long do_extint | |
1049 | .Ldo_signal: .long do_signal | |
753c4dd6 MS |
1050 | .Ldo_notify_resume: |
1051 | .long do_notify_resume | |
5e9a2692 | 1052 | .Lhandle_per: .long do_per_trap |
03ff9a23 MS |
1053 | .Ldo_execve: .long do_execve |
1054 | .Lexecve_tail: .long execve_tail | |
25d83cbf HC |
1055 | .Ljump_table: .long pgm_check_table |
1056 | .Lschedule: .long schedule | |
ab1809b4 | 1057 | #ifdef CONFIG_PREEMPT |
b8e7a54c HC |
1058 | .Lpreempt_schedule_irq: |
1059 | .long preempt_schedule_irq | |
ab1809b4 | 1060 | #endif |
753c4dd6 MS |
1061 | .Ltrace_entry: .long do_syscall_trace_enter |
1062 | .Ltrace_exit: .long do_syscall_trace_exit | |
25d83cbf HC |
1063 | .Lschedtail: .long schedule_tail |
1064 | .Lsysc_table: .long sys_call_table | |
1f194a4c | 1065 | #ifdef CONFIG_TRACE_IRQFLAGS |
50bec4ce HC |
1066 | .Ltrace_irq_on_caller: |
1067 | .long trace_hardirqs_on_caller | |
1068 | .Ltrace_irq_off_caller: | |
1069 | .long trace_hardirqs_off_caller | |
af4c6874 HC |
1070 | #endif |
1071 | #ifdef CONFIG_LOCKDEP | |
523b44cf HC |
1072 | .Llockdep_sys_exit: |
1073 | .long lockdep_sys_exit | |
1f194a4c | 1074 | #endif |
1da177e4 | 1075 | .Lcritical_start: |
25d83cbf | 1076 | .long __critical_start + 0x80000000 |
1da177e4 | 1077 | .Lcritical_end: |
25d83cbf | 1078 | .long __critical_end + 0x80000000 |
1da177e4 | 1079 | .Lcleanup_critical: |
25d83cbf | 1080 | .long cleanup_critical |
1da177e4 | 1081 | |
25d83cbf | 1082 | .section .rodata, "a" |
1da177e4 | 1083 | #define SYSCALL(esa,esame,emu) .long esa |
9bf1226b | 1084 | .globl sys_call_table |
1da177e4 LT |
1085 | sys_call_table: |
1086 | #include "syscalls.S" | |
1087 | #undef SYSCALL |