Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/entry.S | |
3 | * S390 low-level entry points. | |
4 | * | |
54dfe5dd | 5 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
12 | #include <linux/sys.h> | |
13 | #include <linux/linkage.h> | |
2bc89b5e | 14 | #include <linux/init.h> |
1da177e4 LT |
15 | #include <asm/cache.h> |
16 | #include <asm/lowcore.h> | |
17 | #include <asm/errno.h> | |
18 | #include <asm/ptrace.h> | |
19 | #include <asm/thread_info.h> | |
0013a854 | 20 | #include <asm/asm-offsets.h> |
1da177e4 LT |
21 | #include <asm/unistd.h> |
22 | #include <asm/page.h> | |
23 | ||
24 | /* | |
25 | * Stack layout for the system_call stack entry. | |
26 | * The first few entries are identical to the user_regs_struct. | |
27 | */ | |
25d83cbf HC |
28 | SP_PTREGS = STACK_FRAME_OVERHEAD |
29 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
30 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
31 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
32 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 | |
33 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
34 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 | |
35 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
36 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 | |
37 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
38 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 | |
39 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
40 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36 | |
41 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
42 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44 | |
43 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
44 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52 | |
45 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
46 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60 | |
47 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
48 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
49 | SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP | |
50 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE | |
1da177e4 | 51 | |
02a029b3 | 52 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \ |
54dfe5dd | 53 | _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) |
02a029b3 | 54 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \ |
54dfe5dd | 55 | _TIF_MCCK_PENDING) |
1da177e4 LT |
56 | |
57 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
58 | STACK_SIZE = 1 << STACK_SHIFT | |
59 | ||
60 | #define BASED(name) name-system_call(%r13) | |
61 | ||
1f194a4c HC |
62 | #ifdef CONFIG_TRACE_IRQFLAGS |
63 | .macro TRACE_IRQS_ON | |
64 | l %r1,BASED(.Ltrace_irq_on) | |
65 | basr %r14,%r1 | |
66 | .endm | |
67 | ||
68 | .macro TRACE_IRQS_OFF | |
69 | l %r1,BASED(.Ltrace_irq_off) | |
70 | basr %r14,%r1 | |
71 | .endm | |
523b44cf | 72 | |
411788ea HC |
73 | .macro TRACE_IRQS_CHECK |
74 | tm SP_PSW(%r15),0x03 # irqs enabled? | |
75 | jz 0f | |
76 | l %r1,BASED(.Ltrace_irq_on) | |
523b44cf | 77 | basr %r14,%r1 |
411788ea HC |
78 | j 1f |
79 | 0: l %r1,BASED(.Ltrace_irq_off) | |
80 | basr %r14,%r1 | |
81 | 1: | |
523b44cf | 82 | .endm |
1f194a4c HC |
83 | #else |
84 | #define TRACE_IRQS_ON | |
85 | #define TRACE_IRQS_OFF | |
411788ea HC |
86 | #define TRACE_IRQS_CHECK |
87 | #endif | |
88 | ||
89 | #ifdef CONFIG_LOCKDEP | |
90 | .macro LOCKDEP_SYS_EXIT | |
91 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
92 | jz 0f | |
93 | l %r1,BASED(.Llockdep_sys_exit) | |
94 | basr %r14,%r1 | |
95 | 0: | |
96 | .endm | |
97 | #else | |
523b44cf | 98 | #define LOCKDEP_SYS_EXIT |
1f194a4c HC |
99 | #endif |
100 | ||
1da177e4 LT |
101 | /* |
102 | * Register usage in interrupt handlers: | |
103 | * R9 - pointer to current task structure | |
104 | * R13 - pointer to literal pool | |
105 | * R14 - return register for function calls | |
106 | * R15 - kernel stack pointer | |
107 | */ | |
108 | ||
25d83cbf | 109 | .macro STORE_TIMER lc_offset |
1da177e4 LT |
110 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
111 | stpt \lc_offset | |
112 | #endif | |
113 | .endm | |
114 | ||
115 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
25d83cbf | 116 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum |
1da177e4 LT |
117 | lm %r10,%r11,\lc_from |
118 | sl %r10,\lc_to | |
119 | sl %r11,\lc_to+4 | |
120 | bc 3,BASED(0f) | |
121 | sl %r10,BASED(.Lc_1) | |
122 | 0: al %r10,\lc_sum | |
123 | al %r11,\lc_sum+4 | |
124 | bc 12,BASED(1f) | |
125 | al %r10,BASED(.Lc_1) | |
126 | 1: stm %r10,%r11,\lc_sum | |
127 | .endm | |
128 | #endif | |
129 | ||
130 | .macro SAVE_ALL_BASE savearea | |
131 | stm %r12,%r15,\savearea | |
132 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 | |
133 | .endm | |
134 | ||
987ad70a MS |
135 | .macro SAVE_ALL_SVC psworg,savearea |
136 | la %r12,\psworg | |
137 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
138 | .endm | |
139 | ||
63b12246 | 140 | .macro SAVE_ALL_SYNC psworg,savearea |
1da177e4 | 141 | la %r12,\psworg |
1da177e4 LT |
142 | tm \psworg+1,0x01 # test problem state bit |
143 | bz BASED(2f) # skip stack setup save | |
144 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
63b12246 MS |
145 | #ifdef CONFIG_CHECK_STACK |
146 | b BASED(3f) | |
147 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
148 | bz BASED(stack_overflow) | |
149 | 3: | |
150 | #endif | |
151 | 2: | |
152 | .endm | |
153 | ||
154 | .macro SAVE_ALL_ASYNC psworg,savearea | |
155 | la %r12,\psworg | |
1da177e4 LT |
156 | tm \psworg+1,0x01 # test problem state bit |
157 | bnz BASED(1f) # from user -> load async stack | |
158 | clc \psworg+4(4),BASED(.Lcritical_end) | |
159 | bhe BASED(0f) | |
160 | clc \psworg+4(4),BASED(.Lcritical_start) | |
161 | bl BASED(0f) | |
162 | l %r14,BASED(.Lcleanup_critical) | |
163 | basr %r14,%r14 | |
6add9f7f | 164 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
165 | bnz BASED(1f) |
166 | 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ? | |
167 | slr %r14,%r15 | |
168 | sra %r14,STACK_SHIFT | |
169 | be BASED(2f) | |
170 | 1: l %r15,__LC_ASYNC_STACK | |
1da177e4 LT |
171 | #ifdef CONFIG_CHECK_STACK |
172 | b BASED(3f) | |
173 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
174 | bz BASED(stack_overflow) | |
175 | 3: | |
176 | #endif | |
77fa2245 HC |
177 | 2: |
178 | .endm | |
179 | ||
25d83cbf | 180 | .macro CREATE_STACK_FRAME psworg,savearea |
77fa2245 | 181 | s %r15,BASED(.Lc_spsize) # make room for registers & psw |
1da177e4 LT |
182 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack |
183 | la %r12,\psworg | |
184 | st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 | |
185 | icm %r12,12,__LC_SVC_ILC | |
186 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
187 | st %r12,SP_ILC(%r15) | |
188 | mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack | |
189 | la %r12,0 | |
190 | st %r12,__SF_BACKCHAIN(%r15) # clear back chain | |
191 | .endm | |
192 | ||
25d83cbf | 193 | .macro RESTORE_ALL psworg,sync |
ae6aa2ea | 194 | mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore |
1da177e4 | 195 | .if !\sync |
ae6aa2ea | 196 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 LT |
197 | .endif |
198 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user | |
199 | STORE_TIMER __LC_EXIT_TIMER | |
ae6aa2ea | 200 | lpsw \psworg # back to caller |
1da177e4 LT |
201 | .endm |
202 | ||
203 | /* | |
204 | * Scheduler resume function, called by switch_to | |
205 | * gpr2 = (task_struct *) prev | |
206 | * gpr3 = (task_struct *) next | |
207 | * Returns: | |
208 | * gpr2 = prev | |
209 | */ | |
25d83cbf | 210 | .globl __switch_to |
1da177e4 | 211 | __switch_to: |
25d83cbf | 212 | basr %r1,0 |
1da177e4 LT |
213 | __switch_to_base: |
214 | tm __THREAD_per(%r3),0xe8 # new process is using per ? | |
215 | bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine | |
25d83cbf HC |
216 | stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff |
217 | clc __THREAD_per(12,%r3),__SF_EMPTY(%r15) | |
218 | be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's | |
219 | lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
1da177e4 | 220 | __switch_to_noper: |
77fa2245 HC |
221 | l %r4,__THREAD_info(%r2) # get thread_info of prev |
222 | tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? | |
223 | bz __switch_to_no_mcck-__switch_to_base(%r1) | |
224 | ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
225 | l %r4,__THREAD_info(%r3) # get thread_info of next | |
226 | oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next | |
227 | __switch_to_no_mcck: | |
25d83cbf | 228 | stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
1da177e4 LT |
229 | st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp |
230 | l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
231 | lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task | |
232 | st %r3,__LC_CURRENT # __LC_CURRENT = current task struct | |
233 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
25d83cbf | 234 | l %r3,__THREAD_info(%r3) # load thread_info from task struct |
1da177e4 LT |
235 | st %r3,__LC_THREAD_INFO |
236 | ahi %r3,STACK_SIZE | |
237 | st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
238 | br %r14 | |
239 | ||
240 | __critical_start: | |
241 | /* | |
242 | * SVC interrupt handler routine. System calls are synchronous events and | |
243 | * are executed with interrupts enabled. | |
244 | */ | |
245 | ||
25d83cbf | 246 | .globl system_call |
1da177e4 LT |
247 | system_call: |
248 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
249 | sysc_saveall: | |
250 | SAVE_ALL_BASE __LC_SAVE_AREA | |
987ad70a | 251 | SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 252 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
253 | lh %r7,0x8a # get svc number from lowcore |
254 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
255 | sysc_vtime: | |
1da177e4 LT |
256 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
257 | sysc_stime: | |
258 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
259 | sysc_update: | |
260 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
261 | #endif | |
262 | sysc_do_svc: | |
263 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
25d83cbf HC |
264 | sla %r7,2 # *4 and test for svc 0 |
265 | bnz BASED(sysc_nr_ok) # svc number > 0 | |
1da177e4 LT |
266 | # svc 0: system call number in %r1 |
267 | cl %r1,BASED(.Lnr_syscalls) | |
268 | bnl BASED(sysc_nr_ok) | |
25d83cbf HC |
269 | lr %r7,%r1 # copy svc number to %r7 |
270 | sla %r7,2 # *4 | |
1da177e4 LT |
271 | sysc_nr_ok: |
272 | mvc SP_ARGS(4,%r15),SP_R7(%r15) | |
273 | sysc_do_restart: | |
d882b172 | 274 | l %r8,BASED(.Lsysc_table) |
1da177e4 | 275 | tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) |
d882b172 | 276 | l %r8,0(%r7,%r8) # get system call addr. |
25d83cbf HC |
277 | bnz BASED(sysc_tracesys) |
278 | basr %r14,%r8 # call sys_xxxx | |
279 | st %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
1da177e4 LT |
280 | |
281 | sysc_return: | |
282 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
411788ea | 283 | bno BASED(sysc_restore) |
1da177e4 LT |
284 | tm __TI_flags+3(%r9),_TIF_WORK_SVC |
285 | bnz BASED(sysc_work) # there is work to do (signals etc.) | |
411788ea HC |
286 | sysc_restore: |
287 | #ifdef CONFIG_TRACE_IRQFLAGS | |
288 | la %r1,BASED(sysc_restore_trace_psw) | |
289 | lpsw 0(%r1) | |
290 | sysc_restore_trace: | |
291 | TRACE_IRQS_CHECK | |
523b44cf | 292 | LOCKDEP_SYS_EXIT |
411788ea | 293 | #endif |
1da177e4 | 294 | sysc_leave: |
25d83cbf | 295 | RESTORE_ALL __LC_RETURN_PSW,1 |
411788ea HC |
296 | sysc_done: |
297 | ||
298 | #ifdef CONFIG_TRACE_IRQFLAGS | |
299 | .align 8 | |
300 | .globl sysc_restore_trace_psw | |
301 | sysc_restore_trace_psw: | |
302 | .long 0, sysc_restore_trace + 0x80000000 | |
303 | #endif | |
1da177e4 LT |
304 | |
305 | # | |
306 | # recheck if there is more work to do | |
307 | # | |
308 | sysc_work_loop: | |
309 | tm __TI_flags+3(%r9),_TIF_WORK_SVC | |
411788ea | 310 | bz BASED(sysc_restore) # there is no work to do |
1da177e4 LT |
311 | # |
312 | # One of the work bits is on. Find out which one. | |
313 | # | |
314 | sysc_work: | |
77fa2245 HC |
315 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
316 | bo BASED(sysc_mcck_pending) | |
1da177e4 LT |
317 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
318 | bo BASED(sysc_reschedule) | |
02a029b3 | 319 | tm __TI_flags+3(%r9),_TIF_SIGPENDING |
54dfe5dd | 320 | bnz BASED(sysc_sigpending) |
1da177e4 LT |
321 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC |
322 | bo BASED(sysc_restart) | |
323 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
324 | bo BASED(sysc_singlestep) | |
411788ea HC |
325 | b BASED(sysc_restore) |
326 | sysc_work_done: | |
1da177e4 LT |
327 | |
328 | # | |
329 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
330 | # |
331 | sysc_reschedule: | |
332 | l %r1,BASED(.Lschedule) | |
333 | la %r14,BASED(sysc_work_loop) | |
334 | br %r1 # call scheduler | |
1da177e4 | 335 | |
77fa2245 HC |
336 | # |
337 | # _TIF_MCCK_PENDING is set, call handler | |
338 | # | |
339 | sysc_mcck_pending: | |
340 | l %r1,BASED(.Ls390_handle_mcck) | |
341 | la %r14,BASED(sysc_work_loop) | |
342 | br %r1 # TIF bit will be cleared by handler | |
343 | ||
1da177e4 | 344 | # |
02a029b3 | 345 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 346 | # |
25d83cbf | 347 | sysc_sigpending: |
1da177e4 | 348 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
25d83cbf HC |
349 | la %r2,SP_PTREGS(%r15) # load pt_regs |
350 | l %r1,BASED(.Ldo_signal) | |
351 | basr %r14,%r1 # call do_signal | |
1da177e4 LT |
352 | tm __TI_flags+3(%r9),_TIF_RESTART_SVC |
353 | bo BASED(sysc_restart) | |
354 | tm __TI_flags+3(%r9),_TIF_SINGLE_STEP | |
355 | bo BASED(sysc_singlestep) | |
e1c3ad96 | 356 | b BASED(sysc_work_loop) |
1da177e4 LT |
357 | |
358 | # | |
359 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
360 | # | |
361 | sysc_restart: | |
362 | ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC | |
25d83cbf | 363 | l %r7,SP_R2(%r15) # load new svc number |
1da177e4 LT |
364 | sla %r7,2 |
365 | mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument | |
25d83cbf HC |
366 | lm %r2,%r6,SP_R2(%r15) # load svc arguments |
367 | b BASED(sysc_do_restart) # restart svc | |
1da177e4 LT |
368 | |
369 | # | |
370 | # _TIF_SINGLE_STEP is set, call do_single_step | |
371 | # | |
372 | sysc_singlestep: | |
373 | ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP | |
374 | mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check | |
375 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
376 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
377 | la %r14,BASED(sysc_return) # load adr. of system return | |
378 | br %r1 # branch to do_single_step | |
379 | ||
1da177e4 LT |
380 | # |
381 | # call trace before and after sys_call | |
382 | # | |
383 | sysc_tracesys: | |
25d83cbf HC |
384 | l %r1,BASED(.Ltrace) |
385 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
386 | la %r3,0 |
387 | srl %r7,2 | |
388 | st %r7,SP_R2(%r15) | |
389 | basr %r14,%r1 | |
390 | clc SP_R2(4,%r15),BASED(.Lnr_syscalls) | |
391 | bnl BASED(sysc_tracenogo) | |
d882b172 | 392 | l %r8,BASED(.Lsysc_table) |
25d83cbf HC |
393 | l %r7,SP_R2(%r15) # strace might have changed the |
394 | sll %r7,2 # system call | |
d882b172 | 395 | l %r8,0(%r7,%r8) |
1da177e4 LT |
396 | sysc_tracego: |
397 | lm %r3,%r6,SP_R3(%r15) | |
398 | l %r2,SP_ORIG_R2(%r15) | |
25d83cbf HC |
399 | basr %r14,%r8 # call sys_xxx |
400 | st %r2,SP_R2(%r15) # store return value | |
1da177e4 LT |
401 | sysc_tracenogo: |
402 | tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) | |
25d83cbf | 403 | bz BASED(sysc_return) |
1da177e4 | 404 | l %r1,BASED(.Ltrace) |
25d83cbf | 405 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 LT |
406 | la %r3,1 |
407 | la %r14,BASED(sysc_return) | |
408 | br %r1 | |
409 | ||
410 | # | |
411 | # a new process exits the kernel with ret_from_fork | |
412 | # | |
25d83cbf | 413 | .globl ret_from_fork |
1da177e4 LT |
414 | ret_from_fork: |
415 | l %r13,__LC_SVC_NEW_PSW+4 | |
416 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
417 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? | |
418 | bo BASED(0f) | |
419 | st %r15,SP_R15(%r15) # store stack pointer for new kthread | |
25d83cbf HC |
420 | 0: l %r1,BASED(.Lschedtail) |
421 | basr %r14,%r1 | |
1f194a4c | 422 | TRACE_IRQS_ON |
25d83cbf | 423 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
1da177e4 LT |
424 | b BASED(sysc_return) |
425 | ||
426 | # | |
03ff9a23 MS |
427 | # kernel_execve function needs to deal with pt_regs that is not |
428 | # at the usual place | |
1da177e4 | 429 | # |
03ff9a23 MS |
430 | .globl kernel_execve |
431 | kernel_execve: | |
432 | stm %r12,%r15,48(%r15) | |
433 | lr %r14,%r15 | |
434 | l %r13,__LC_SVC_NEW_PSW+4 | |
435 | s %r15,BASED(.Lc_spsize) | |
436 | st %r14,__SF_BACKCHAIN(%r15) | |
437 | la %r12,SP_PTREGS(%r15) | |
438 | xc 0(__PT_SIZE,%r12),0(%r12) | |
439 | l %r1,BASED(.Ldo_execve) | |
440 | lr %r5,%r12 | |
441 | basr %r14,%r1 | |
442 | ltr %r2,%r2 | |
443 | be BASED(0f) | |
444 | a %r15,BASED(.Lc_spsize) | |
445 | lm %r12,%r15,48(%r15) | |
446 | br %r14 | |
447 | # execve succeeded. | |
448 | 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts | |
449 | l %r15,__LC_KERNEL_STACK # load ksp | |
450 | s %r15,BASED(.Lc_spsize) # make room for registers & psw | |
451 | l %r9,__LC_THREAD_INFO | |
452 | mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs | |
453 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) | |
454 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
455 | l %r1,BASED(.Lexecve_tail) | |
456 | basr %r14,%r1 | |
457 | b BASED(sysc_return) | |
1da177e4 LT |
458 | |
459 | /* | |
460 | * Program check handler routine | |
461 | */ | |
462 | ||
25d83cbf | 463 | .globl pgm_check_handler |
1da177e4 LT |
464 | pgm_check_handler: |
465 | /* | |
466 | * First we need to check for a special case: | |
467 | * Single stepping an instruction that disables the PER event mask will | |
468 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
469 | * For a single stepped SVC the program check handler gets control after | |
470 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
471 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
472 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
473 | * if we have to load the kernel stack register. | |
474 | * For every other possible cause for PER event without the PER mask set | |
475 | * we just ignore the PER event (FIXME: is there anything we have to do | |
476 | * for LPSW?). | |
477 | */ | |
478 | STORE_TIMER __LC_SYNC_ENTER_TIMER | |
479 | SAVE_ALL_BASE __LC_SAVE_AREA | |
25d83cbf HC |
480 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
481 | bnz BASED(pgm_per) # got per exception -> special case | |
63b12246 | 482 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 483 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
484 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
485 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
486 | bz BASED(pgm_no_vtime) | |
487 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
488 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
489 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
490 | pgm_no_vtime: | |
491 | #endif | |
492 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
411788ea | 493 | TRACE_IRQS_OFF |
25d83cbf | 494 | l %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 LT |
495 | la %r8,0x7f |
496 | nr %r8,%r3 | |
497 | pgm_do_call: | |
25d83cbf HC |
498 | l %r7,BASED(.Ljump_table) |
499 | sll %r8,2 | |
500 | l %r7,0(%r8,%r7) # load address of handler routine | |
501 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
502 | la %r14,BASED(sysc_return) | |
503 | br %r7 # branch to interrupt-handler | |
1da177e4 LT |
504 | |
505 | # | |
506 | # handle per exception | |
507 | # | |
508 | pgm_per: | |
25d83cbf HC |
509 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on |
510 | bnz BASED(pgm_per_std) # ok, normal per event from user space | |
1da177e4 | 511 | # ok its one of the special cases, now we need to find out which one |
25d83cbf HC |
512 | clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW |
513 | be BASED(pgm_svcper) | |
1da177e4 | 514 | # no interesting special case, ignore PER event |
25d83cbf HC |
515 | lm %r12,%r15,__LC_SAVE_AREA |
516 | lpsw 0x28 | |
1da177e4 LT |
517 | |
518 | # | |
519 | # Normal per exception | |
520 | # | |
521 | pgm_per_std: | |
63b12246 | 522 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 523 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
524 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
525 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
526 | bz BASED(pgm_no_vtime2) | |
527 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
528 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
529 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
530 | pgm_no_vtime2: | |
531 | #endif | |
532 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
411788ea | 533 | TRACE_IRQS_OFF |
1da177e4 LT |
534 | l %r1,__TI_task(%r9) |
535 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
536 | mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS | |
537 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
538 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
4ba069b8 MG |
539 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
540 | bz BASED(kernel_per) | |
25d83cbf | 541 | l %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 | 542 | la %r8,0x7f |
25d83cbf HC |
543 | nr %r8,%r3 # clear per-event-bit and ilc |
544 | be BASED(sysc_return) # only per or per+check ? | |
1da177e4 LT |
545 | b BASED(pgm_do_call) |
546 | ||
547 | # | |
548 | # it was a single stepped SVC that is causing all the trouble | |
549 | # | |
550 | pgm_svcper: | |
63b12246 | 551 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 552 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 | 553 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
1da177e4 LT |
554 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
555 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
556 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
557 | #endif |
558 | lh %r7,0x8a # get svc number from lowcore | |
559 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
411788ea | 560 | TRACE_IRQS_OFF |
1da177e4 LT |
561 | l %r1,__TI_task(%r9) |
562 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID | |
563 | mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS | |
564 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
565 | oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
1f194a4c | 566 | TRACE_IRQS_ON |
1da177e4 LT |
567 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
568 | b BASED(sysc_do_svc) | |
569 | ||
4ba069b8 MG |
570 | # |
571 | # per was called from kernel, must be kprobes | |
572 | # | |
573 | kernel_per: | |
574 | mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check | |
575 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
576 | l %r1,BASED(.Lhandle_per) # load adr. of per handler | |
411788ea | 577 | la %r14,BASED(sysc_restore)# load adr. of system return |
4ba069b8 MG |
578 | br %r1 # branch to do_single_step |
579 | ||
1da177e4 LT |
580 | /* |
581 | * IO interrupt handler routine | |
582 | */ | |
583 | ||
25d83cbf | 584 | .globl io_int_handler |
1da177e4 LT |
585 | io_int_handler: |
586 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
587 | stck __LC_INT_CLOCK | |
588 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | |
63b12246 | 589 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
77fa2245 | 590 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
591 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
592 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
593 | bz BASED(io_no_vtime) | |
594 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
595 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
596 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
597 | io_no_vtime: | |
598 | #endif | |
599 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
1f194a4c | 600 | TRACE_IRQS_OFF |
25d83cbf HC |
601 | l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ |
602 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
603 | basr %r14,%r1 # branch to standard irq handler | |
1da177e4 | 604 | io_return: |
25d83cbf | 605 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
1da177e4 | 606 | #ifdef CONFIG_PREEMPT |
25d83cbf | 607 | bno BASED(io_preempt) # no -> check for preemptive scheduling |
1da177e4 | 608 | #else |
411788ea | 609 | bno BASED(io_restore) # no-> skip resched & signal |
1da177e4 LT |
610 | #endif |
611 | tm __TI_flags+3(%r9),_TIF_WORK_INT | |
25d83cbf | 612 | bnz BASED(io_work) # there is work to do (signals etc.) |
411788ea HC |
613 | io_restore: |
614 | #ifdef CONFIG_TRACE_IRQFLAGS | |
615 | la %r1,BASED(io_restore_trace_psw) | |
616 | lpsw 0(%r1) | |
617 | io_restore_trace: | |
618 | TRACE_IRQS_CHECK | |
523b44cf | 619 | LOCKDEP_SYS_EXIT |
411788ea | 620 | #endif |
1da177e4 | 621 | io_leave: |
25d83cbf | 622 | RESTORE_ALL __LC_RETURN_PSW,0 |
ae6aa2ea | 623 | io_done: |
1da177e4 | 624 | |
411788ea HC |
625 | #ifdef CONFIG_TRACE_IRQFLAGS |
626 | .align 8 | |
627 | .globl io_restore_trace_psw | |
628 | io_restore_trace_psw: | |
629 | .long 0, io_restore_trace + 0x80000000 | |
630 | #endif | |
631 | ||
1da177e4 LT |
632 | #ifdef CONFIG_PREEMPT |
633 | io_preempt: | |
634 | icm %r0,15,__TI_precount(%r9) | |
411788ea | 635 | bnz BASED(io_restore) |
1da177e4 LT |
636 | l %r1,SP_R15(%r15) |
637 | s %r1,BASED(.Lc_spsize) | |
638 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 639 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
640 | lr %r15,%r1 |
641 | io_resume_loop: | |
642 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED | |
411788ea | 643 | bno BASED(io_restore) |
b8e7a54c HC |
644 | l %r1,BASED(.Lpreempt_schedule_irq) |
645 | la %r14,BASED(io_resume_loop) | |
646 | br %r1 # call schedule | |
1da177e4 LT |
647 | #endif |
648 | ||
649 | # | |
650 | # switch to kernel stack, then check the TIF bits | |
651 | # | |
652 | io_work: | |
653 | l %r1,__LC_KERNEL_STACK | |
654 | s %r1,BASED(.Lc_spsize) | |
655 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 656 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 LT |
657 | lr %r15,%r1 |
658 | # | |
659 | # One of the work bits is on. Find out which one. | |
02a029b3 | 660 | # Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED |
25d83cbf | 661 | # and _TIF_MCCK_PENDING |
1da177e4 LT |
662 | # |
663 | io_work_loop: | |
77fa2245 | 664 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING |
25d83cbf | 665 | bo BASED(io_mcck_pending) |
1da177e4 LT |
666 | tm __TI_flags+3(%r9),_TIF_NEED_RESCHED |
667 | bo BASED(io_reschedule) | |
02a029b3 | 668 | tm __TI_flags+3(%r9),_TIF_SIGPENDING |
54dfe5dd | 669 | bnz BASED(io_sigpending) |
411788ea HC |
670 | b BASED(io_restore) |
671 | io_work_done: | |
1da177e4 | 672 | |
77fa2245 HC |
673 | # |
674 | # _TIF_MCCK_PENDING is set, call handler | |
675 | # | |
676 | io_mcck_pending: | |
677 | l %r1,BASED(.Ls390_handle_mcck) | |
b771aeac | 678 | basr %r14,%r1 # TIF bit will be cleared by handler |
b771aeac | 679 | b BASED(io_work_loop) |
77fa2245 | 680 | |
1da177e4 LT |
681 | # |
682 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
683 | # |
684 | io_reschedule: | |
411788ea | 685 | TRACE_IRQS_ON |
25d83cbf HC |
686 | l %r1,BASED(.Lschedule) |
687 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts | |
688 | basr %r14,%r1 # call scheduler | |
689 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 690 | TRACE_IRQS_OFF |
1da177e4 | 691 | tm __TI_flags+3(%r9),_TIF_WORK_INT |
411788ea | 692 | bz BASED(io_restore) # there is no work to do |
1da177e4 LT |
693 | b BASED(io_work_loop) |
694 | ||
695 | # | |
02a029b3 | 696 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 697 | # |
25d83cbf | 698 | io_sigpending: |
411788ea | 699 | TRACE_IRQS_ON |
25d83cbf HC |
700 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
701 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
702 | l %r1,BASED(.Ldo_signal) | |
703 | basr %r14,%r1 # call do_signal | |
704 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 705 | TRACE_IRQS_OFF |
e1c3ad96 | 706 | b BASED(io_work_loop) |
1da177e4 LT |
707 | |
708 | /* | |
709 | * External interrupt handler routine | |
710 | */ | |
711 | ||
25d83cbf | 712 | .globl ext_int_handler |
1da177e4 LT |
713 | ext_int_handler: |
714 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | |
715 | stck __LC_INT_CLOCK | |
716 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | |
63b12246 | 717 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
77fa2245 | 718 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
1da177e4 LT |
719 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
720 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | |
721 | bz BASED(ext_no_vtime) | |
722 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
723 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
724 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
725 | ext_no_vtime: | |
726 | #endif | |
727 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
1f194a4c | 728 | TRACE_IRQS_OFF |
25d83cbf HC |
729 | la %r2,SP_PTREGS(%r15) # address of register-save area |
730 | lh %r3,__LC_EXT_INT_CODE # get interruption code | |
1da177e4 LT |
731 | l %r1,BASED(.Ldo_extint) |
732 | basr %r14,%r1 | |
733 | b BASED(io_return) | |
734 | ||
ae6aa2ea MS |
735 | __critical_end: |
736 | ||
1da177e4 LT |
737 | /* |
738 | * Machine check handler routines | |
739 | */ | |
740 | ||
25d83cbf | 741 | .globl mcck_int_handler |
1da177e4 | 742 | mcck_int_handler: |
77fa2245 HC |
743 | spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer |
744 | lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs | |
1da177e4 | 745 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
77fa2245 | 746 | la %r12,__LC_MCK_OLD_PSW |
25d83cbf | 747 | tm __LC_MCCK_CODE,0x80 # system damage? |
77fa2245 | 748 | bo BASED(mcck_int_main) # yes -> rest of mcck code invalid |
1da177e4 | 749 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
63b12246 MS |
750 | mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER |
751 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA | |
752 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | |
753 | bo BASED(1f) | |
754 | la %r14,__LC_SYNC_ENTER_TIMER | |
755 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
756 | bl BASED(0f) | |
757 | la %r14,__LC_ASYNC_ENTER_TIMER | |
758 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
759 | bl BASED(0f) | |
760 | la %r14,__LC_EXIT_TIMER | |
761 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
762 | bl BASED(0f) | |
763 | la %r14,__LC_LAST_UPDATE_TIMER | |
764 | 0: spt 0(%r14) | |
765 | mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) | |
766 | 1: | |
1da177e4 | 767 | #endif |
63b12246 | 768 | tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 HC |
769 | bno BASED(mcck_int_main) # no -> skip cleanup critical |
770 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit | |
771 | bnz BASED(mcck_int_main) # from user -> load async stack | |
772 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) | |
773 | bhe BASED(mcck_int_main) | |
774 | clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) | |
775 | bl BASED(mcck_int_main) | |
776 | l %r14,BASED(.Lcleanup_critical) | |
777 | basr %r14,%r14 | |
778 | mcck_int_main: | |
779 | l %r14,__LC_PANIC_STACK # are we already on the panic stack? | |
780 | slr %r14,%r15 | |
781 | sra %r14,PAGE_SHIFT | |
782 | be BASED(0f) | |
783 | l %r15,__LC_PANIC_STACK # load panic stack | |
784 | 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 | |
ae6aa2ea | 785 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
25d83cbf | 786 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
ae6aa2ea | 787 | bno BASED(mcck_no_vtime) # no -> skip cleanup critical |
63b12246 | 788 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea MS |
789 | bz BASED(mcck_no_vtime) |
790 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
791 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
792 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
793 | mcck_no_vtime: | |
794 | #endif | |
77fa2245 HC |
795 | l %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
796 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
25d83cbf HC |
797 | l %r1,BASED(.Ls390_mcck) |
798 | basr %r14,%r1 # call machine check handler | |
799 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
77fa2245 | 800 | bno BASED(mcck_return) |
25d83cbf | 801 | l %r1,__LC_KERNEL_STACK # switch to kernel stack |
77fa2245 HC |
802 | s %r1,BASED(.Lc_spsize) |
803 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 804 | xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
77fa2245 HC |
805 | lr %r15,%r1 |
806 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
807 | tm __TI_flags+3(%r9),_TIF_MCCK_PENDING | |
808 | bno BASED(mcck_return) | |
1f194a4c | 809 | TRACE_IRQS_OFF |
77fa2245 HC |
810 | l %r1,BASED(.Ls390_handle_mcck) |
811 | basr %r14,%r1 # call machine check handler | |
1f194a4c | 812 | TRACE_IRQS_ON |
1da177e4 | 813 | mcck_return: |
63b12246 MS |
814 | mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW |
815 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
816 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
817 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52 | |
818 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? | |
819 | bno BASED(0f) | |
820 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
821 | stpt __LC_EXIT_TIMER | |
822 | lpsw __LC_RETURN_MCCK_PSW # back to caller | |
823 | 0: | |
824 | #endif | |
825 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
826 | lpsw __LC_RETURN_MCCK_PSW # back to caller | |
827 | ||
25d83cbf | 828 | RESTORE_ALL __LC_RETURN_MCCK_PSW,0 |
1da177e4 | 829 | |
1da177e4 LT |
830 | /* |
831 | * Restart interruption handler, kick starter for additional CPUs | |
832 | */ | |
84b36a8e | 833 | #ifdef CONFIG_SMP |
2bc89b5e | 834 | __CPUINIT |
25d83cbf | 835 | .globl restart_int_handler |
1da177e4 | 836 | restart_int_handler: |
25d83cbf HC |
837 | l %r15,__LC_SAVE_AREA+60 # load ksp |
838 | lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs | |
839 | lam %a0,%a15,__LC_AREGS_SAVE_AREA | |
840 | lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
841 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on | |
842 | basr %r14,0 | |
843 | l %r14,restart_addr-.(%r14) | |
844 | br %r14 # branch to start_secondary | |
1da177e4 | 845 | restart_addr: |
25d83cbf | 846 | .long start_secondary |
84b36a8e | 847 | .previous |
1da177e4 LT |
848 | #else |
849 | /* | |
850 | * If we do not run with SMP enabled, let the new CPU crash ... | |
851 | */ | |
25d83cbf | 852 | .globl restart_int_handler |
1da177e4 | 853 | restart_int_handler: |
25d83cbf | 854 | basr %r1,0 |
1da177e4 | 855 | restart_base: |
25d83cbf HC |
856 | lpsw restart_crash-restart_base(%r1) |
857 | .align 8 | |
1da177e4 | 858 | restart_crash: |
25d83cbf | 859 | .long 0x000a0000,0x00000000 |
1da177e4 LT |
860 | restart_go: |
861 | #endif | |
862 | ||
863 | #ifdef CONFIG_CHECK_STACK | |
864 | /* | |
865 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
866 | * No need to properly save the registers, we are going to panic anyway. | |
867 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
868 | */ | |
869 | stack_overflow: | |
870 | l %r15,__LC_PANIC_STACK # change to panic stack | |
871 | sl %r15,BASED(.Lc_spsize) | |
872 | mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack | |
873 | stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
874 | la %r1,__LC_SAVE_AREA | |
875 | ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? | |
876 | be BASED(0f) | |
877 | ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? | |
878 | be BASED(0f) | |
879 | la %r1,__LC_SAVE_AREA+16 | |
880 | 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack | |
25d83cbf | 881 | xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain |
1da177e4 | 882 | l %r1,BASED(1f) # branch to kernel_stack_overflow |
25d83cbf | 883 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 | 884 | br %r1 |
25d83cbf | 885 | 1: .long kernel_stack_overflow |
1da177e4 LT |
886 | #endif |
887 | ||
888 | cleanup_table_system_call: | |
889 | .long system_call + 0x80000000, sysc_do_svc + 0x80000000 | |
890 | cleanup_table_sysc_return: | |
891 | .long sysc_return + 0x80000000, sysc_leave + 0x80000000 | |
892 | cleanup_table_sysc_leave: | |
411788ea | 893 | .long sysc_leave + 0x80000000, sysc_done + 0x80000000 |
1da177e4 | 894 | cleanup_table_sysc_work_loop: |
411788ea | 895 | .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000 |
63b12246 MS |
896 | cleanup_table_io_return: |
897 | .long io_return + 0x80000000, io_leave + 0x80000000 | |
ae6aa2ea MS |
898 | cleanup_table_io_leave: |
899 | .long io_leave + 0x80000000, io_done + 0x80000000 | |
900 | cleanup_table_io_work_loop: | |
411788ea | 901 | .long io_work_loop + 0x80000000, io_work_done + 0x80000000 |
1da177e4 LT |
902 | |
903 | cleanup_critical: | |
904 | clc 4(4,%r12),BASED(cleanup_table_system_call) | |
905 | bl BASED(0f) | |
906 | clc 4(4,%r12),BASED(cleanup_table_system_call+4) | |
907 | bl BASED(cleanup_system_call) | |
908 | 0: | |
909 | clc 4(4,%r12),BASED(cleanup_table_sysc_return) | |
910 | bl BASED(0f) | |
911 | clc 4(4,%r12),BASED(cleanup_table_sysc_return+4) | |
912 | bl BASED(cleanup_sysc_return) | |
913 | 0: | |
914 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave) | |
915 | bl BASED(0f) | |
916 | clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4) | |
917 | bl BASED(cleanup_sysc_leave) | |
918 | 0: | |
919 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop) | |
920 | bl BASED(0f) | |
921 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) | |
77fa2245 | 922 | bl BASED(cleanup_sysc_return) |
63b12246 MS |
923 | 0: |
924 | clc 4(4,%r12),BASED(cleanup_table_io_return) | |
925 | bl BASED(0f) | |
926 | clc 4(4,%r12),BASED(cleanup_table_io_return+4) | |
927 | bl BASED(cleanup_io_return) | |
ae6aa2ea MS |
928 | 0: |
929 | clc 4(4,%r12),BASED(cleanup_table_io_leave) | |
930 | bl BASED(0f) | |
931 | clc 4(4,%r12),BASED(cleanup_table_io_leave+4) | |
932 | bl BASED(cleanup_io_leave) | |
933 | 0: | |
934 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop) | |
935 | bl BASED(0f) | |
936 | clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4) | |
937 | bl BASED(cleanup_io_return) | |
1da177e4 LT |
938 | 0: |
939 | br %r14 | |
940 | ||
941 | cleanup_system_call: | |
942 | mvc __LC_RETURN_PSW(8),0(%r12) | |
ae6aa2ea MS |
943 | c %r12,BASED(.Lmck_old_psw) |
944 | be BASED(0f) | |
945 | la %r12,__LC_SAVE_AREA+16 | |
946 | b BASED(1f) | |
947 | 0: la %r12,__LC_SAVE_AREA+32 | |
948 | 1: | |
1da177e4 LT |
949 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
950 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) | |
951 | bh BASED(0f) | |
952 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
953 | 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) | |
954 | bhe BASED(cleanup_vtime) | |
955 | #endif | |
956 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) | |
957 | bh BASED(0f) | |
ae6aa2ea MS |
958 | mvc __LC_SAVE_AREA(16),0(%r12) |
959 | 0: st %r13,4(%r12) | |
960 | st %r12,__LC_SAVE_AREA+48 # argh | |
63b12246 | 961 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 962 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
ae6aa2ea MS |
963 | l %r12,__LC_SAVE_AREA+48 # argh |
964 | st %r15,12(%r12) | |
1da177e4 LT |
965 | lh %r7,0x8a |
966 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
967 | cleanup_vtime: | |
968 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) | |
969 | bhe BASED(cleanup_stime) | |
1da177e4 LT |
970 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
971 | cleanup_stime: | |
972 | clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) | |
973 | bh BASED(cleanup_update) | |
974 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
975 | cleanup_update: | |
976 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
977 | #endif |
978 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) | |
979 | la %r12,__LC_RETURN_PSW | |
980 | br %r14 | |
981 | cleanup_system_call_insn: | |
982 | .long sysc_saveall + 0x80000000 | |
983 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
25d83cbf HC |
984 | .long system_call + 0x80000000 |
985 | .long sysc_vtime + 0x80000000 | |
986 | .long sysc_stime + 0x80000000 | |
987 | .long sysc_update + 0x80000000 | |
1da177e4 LT |
988 | #endif |
989 | ||
990 | cleanup_sysc_return: | |
991 | mvc __LC_RETURN_PSW(4),0(%r12) | |
992 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return) | |
993 | la %r12,__LC_RETURN_PSW | |
994 | br %r14 | |
995 | ||
996 | cleanup_sysc_leave: | |
997 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) | |
ae6aa2ea | 998 | be BASED(2f) |
1da177e4 LT |
999 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
1000 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
1001 | clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) | |
ae6aa2ea | 1002 | be BASED(2f) |
1da177e4 LT |
1003 | #endif |
1004 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) | |
ae6aa2ea MS |
1005 | c %r12,BASED(.Lmck_old_psw) |
1006 | bne BASED(0f) | |
1007 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
1008 | b BASED(1f) | |
1009 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
1010 | 1: lm %r0,%r11,SP_R0(%r15) | |
1da177e4 | 1011 | l %r15,SP_R15(%r15) |
ae6aa2ea | 1012 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 LT |
1013 | br %r14 |
1014 | cleanup_sysc_leave_insn: | |
411788ea | 1015 | .long sysc_done - 4 + 0x80000000 |
1da177e4 | 1016 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
411788ea | 1017 | .long sysc_done - 8 + 0x80000000 |
1da177e4 | 1018 | #endif |
1da177e4 | 1019 | |
ae6aa2ea MS |
1020 | cleanup_io_return: |
1021 | mvc __LC_RETURN_PSW(4),0(%r12) | |
1022 | mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop) | |
1023 | la %r12,__LC_RETURN_PSW | |
1024 | br %r14 | |
1025 | ||
1026 | cleanup_io_leave: | |
1027 | clc 4(4,%r12),BASED(cleanup_io_leave_insn) | |
1028 | be BASED(2f) | |
1029 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | |
1030 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
1031 | clc 4(4,%r12),BASED(cleanup_io_leave_insn+4) | |
1032 | be BASED(2f) | |
1033 | #endif | |
1034 | mvc __LC_RETURN_PSW(8),SP_PSW(%r15) | |
1035 | c %r12,BASED(.Lmck_old_psw) | |
1036 | bne BASED(0f) | |
1037 | mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) | |
1038 | b BASED(1f) | |
1039 | 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) | |
1040 | 1: lm %r0,%r11,SP_R0(%r15) | |
1041 | l %r15,SP_R15(%r15) | |
1042 | 2: la %r12,__LC_RETURN_PSW | |
1043 | br %r14 | |
1044 | cleanup_io_leave_insn: | |
411788ea | 1045 | .long io_done - 4 + 0x80000000 |
ae6aa2ea | 1046 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
411788ea | 1047 | .long io_done - 8 + 0x80000000 |
ae6aa2ea | 1048 | #endif |
ae6aa2ea | 1049 | |
1da177e4 LT |
1050 | /* |
1051 | * Integer constants | |
1052 | */ | |
25d83cbf HC |
1053 | .align 4 |
1054 | .Lc_spsize: .long SP_SIZE | |
1055 | .Lc_overhead: .long STACK_FRAME_OVERHEAD | |
25d83cbf HC |
1056 | .Lnr_syscalls: .long NR_syscalls |
1057 | .L0x018: .short 0x018 | |
1058 | .L0x020: .short 0x020 | |
1059 | .L0x028: .short 0x028 | |
1060 | .L0x030: .short 0x030 | |
1061 | .L0x038: .short 0x038 | |
1062 | .Lc_1: .long 1 | |
1da177e4 LT |
1063 | |
1064 | /* | |
1065 | * Symbol constants | |
1066 | */ | |
25d83cbf | 1067 | .Ls390_mcck: .long s390_do_machine_check |
77fa2245 | 1068 | .Ls390_handle_mcck: |
25d83cbf HC |
1069 | .long s390_handle_mcck |
1070 | .Lmck_old_psw: .long __LC_MCK_OLD_PSW | |
1071 | .Ldo_IRQ: .long do_IRQ | |
1072 | .Ldo_extint: .long do_extint | |
1073 | .Ldo_signal: .long do_signal | |
1074 | .Lhandle_per: .long do_single_step | |
03ff9a23 MS |
1075 | .Ldo_execve: .long do_execve |
1076 | .Lexecve_tail: .long execve_tail | |
25d83cbf HC |
1077 | .Ljump_table: .long pgm_check_table |
1078 | .Lschedule: .long schedule | |
ab1809b4 | 1079 | #ifdef CONFIG_PREEMPT |
b8e7a54c HC |
1080 | .Lpreempt_schedule_irq: |
1081 | .long preempt_schedule_irq | |
ab1809b4 | 1082 | #endif |
25d83cbf | 1083 | .Ltrace: .long syscall_trace |
25d83cbf HC |
1084 | .Lschedtail: .long schedule_tail |
1085 | .Lsysc_table: .long sys_call_table | |
1f194a4c | 1086 | #ifdef CONFIG_TRACE_IRQFLAGS |
25d83cbf | 1087 | .Ltrace_irq_on: .long trace_hardirqs_on |
1f194a4c | 1088 | .Ltrace_irq_off: |
25d83cbf | 1089 | .long trace_hardirqs_off |
523b44cf HC |
1090 | .Llockdep_sys_exit: |
1091 | .long lockdep_sys_exit | |
1f194a4c | 1092 | #endif |
1da177e4 | 1093 | .Lcritical_start: |
25d83cbf | 1094 | .long __critical_start + 0x80000000 |
1da177e4 | 1095 | .Lcritical_end: |
25d83cbf | 1096 | .long __critical_end + 0x80000000 |
1da177e4 | 1097 | .Lcleanup_critical: |
25d83cbf | 1098 | .long cleanup_critical |
1da177e4 | 1099 | |
25d83cbf | 1100 | .section .rodata, "a" |
1da177e4 | 1101 | #define SYSCALL(esa,esame,emu) .long esa |
1da177e4 LT |
1102 | sys_call_table: |
1103 | #include "syscalls.S" | |
1104 | #undef SYSCALL |