Commit | Line | Data |
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1da177e4 | 1 | /* |
54dfe5dd | 2 | * arch/s390/kernel/entry64.S |
1da177e4 LT |
3 | * S390 low-level entry points. |
4 | * | |
54dfe5dd | 5 | * Copyright (C) IBM Corp. 1999,2006 |
1da177e4 | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 9 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
10 | */ |
11 | ||
1da177e4 | 12 | #include <linux/linkage.h> |
2bc89b5e | 13 | #include <linux/init.h> |
1da177e4 | 14 | #include <asm/cache.h> |
1da177e4 LT |
15 | #include <asm/errno.h> |
16 | #include <asm/ptrace.h> | |
17 | #include <asm/thread_info.h> | |
0013a854 | 18 | #include <asm/asm-offsets.h> |
1da177e4 LT |
19 | #include <asm/unistd.h> |
20 | #include <asm/page.h> | |
21 | ||
22 | /* | |
23 | * Stack layout for the system_call stack entry. | |
24 | * The first few entries are identical to the user_regs_struct. | |
25 | */ | |
25d83cbf HC |
26 | SP_PTREGS = STACK_FRAME_OVERHEAD |
27 | SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS | |
28 | SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |
29 | SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS | |
30 | SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 | |
31 | SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 | |
32 | SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 | |
33 | SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 | |
34 | SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 | |
35 | SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 | |
36 | SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 | |
37 | SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64 | |
38 | SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72 | |
39 | SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80 | |
40 | SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88 | |
41 | SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96 | |
42 | SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104 | |
43 | SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112 | |
44 | SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120 | |
45 | SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 | |
46 | SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC | |
59da2139 | 47 | SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR |
25d83cbf | 48 | SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE |
1da177e4 LT |
49 | |
50 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
51 | STACK_SIZE = 1 << STACK_SHIFT | |
52 | ||
753c4dd6 | 53 | _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 54 | _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) |
753c4dd6 | 55 | _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
54dfe5dd | 56 | _TIF_MCCK_PENDING) |
9bf1226b | 57 | _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \ |
66700001 | 58 | _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8) |
1da177e4 LT |
59 | |
60 | #define BASED(name) name-system_call(%r13) | |
61 | ||
1f194a4c HC |
62 | #ifdef CONFIG_TRACE_IRQFLAGS |
63 | .macro TRACE_IRQS_ON | |
6a2df3a8 MS |
64 | basr %r2,%r0 |
65 | brasl %r14,trace_hardirqs_on_caller | |
1f194a4c HC |
66 | .endm |
67 | ||
68 | .macro TRACE_IRQS_OFF | |
6a2df3a8 MS |
69 | basr %r2,%r0 |
70 | brasl %r14,trace_hardirqs_off_caller | |
1f194a4c | 71 | .endm |
523b44cf | 72 | |
6a2df3a8 | 73 | .macro TRACE_IRQS_CHECK_ON |
411788ea HC |
74 | tm SP_PSW(%r15),0x03 # irqs enabled? |
75 | jz 0f | |
6a2df3a8 MS |
76 | TRACE_IRQS_ON |
77 | 0: | |
78 | .endm | |
79 | ||
80 | .macro TRACE_IRQS_CHECK_OFF | |
81 | tm SP_PSW(%r15),0x03 # irqs enabled? | |
82 | jz 0f | |
83 | TRACE_IRQS_OFF | |
84 | 0: | |
523b44cf | 85 | .endm |
1f194a4c HC |
86 | #else |
87 | #define TRACE_IRQS_ON | |
88 | #define TRACE_IRQS_OFF | |
6a2df3a8 MS |
89 | #define TRACE_IRQS_CHECK_ON |
90 | #define TRACE_IRQS_CHECK_OFF | |
411788ea HC |
91 | #endif |
92 | ||
93 | #ifdef CONFIG_LOCKDEP | |
94 | .macro LOCKDEP_SYS_EXIT | |
95 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
96 | jz 0f | |
97 | brasl %r14,lockdep_sys_exit | |
98 | 0: | |
99 | .endm | |
100 | #else | |
523b44cf | 101 | #define LOCKDEP_SYS_EXIT |
1f194a4c HC |
102 | #endif |
103 | ||
25d83cbf | 104 | .macro UPDATE_VTIME lc_from,lc_to,lc_sum |
1da177e4 LT |
105 | lg %r10,\lc_from |
106 | slg %r10,\lc_to | |
107 | alg %r10,\lc_sum | |
108 | stg %r10,\lc_sum | |
109 | .endm | |
1da177e4 LT |
110 | |
111 | /* | |
112 | * Register usage in interrupt handlers: | |
113 | * R9 - pointer to current task structure | |
114 | * R13 - pointer to literal pool | |
115 | * R14 - return register for function calls | |
116 | * R15 - kernel stack pointer | |
117 | */ | |
118 | ||
25d83cbf | 119 | .macro SAVE_ALL_BASE savearea |
1da177e4 LT |
120 | stmg %r12,%r15,\savearea |
121 | larl %r13,system_call | |
122 | .endm | |
123 | ||
987ad70a MS |
124 | .macro SAVE_ALL_SVC psworg,savearea |
125 | la %r12,\psworg | |
126 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
127 | .endm | |
128 | ||
63b12246 | 129 | .macro SAVE_ALL_SYNC psworg,savearea |
1da177e4 | 130 | la %r12,\psworg |
1da177e4 LT |
131 | tm \psworg+1,0x01 # test problem state bit |
132 | jz 2f # skip stack setup save | |
133 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp | |
63b12246 MS |
134 | #ifdef CONFIG_CHECK_STACK |
135 | j 3f | |
136 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
137 | jz stack_overflow | |
138 | 3: | |
139 | #endif | |
140 | 2: | |
141 | .endm | |
142 | ||
143 | .macro SAVE_ALL_ASYNC psworg,savearea | |
144 | la %r12,\psworg | |
1da177e4 LT |
145 | tm \psworg+1,0x01 # test problem state bit |
146 | jnz 1f # from user -> load kernel stack | |
147 | clc \psworg+8(8),BASED(.Lcritical_end) | |
148 | jhe 0f | |
149 | clc \psworg+8(8),BASED(.Lcritical_start) | |
150 | jl 0f | |
151 | brasl %r14,cleanup_critical | |
6add9f7f | 152 | tm 1(%r12),0x01 # retest problem state after cleanup |
1da177e4 LT |
153 | jnz 1f |
154 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ? | |
155 | slgr %r14,%r15 | |
156 | srag %r14,%r14,STACK_SHIFT | |
157 | jz 2f | |
158 | 1: lg %r15,__LC_ASYNC_STACK # load async stack | |
1da177e4 LT |
159 | #ifdef CONFIG_CHECK_STACK |
160 | j 3f | |
161 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | |
162 | jz stack_overflow | |
163 | 3: | |
164 | #endif | |
77fa2245 HC |
165 | 2: |
166 | .endm | |
167 | ||
168 | .macro CREATE_STACK_FRAME psworg,savearea | |
25d83cbf HC |
169 | aghi %r15,-SP_SIZE # make room for registers & psw |
170 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack | |
1da177e4 | 171 | stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 |
59da2139 | 172 | icm %r12,3,__LC_SVC_ILC |
1da177e4 | 173 | stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack |
59da2139 | 174 | st %r12,SP_SVCNR(%r15) |
1da177e4 LT |
175 | mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack |
176 | la %r12,0 | |
177 | stg %r12,__SF_BACKCHAIN(%r15) | |
25d83cbf | 178 | .endm |
1da177e4 | 179 | |
ae6aa2ea MS |
180 | .macro RESTORE_ALL psworg,sync |
181 | mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore | |
1da177e4 | 182 | .if !\sync |
ae6aa2ea | 183 | ni \psworg+1,0xfd # clear wait state bit |
1da177e4 | 184 | .endif |
c742b31c MS |
185 | lg %r14,__LC_VDSO_PER_CPU |
186 | lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user | |
c185b783 | 187 | stpt __LC_EXIT_TIMER |
c742b31c MS |
188 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER |
189 | lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user | |
ae6aa2ea | 190 | lpswe \psworg # back to caller |
1da177e4 LT |
191 | .endm |
192 | ||
193 | /* | |
194 | * Scheduler resume function, called by switch_to | |
195 | * gpr2 = (task_struct *) prev | |
196 | * gpr3 = (task_struct *) next | |
197 | * Returns: | |
198 | * gpr2 = prev | |
199 | */ | |
25d83cbf | 200 | .globl __switch_to |
1da177e4 LT |
201 | __switch_to: |
202 | tm __THREAD_per+4(%r3),0xe8 # is the new process using per ? | |
203 | jz __switch_to_noper # if not we're fine | |
25d83cbf HC |
204 | stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff |
205 | clc __THREAD_per(24,%r3),__SF_EMPTY(%r15) | |
206 | je __switch_to_noper # we got away without bashing TLB's | |
207 | lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't | |
1da177e4 | 208 | __switch_to_noper: |
25d83cbf | 209 | lg %r4,__THREAD_info(%r2) # get thread_info of prev |
77fa2245 HC |
210 | tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending? |
211 | jz __switch_to_no_mcck | |
212 | ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev | |
213 | lg %r4,__THREAD_info(%r3) # get thread_info of next | |
214 | oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next | |
215 | __switch_to_no_mcck: | |
25d83cbf | 216 | stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task |
1da177e4 LT |
217 | stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp |
218 | lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp | |
25d83cbf | 219 | lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task |
1da177e4 LT |
220 | stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct |
221 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 | |
25d83cbf | 222 | lg %r3,__THREAD_info(%r3) # load thread_info from task struct |
1da177e4 LT |
223 | stg %r3,__LC_THREAD_INFO |
224 | aghi %r3,STACK_SIZE | |
225 | stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack | |
226 | br %r14 | |
227 | ||
228 | __critical_start: | |
229 | /* | |
230 | * SVC interrupt handler routine. System calls are synchronous events and | |
231 | * are executed with interrupts enabled. | |
232 | */ | |
233 | ||
25d83cbf | 234 | .globl system_call |
1da177e4 | 235 | system_call: |
c185b783 | 236 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 LT |
237 | sysc_saveall: |
238 | SAVE_ALL_BASE __LC_SAVE_AREA | |
987ad70a | 239 | SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
25d83cbf HC |
240 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
241 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore | |
1da177e4 | 242 | sysc_vtime: |
1da177e4 LT |
243 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
244 | sysc_stime: | |
245 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
246 | sysc_update: | |
247 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
248 | sysc_do_svc: |
249 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
59da2139 | 250 | ltgr %r7,%r7 # test for svc 0 |
1da177e4 LT |
251 | jnz sysc_nr_ok |
252 | # svc 0: system call number in %r1 | |
253 | cl %r1,BASED(.Lnr_syscalls) | |
254 | jnl sysc_nr_ok | |
25d83cbf | 255 | lgfr %r7,%r1 # clear high word in r1 |
1da177e4 LT |
256 | sysc_nr_ok: |
257 | mvc SP_ARGS(8,%r15),SP_R7(%r15) | |
258 | sysc_do_restart: | |
59da2139 MS |
259 | sth %r7,SP_SVCNR(%r15) |
260 | sllg %r7,%r7,2 # svc number * 4 | |
25d83cbf | 261 | larl %r10,sys_call_table |
347a8dc3 | 262 | #ifdef CONFIG_COMPAT |
c563077e HC |
263 | tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ? |
264 | jno sysc_noemu | |
25d83cbf | 265 | larl %r10,sys_call_table_emu # use 31 bit emulation system calls |
1da177e4 LT |
266 | sysc_noemu: |
267 | #endif | |
bcf5cef7 | 268 | tm __TI_flags+6(%r9),_TIF_SYSCALL |
25d83cbf HC |
269 | lgf %r8,0(%r7,%r10) # load address of system call routine |
270 | jnz sysc_tracesys | |
271 | basr %r14,%r8 # call sys_xxxx | |
272 | stg %r2,SP_R2(%r15) # store return value (change R2 on stack) | |
1da177e4 LT |
273 | |
274 | sysc_return: | |
6a2df3a8 MS |
275 | LOCKDEP_SYS_EXIT |
276 | sysc_tif: | |
1da177e4 | 277 | tm __TI_flags+7(%r9),_TIF_WORK_SVC |
25d83cbf | 278 | jnz sysc_work # there is work to do (signals etc.) |
411788ea | 279 | sysc_restore: |
25d83cbf | 280 | RESTORE_ALL __LC_RETURN_PSW,1 |
411788ea HC |
281 | sysc_done: |
282 | ||
1da177e4 | 283 | # |
43d399d2 | 284 | # There is work to do, but first we need to check if we return to userspace. |
1da177e4 LT |
285 | # |
286 | sysc_work: | |
2688905e MS |
287 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
288 | jno sysc_restore | |
43d399d2 MS |
289 | |
290 | # | |
291 | # One of the work bits is on. Find out which one. | |
292 | # | |
6a2df3a8 | 293 | sysc_work_tif: |
77fa2245 HC |
294 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING |
295 | jo sysc_mcck_pending | |
1da177e4 LT |
296 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED |
297 | jo sysc_reschedule | |
02a029b3 | 298 | tm __TI_flags+7(%r9),_TIF_SIGPENDING |
43d399d2 | 299 | jo sysc_sigpending |
753c4dd6 | 300 | tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME |
43d399d2 | 301 | jo sysc_notify_resume |
1da177e4 LT |
302 | tm __TI_flags+7(%r9),_TIF_RESTART_SVC |
303 | jo sysc_restart | |
304 | tm __TI_flags+7(%r9),_TIF_SINGLE_STEP | |
305 | jo sysc_singlestep | |
43d399d2 | 306 | j sysc_return # beware of critical section cleanup |
1da177e4 LT |
307 | |
308 | # | |
309 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
310 | # |
311 | sysc_reschedule: | |
6a2df3a8 MS |
312 | larl %r14,sysc_return |
313 | jg schedule # return point is sysc_return | |
1da177e4 | 314 | |
77fa2245 HC |
315 | # |
316 | # _TIF_MCCK_PENDING is set, call handler | |
317 | # | |
318 | sysc_mcck_pending: | |
6a2df3a8 | 319 | larl %r14,sysc_return |
25d83cbf | 320 | jg s390_handle_mcck # TIF bit will be cleared by handler |
77fa2245 | 321 | |
1da177e4 | 322 | # |
02a029b3 | 323 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 324 | # |
25d83cbf | 325 | sysc_sigpending: |
1da177e4 | 326 | ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
25d83cbf HC |
327 | la %r2,SP_PTREGS(%r15) # load pt_regs |
328 | brasl %r14,do_signal # call do_signal | |
1da177e4 LT |
329 | tm __TI_flags+7(%r9),_TIF_RESTART_SVC |
330 | jo sysc_restart | |
331 | tm __TI_flags+7(%r9),_TIF_SINGLE_STEP | |
332 | jo sysc_singlestep | |
6a2df3a8 | 333 | j sysc_return |
1da177e4 | 334 | |
753c4dd6 MS |
335 | # |
336 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
337 | # | |
338 | sysc_notify_resume: | |
339 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
6a2df3a8 | 340 | larl %r14,sysc_return |
753c4dd6 MS |
341 | jg do_notify_resume # call do_notify_resume |
342 | ||
1da177e4 LT |
343 | # |
344 | # _TIF_RESTART_SVC is set, set up registers and restart svc | |
345 | # | |
346 | sysc_restart: | |
347 | ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC | |
25d83cbf | 348 | lg %r7,SP_R2(%r15) # load new svc number |
1da177e4 | 349 | mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument |
25d83cbf HC |
350 | lmg %r2,%r6,SP_R2(%r15) # load svc arguments |
351 | j sysc_do_restart # restart svc | |
1da177e4 LT |
352 | |
353 | # | |
354 | # _TIF_SINGLE_STEP is set, call do_single_step | |
355 | # | |
356 | sysc_singlestep: | |
59da2139 MS |
357 | ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP |
358 | xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number | |
1da177e4 | 359 | la %r2,SP_PTREGS(%r15) # address of register-save area |
6a2df3a8 | 360 | larl %r14,sysc_return # load adr. of system return |
1da177e4 LT |
361 | jg do_single_step # branch to do_sigtrap |
362 | ||
1da177e4 | 363 | # |
753c4dd6 MS |
364 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
365 | # and after the system call | |
1da177e4 LT |
366 | # |
367 | sysc_tracesys: | |
25d83cbf | 368 | la %r2,SP_PTREGS(%r15) # load pt_regs |
1da177e4 LT |
369 | la %r3,0 |
370 | srl %r7,2 | |
25d83cbf | 371 | stg %r7,SP_R2(%r15) |
753c4dd6 | 372 | brasl %r14,do_syscall_trace_enter |
1da177e4 | 373 | lghi %r0,NR_syscalls |
753c4dd6 | 374 | clgr %r0,%r2 |
1da177e4 | 375 | jnh sysc_tracenogo |
59da2139 | 376 | sllg %r7,%r2,2 # svc number *4 |
1da177e4 LT |
377 | lgf %r8,0(%r7,%r10) |
378 | sysc_tracego: | |
25d83cbf HC |
379 | lmg %r3,%r6,SP_R3(%r15) |
380 | lg %r2,SP_ORIG_R2(%r15) | |
381 | basr %r14,%r8 # call sys_xxx | |
382 | stg %r2,SP_R2(%r15) # store return value | |
1da177e4 | 383 | sysc_tracenogo: |
bcf5cef7 | 384 | tm __TI_flags+6(%r9),_TIF_SYSCALL |
25d83cbf HC |
385 | jz sysc_return |
386 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
25d83cbf | 387 | larl %r14,sysc_return # return point is sysc_return |
753c4dd6 | 388 | jg do_syscall_trace_exit |
1da177e4 LT |
389 | |
390 | # | |
391 | # a new process exits the kernel with ret_from_fork | |
392 | # | |
25d83cbf | 393 | .globl ret_from_fork |
1da177e4 LT |
394 | ret_from_fork: |
395 | lg %r13,__LC_SVC_NEW_PSW+8 | |
396 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct | |
397 | tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? | |
398 | jo 0f | |
399 | stg %r15,SP_R15(%r15) # store stack pointer for new kthread | |
25d83cbf | 400 | 0: brasl %r14,schedule_tail |
1f194a4c | 401 | TRACE_IRQS_ON |
25d83cbf | 402 | stosm 24(%r15),0x03 # reenable interrupts |
8f2961c3 | 403 | j sysc_tracenogo |
1da177e4 LT |
404 | |
405 | # | |
03ff9a23 MS |
406 | # kernel_execve function needs to deal with pt_regs that is not |
407 | # at the usual place | |
1da177e4 | 408 | # |
03ff9a23 MS |
409 | .globl kernel_execve |
410 | kernel_execve: | |
411 | stmg %r12,%r15,96(%r15) | |
412 | lgr %r14,%r15 | |
413 | aghi %r15,-SP_SIZE | |
414 | stg %r14,__SF_BACKCHAIN(%r15) | |
415 | la %r12,SP_PTREGS(%r15) | |
416 | xc 0(__PT_SIZE,%r12),0(%r12) | |
417 | lgr %r5,%r12 | |
418 | brasl %r14,do_execve | |
419 | ltgfr %r2,%r2 | |
420 | je 0f | |
421 | aghi %r15,SP_SIZE | |
422 | lmg %r12,%r15,96(%r15) | |
423 | br %r14 | |
424 | # execve succeeded. | |
425 | 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts | |
6a2df3a8 | 426 | # TRACE_IRQS_OFF |
03ff9a23 MS |
427 | lg %r15,__LC_KERNEL_STACK # load ksp |
428 | aghi %r15,-SP_SIZE # make room for registers & psw | |
429 | lg %r13,__LC_SVC_NEW_PSW+8 | |
430 | lg %r9,__LC_THREAD_INFO | |
431 | mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs | |
432 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | |
6a2df3a8 | 433 | # TRACE_IRQS_ON |
03ff9a23 MS |
434 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
435 | brasl %r14,execve_tail | |
436 | j sysc_return | |
1da177e4 LT |
437 | |
438 | /* | |
439 | * Program check handler routine | |
440 | */ | |
441 | ||
25d83cbf | 442 | .globl pgm_check_handler |
1da177e4 LT |
443 | pgm_check_handler: |
444 | /* | |
445 | * First we need to check for a special case: | |
446 | * Single stepping an instruction that disables the PER event mask will | |
447 | * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. | |
448 | * For a single stepped SVC the program check handler gets control after | |
449 | * the SVC new PSW has been loaded. But we want to execute the SVC first and | |
450 | * then handle the PER event. Therefore we update the SVC old PSW to point | |
451 | * to the pgm_check_handler and branch to the SVC handler after we checked | |
452 | * if we have to load the kernel stack register. | |
453 | * For every other possible cause for PER event without the PER mask set | |
454 | * we just ignore the PER event (FIXME: is there anything we have to do | |
455 | * for LPSW?). | |
456 | */ | |
c185b783 | 457 | stpt __LC_SYNC_ENTER_TIMER |
1da177e4 | 458 | SAVE_ALL_BASE __LC_SAVE_AREA |
25d83cbf HC |
459 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
460 | jnz pgm_per # got per exception -> special case | |
63b12246 | 461 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 462 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
463 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
464 | jz pgm_no_vtime | |
465 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
466 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
467 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
468 | pgm_no_vtime: | |
6a2df3a8 | 469 | TRACE_IRQS_CHECK_OFF |
1da177e4 | 470 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
9e74a6b8 | 471 | mvc SP_ARGS(8,%r15),__LC_LAST_BREAK |
25d83cbf | 472 | lgf %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 LT |
473 | lghi %r8,0x7f |
474 | ngr %r8,%r3 | |
475 | pgm_do_call: | |
25d83cbf HC |
476 | sll %r8,3 |
477 | larl %r1,pgm_check_table | |
478 | lg %r1,0(%r8,%r1) # load address of handler routine | |
479 | la %r2,SP_PTREGS(%r15) # address of register-save area | |
6a2df3a8 MS |
480 | basr %r14,%r1 # branch to interrupt-handler |
481 | pgm_exit: | |
482 | TRACE_IRQS_CHECK_ON | |
483 | j sysc_return | |
1da177e4 LT |
484 | |
485 | # | |
486 | # handle per exception | |
487 | # | |
488 | pgm_per: | |
25d83cbf HC |
489 | tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on |
490 | jnz pgm_per_std # ok, normal per event from user space | |
1da177e4 | 491 | # ok its one of the special cases, now we need to find out which one |
25d83cbf HC |
492 | clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW |
493 | je pgm_svcper | |
1da177e4 LT |
494 | # no interesting special case, ignore PER event |
495 | lmg %r12,%r15,__LC_SAVE_AREA | |
25d83cbf | 496 | lpswe __LC_PGM_OLD_PSW |
1da177e4 LT |
497 | |
498 | # | |
499 | # Normal per exception | |
500 | # | |
501 | pgm_per_std: | |
63b12246 | 502 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 503 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
504 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
505 | jz pgm_no_vtime2 | |
506 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER | |
507 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
508 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
509 | pgm_no_vtime2: | |
6a2df3a8 | 510 | TRACE_IRQS_CHECK_OFF |
1da177e4 LT |
511 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
512 | lg %r1,__TI_task(%r9) | |
4ba069b8 MG |
513 | tm SP_PSW+1(%r15),0x01 # kernel per event ? |
514 | jz kernel_per | |
1da177e4 LT |
515 | mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID |
516 | mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS | |
517 | mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID | |
518 | oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP | |
25d83cbf | 519 | lgf %r3,__LC_PGM_ILC # load program interruption code |
1da177e4 | 520 | lghi %r8,0x7f |
25d83cbf | 521 | ngr %r8,%r3 # clear per-event-bit and ilc |
6a2df3a8 | 522 | je pgm_exit |
1da177e4 LT |
523 | j pgm_do_call |
524 | ||
525 | # | |
526 | # it was a single stepped SVC that is causing all the trouble | |
527 | # | |
528 | pgm_svcper: | |
63b12246 | 529 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 530 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
1da177e4 LT |
531 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
532 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
533 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
25d83cbf | 534 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore |
1da177e4 | 535 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
6a2df3a8 | 536 | TRACE_IRQS_OFF |
bcc6525f CB |
537 | lg %r8,__TI_task(%r9) |
538 | mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID | |
539 | mvc __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS | |
540 | mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID | |
1da177e4 | 541 | oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP |
1f194a4c | 542 | TRACE_IRQS_ON |
1da177e4 | 543 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
6a2df3a8 | 544 | lmg %r2,%r6,SP_R2(%r15) # load svc arguments |
1da177e4 LT |
545 | j sysc_do_svc |
546 | ||
4ba069b8 MG |
547 | # |
548 | # per was called from kernel, must be kprobes | |
549 | # | |
550 | kernel_per: | |
59da2139 | 551 | xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number |
4ba069b8 | 552 | la %r2,SP_PTREGS(%r15) # address of register-save area |
6a2df3a8 MS |
553 | brasl %r14,do_single_step |
554 | j pgm_exit | |
4ba069b8 | 555 | |
1da177e4 LT |
556 | /* |
557 | * IO interrupt handler routine | |
558 | */ | |
25d83cbf | 559 | .globl io_int_handler |
1da177e4 | 560 | io_int_handler: |
1da177e4 | 561 | stck __LC_INT_CLOCK |
9cfb9b3c | 562 | stpt __LC_ASYNC_ENTER_TIMER |
1da177e4 | 563 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
63b12246 | 564 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
77fa2245 | 565 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
1da177e4 LT |
566 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
567 | jz io_no_vtime | |
568 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
569 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
570 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
571 | io_no_vtime: | |
1da177e4 | 572 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
1f194a4c | 573 | TRACE_IRQS_OFF |
25d83cbf HC |
574 | la %r2,SP_PTREGS(%r15) # address of register-save area |
575 | brasl %r14,do_IRQ # call standard irq handler | |
1da177e4 | 576 | io_return: |
6a2df3a8 MS |
577 | LOCKDEP_SYS_EXIT |
578 | TRACE_IRQS_ON | |
579 | io_tif: | |
1da177e4 | 580 | tm __TI_flags+7(%r9),_TIF_WORK_INT |
25d83cbf | 581 | jnz io_work # there is work to do (signals etc.) |
411788ea | 582 | io_restore: |
25d83cbf | 583 | RESTORE_ALL __LC_RETURN_PSW,0 |
ae6aa2ea | 584 | io_done: |
1da177e4 | 585 | |
2688905e | 586 | # |
43d399d2 MS |
587 | # There is work todo, find out in which context we have been interrupted: |
588 | # 1) if we return to user space we can do all _TIF_WORK_INT work | |
589 | # 2) if we return to kernel code and kvm is enabled check if we need to | |
590 | # modify the psw to leave SIE | |
591 | # 3) if we return to kernel code and preemptive scheduling is enabled check | |
592 | # the preemption counter and if it is zero call preempt_schedule_irq | |
593 | # Before any work can be done, a switch to the kernel stack is required. | |
2688905e MS |
594 | # |
595 | io_work: | |
596 | tm SP_PSW+1(%r15),0x01 # returning to user ? | |
43d399d2 | 597 | jo io_work_user # yes -> do resched & signal |
0eaeafa1 | 598 | #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE) |
43d399d2 MS |
599 | lg %r2,SP_PSW+8(%r15) # check if current instruction is SIE |
600 | lh %r1,0(%r2) | |
601 | chi %r1,-19948 # signed 16 bit compare with 0xb214 | |
0eaeafa1 | 602 | jne 0f # no -> leave PSW alone |
43d399d2 MS |
603 | aghi %r2,4 # yes-> add 4 bytes to leave SIE |
604 | stg %r2,SP_PSW+8(%r15) | |
0eaeafa1 CB |
605 | 0: |
606 | #endif | |
43d399d2 | 607 | #ifdef CONFIG_PREEMPT |
2688905e | 608 | # check for preemptive scheduling |
25d83cbf | 609 | icm %r0,15,__TI_precount(%r9) |
2688905e | 610 | jnz io_restore # preemption is disabled |
6a2df3a8 MS |
611 | tm __TI_flags+7(%r12),_TIF_NEED_RESCHED |
612 | jno io_restore | |
1da177e4 LT |
613 | # switch to kernel stack |
614 | lg %r1,SP_R15(%r15) | |
615 | aghi %r1,-SP_SIZE | |
616 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 617 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 | 618 | lgr %r15,%r1 |
6a2df3a8 MS |
619 | # TRACE_IRQS_ON already done at io_return, call |
620 | # TRACE_IRQS_OFF to keep things symmetrical | |
621 | TRACE_IRQS_OFF | |
622 | brasl %r14,preempt_schedule_irq | |
623 | j io_return | |
624 | #else | |
43d399d2 | 625 | j io_restore |
6a2df3a8 | 626 | #endif |
1da177e4 | 627 | |
43d399d2 MS |
628 | # |
629 | # Need to do work before returning to userspace, switch to kernel stack | |
630 | # | |
2688905e | 631 | io_work_user: |
1da177e4 LT |
632 | lg %r1,__LC_KERNEL_STACK |
633 | aghi %r1,-SP_SIZE | |
634 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
25d83cbf | 635 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain |
1da177e4 | 636 | lgr %r15,%r1 |
43d399d2 | 637 | |
1da177e4 LT |
638 | # |
639 | # One of the work bits is on. Find out which one. | |
43d399d2 | 640 | # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED |
54dfe5dd | 641 | # and _TIF_MCCK_PENDING |
1da177e4 | 642 | # |
6a2df3a8 | 643 | io_work_tif: |
77fa2245 HC |
644 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING |
645 | jo io_mcck_pending | |
1da177e4 LT |
646 | tm __TI_flags+7(%r9),_TIF_NEED_RESCHED |
647 | jo io_reschedule | |
02a029b3 | 648 | tm __TI_flags+7(%r9),_TIF_SIGPENDING |
43d399d2 | 649 | jo io_sigpending |
753c4dd6 | 650 | tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME |
43d399d2 MS |
651 | jo io_notify_resume |
652 | j io_return # beware of critical section cleanup | |
0eaeafa1 | 653 | |
77fa2245 HC |
654 | # |
655 | # _TIF_MCCK_PENDING is set, call handler | |
656 | # | |
657 | io_mcck_pending: | |
6a2df3a8 | 658 | # TRACE_IRQS_ON already done at io_return |
b771aeac | 659 | brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler |
6a2df3a8 MS |
660 | TRACE_IRQS_OFF |
661 | j io_return | |
77fa2245 | 662 | |
1da177e4 LT |
663 | # |
664 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf HC |
665 | # |
666 | io_reschedule: | |
6a2df3a8 | 667 | # TRACE_IRQS_ON already done at io_return |
25d83cbf HC |
668 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
669 | brasl %r14,schedule # call scheduler | |
670 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
411788ea | 671 | TRACE_IRQS_OFF |
6a2df3a8 | 672 | j io_return |
1da177e4 LT |
673 | |
674 | # | |
02a029b3 | 675 | # _TIF_SIGPENDING or is set, call do_signal |
1da177e4 | 676 | # |
25d83cbf | 677 | io_sigpending: |
6a2df3a8 | 678 | # TRACE_IRQS_ON already done at io_return |
25d83cbf HC |
679 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
680 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 | 681 | brasl %r14,do_signal # call do_signal |
25d83cbf | 682 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts |
411788ea | 683 | TRACE_IRQS_OFF |
6a2df3a8 | 684 | j io_return |
1da177e4 | 685 | |
753c4dd6 MS |
686 | # |
687 | # _TIF_NOTIFY_RESUME or is set, call do_notify_resume | |
688 | # | |
689 | io_notify_resume: | |
6a2df3a8 | 690 | # TRACE_IRQS_ON already done at io_return |
753c4dd6 MS |
691 | stosm __SF_EMPTY(%r15),0x03 # reenable interrupts |
692 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
693 | brasl %r14,do_notify_resume # call do_notify_resume | |
694 | stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts | |
695 | TRACE_IRQS_OFF | |
6a2df3a8 | 696 | j io_return |
753c4dd6 | 697 | |
1da177e4 LT |
698 | /* |
699 | * External interrupt handler routine | |
700 | */ | |
25d83cbf | 701 | .globl ext_int_handler |
1da177e4 | 702 | ext_int_handler: |
1da177e4 | 703 | stck __LC_INT_CLOCK |
9cfb9b3c | 704 | stpt __LC_ASYNC_ENTER_TIMER |
1da177e4 | 705 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
63b12246 | 706 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
77fa2245 | 707 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
1da177e4 LT |
708 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
709 | jz ext_no_vtime | |
710 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | |
711 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
712 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
713 | ext_no_vtime: | |
1da177e4 | 714 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
1f194a4c | 715 | TRACE_IRQS_OFF |
25d83cbf HC |
716 | la %r2,SP_PTREGS(%r15) # address of register-save area |
717 | llgh %r3,__LC_EXT_INT_CODE # get interruption code | |
718 | brasl %r14,do_extint | |
1da177e4 LT |
719 | j io_return |
720 | ||
ae6aa2ea MS |
721 | __critical_end: |
722 | ||
1da177e4 LT |
723 | /* |
724 | * Machine check handler routines | |
725 | */ | |
25d83cbf | 726 | .globl mcck_int_handler |
1da177e4 | 727 | mcck_int_handler: |
6377981f | 728 | stck __LC_MCCK_CLOCK |
77fa2245 HC |
729 | la %r1,4095 # revalidate r1 |
730 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | |
25d83cbf | 731 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs |
1da177e4 | 732 | SAVE_ALL_BASE __LC_SAVE_AREA+64 |
77fa2245 | 733 | la %r12,__LC_MCK_OLD_PSW |
25d83cbf | 734 | tm __LC_MCCK_CODE,0x80 # system damage? |
77fa2245 | 735 | jo mcck_int_main # yes -> rest of mcck code invalid |
63b12246 | 736 | la %r14,4095 |
6377981f | 737 | mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14) |
63b12246 MS |
738 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? |
739 | jo 1f | |
740 | la %r14,__LC_SYNC_ENTER_TIMER | |
741 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
742 | jl 0f | |
743 | la %r14,__LC_ASYNC_ENTER_TIMER | |
744 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
745 | jl 0f | |
746 | la %r14,__LC_EXIT_TIMER | |
747 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | |
748 | jl 0f | |
749 | la %r14,__LC_LAST_UPDATE_TIMER | |
750 | 0: spt 0(%r14) | |
6377981f | 751 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) |
c185b783 | 752 | 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
77fa2245 | 753 | jno mcck_int_main # no -> skip cleanup critical |
25d83cbf | 754 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit |
77fa2245 HC |
755 | jnz mcck_int_main # from user -> load kernel stack |
756 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end) | |
757 | jhe mcck_int_main | |
25d83cbf | 758 | clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start) |
77fa2245 | 759 | jl mcck_int_main |
25d83cbf | 760 | brasl %r14,cleanup_critical |
77fa2245 | 761 | mcck_int_main: |
25d83cbf | 762 | lg %r14,__LC_PANIC_STACK # are we already on the panic stack? |
77fa2245 HC |
763 | slgr %r14,%r15 |
764 | srag %r14,%r14,PAGE_SHIFT | |
765 | jz 0f | |
25d83cbf | 766 | lg %r15,__LC_PANIC_STACK # load panic stack |
77fa2245 | 767 | 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64 |
ae6aa2ea MS |
768 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
769 | jno mcck_no_vtime # no -> no timer update | |
63b12246 | 770 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
ae6aa2ea | 771 | jz mcck_no_vtime |
6377981f | 772 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER |
ae6aa2ea | 773 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER |
6377981f | 774 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER |
ae6aa2ea | 775 | mcck_no_vtime: |
77fa2245 HC |
776 | lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct |
777 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
778 | brasl %r14,s390_do_machine_check | |
25d83cbf | 779 | tm SP_PSW+1(%r15),0x01 # returning to user ? |
77fa2245 HC |
780 | jno mcck_return |
781 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack | |
782 | aghi %r1,-SP_SIZE | |
783 | mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) | |
784 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain | |
785 | lgr %r15,%r1 | |
786 | stosm __SF_EMPTY(%r15),0x04 # turn dat on | |
787 | tm __TI_flags+7(%r9),_TIF_MCCK_PENDING | |
788 | jno mcck_return | |
1f194a4c | 789 | TRACE_IRQS_OFF |
77fa2245 | 790 | brasl %r14,s390_handle_mcck |
1f194a4c | 791 | TRACE_IRQS_ON |
1da177e4 | 792 | mcck_return: |
63b12246 MS |
793 | mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW |
794 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | |
795 | lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 | |
63b12246 MS |
796 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? |
797 | jno 0f | |
798 | stpt __LC_EXIT_TIMER | |
c185b783 | 799 | 0: lpswe __LC_RETURN_MCCK_PSW # back to caller |
1da177e4 | 800 | |
1da177e4 LT |
801 | /* |
802 | * Restart interruption handler, kick starter for additional CPUs | |
803 | */ | |
84b36a8e | 804 | #ifdef CONFIG_SMP |
2bc89b5e | 805 | __CPUINIT |
25d83cbf | 806 | .globl restart_int_handler |
1da177e4 | 807 | restart_int_handler: |
5b409ed1 MS |
808 | basr %r1,0 |
809 | restart_base: | |
810 | spt restart_vtime-restart_base(%r1) | |
811 | stck __LC_LAST_UPDATE_CLOCK | |
812 | mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1) | |
813 | mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1) | |
25d83cbf HC |
814 | lg %r15,__LC_SAVE_AREA+120 # load ksp |
815 | lghi %r10,__LC_CREGS_SAVE_AREA | |
816 | lctlg %c0,%c15,0(%r10) # get new ctl regs | |
817 | lghi %r10,__LC_AREGS_SAVE_AREA | |
818 | lam %a0,%a15,0(%r10) | |
819 | lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone | |
5b409ed1 MS |
820 | lg %r1,__LC_THREAD_INFO |
821 | mvc __LC_USER_TIMER(8),__TI_user_timer(%r1) | |
822 | mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1) | |
823 | xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER | |
25d83cbf HC |
824 | stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on |
825 | jg start_secondary | |
5b409ed1 MS |
826 | .align 8 |
827 | restart_vtime: | |
828 | .long 0x7fffffff,0xffffffff | |
84b36a8e | 829 | .previous |
1da177e4 LT |
830 | #else |
831 | /* | |
832 | * If we do not run with SMP enabled, let the new CPU crash ... | |
833 | */ | |
25d83cbf | 834 | .globl restart_int_handler |
1da177e4 | 835 | restart_int_handler: |
25d83cbf | 836 | basr %r1,0 |
1da177e4 | 837 | restart_base: |
25d83cbf HC |
838 | lpswe restart_crash-restart_base(%r1) |
839 | .align 8 | |
1da177e4 | 840 | restart_crash: |
25d83cbf | 841 | .long 0x000a0000,0x00000000,0x00000000,0x00000000 |
1da177e4 LT |
842 | restart_go: |
843 | #endif | |
844 | ||
845 | #ifdef CONFIG_CHECK_STACK | |
846 | /* | |
847 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
848 | * No need to properly save the registers, we are going to panic anyway. | |
849 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
850 | */ | |
851 | stack_overflow: | |
852 | lg %r15,__LC_PANIC_STACK # change to panic stack | |
9514e231 | 853 | aghi %r15,-SP_SIZE |
1da177e4 LT |
854 | mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack |
855 | stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack | |
856 | la %r1,__LC_SAVE_AREA | |
857 | chi %r12,__LC_SVC_OLD_PSW | |
858 | je 0f | |
859 | chi %r12,__LC_PGM_OLD_PSW | |
860 | je 0f | |
9514e231 | 861 | la %r1,__LC_SAVE_AREA+32 |
25d83cbf | 862 | 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack |
9e74a6b8 | 863 | mvc SP_ARGS(8,%r15),__LC_LAST_BREAK |
25d83cbf HC |
864 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain |
865 | la %r2,SP_PTREGS(%r15) # load pt_regs | |
1da177e4 LT |
866 | jg kernel_stack_overflow |
867 | #endif | |
868 | ||
869 | cleanup_table_system_call: | |
870 | .quad system_call, sysc_do_svc | |
6a2df3a8 MS |
871 | cleanup_table_sysc_tif: |
872 | .quad sysc_tif, sysc_restore | |
873 | cleanup_table_sysc_restore: | |
874 | .quad sysc_restore, sysc_done | |
875 | cleanup_table_io_tif: | |
876 | .quad io_tif, io_restore | |
877 | cleanup_table_io_restore: | |
878 | .quad io_restore, io_done | |
1da177e4 LT |
879 | |
880 | cleanup_critical: | |
881 | clc 8(8,%r12),BASED(cleanup_table_system_call) | |
882 | jl 0f | |
883 | clc 8(8,%r12),BASED(cleanup_table_system_call+8) | |
884 | jl cleanup_system_call | |
885 | 0: | |
6a2df3a8 | 886 | clc 8(8,%r12),BASED(cleanup_table_sysc_tif) |
1da177e4 | 887 | jl 0f |
6a2df3a8 MS |
888 | clc 8(8,%r12),BASED(cleanup_table_sysc_tif+8) |
889 | jl cleanup_sysc_tif | |
1da177e4 | 890 | 0: |
6a2df3a8 | 891 | clc 8(8,%r12),BASED(cleanup_table_sysc_restore) |
1da177e4 | 892 | jl 0f |
6a2df3a8 MS |
893 | clc 8(8,%r12),BASED(cleanup_table_sysc_restore+8) |
894 | jl cleanup_sysc_restore | |
63b12246 | 895 | 0: |
6a2df3a8 | 896 | clc 8(8,%r12),BASED(cleanup_table_io_tif) |
63b12246 | 897 | jl 0f |
6a2df3a8 MS |
898 | clc 8(8,%r12),BASED(cleanup_table_io_tif+8) |
899 | jl cleanup_io_tif | |
ae6aa2ea | 900 | 0: |
6a2df3a8 | 901 | clc 8(8,%r12),BASED(cleanup_table_io_restore) |
ae6aa2ea | 902 | jl 0f |
6a2df3a8 MS |
903 | clc 8(8,%r12),BASED(cleanup_table_io_restore+8) |
904 | jl cleanup_io_restore | |
1da177e4 LT |
905 | 0: |
906 | br %r14 | |
907 | ||
908 | cleanup_system_call: | |
909 | mvc __LC_RETURN_PSW(16),0(%r12) | |
1da177e4 LT |
910 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8) |
911 | jh 0f | |
6377981f MS |
912 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER |
913 | cghi %r12,__LC_MCK_OLD_PSW | |
914 | je 0f | |
1da177e4 | 915 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER |
6377981f MS |
916 | 0: cghi %r12,__LC_MCK_OLD_PSW |
917 | la %r12,__LC_SAVE_AREA+64 | |
918 | je 0f | |
919 | la %r12,__LC_SAVE_AREA+32 | |
1da177e4 LT |
920 | 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16) |
921 | jhe cleanup_vtime | |
1da177e4 LT |
922 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn) |
923 | jh 0f | |
ae6aa2ea MS |
924 | mvc __LC_SAVE_AREA(32),0(%r12) |
925 | 0: stg %r13,8(%r12) | |
926 | stg %r12,__LC_SAVE_AREA+96 # argh | |
63b12246 | 927 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
77fa2245 | 928 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
ae6aa2ea MS |
929 | lg %r12,__LC_SAVE_AREA+96 # argh |
930 | stg %r15,24(%r12) | |
1da177e4 | 931 | llgh %r7,__LC_SVC_INT_CODE |
1da177e4 LT |
932 | cleanup_vtime: |
933 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24) | |
934 | jhe cleanup_stime | |
1da177e4 LT |
935 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER |
936 | cleanup_stime: | |
937 | clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32) | |
938 | jh cleanup_update | |
939 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | |
940 | cleanup_update: | |
941 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER | |
1da177e4 LT |
942 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8) |
943 | la %r12,__LC_RETURN_PSW | |
944 | br %r14 | |
945 | cleanup_system_call_insn: | |
946 | .quad sysc_saveall | |
25d83cbf HC |
947 | .quad system_call |
948 | .quad sysc_vtime | |
949 | .quad sysc_stime | |
950 | .quad sysc_update | |
1da177e4 | 951 | |
6a2df3a8 | 952 | cleanup_sysc_tif: |
1da177e4 | 953 | mvc __LC_RETURN_PSW(8),0(%r12) |
6a2df3a8 | 954 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_tif) |
1da177e4 LT |
955 | la %r12,__LC_RETURN_PSW |
956 | br %r14 | |
957 | ||
6a2df3a8 MS |
958 | cleanup_sysc_restore: |
959 | clc 8(8,%r12),BASED(cleanup_sysc_restore_insn) | |
6377981f | 960 | je 2f |
6a2df3a8 | 961 | clc 8(8,%r12),BASED(cleanup_sysc_restore_insn+8) |
c742b31c | 962 | jhe 0f |
6377981f MS |
963 | mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER |
964 | cghi %r12,__LC_MCK_OLD_PSW | |
965 | je 0f | |
c742b31c MS |
966 | mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER |
967 | 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) | |
ae6aa2ea | 968 | cghi %r12,__LC_MCK_OLD_PSW |
6377981f MS |
969 | la %r12,__LC_SAVE_AREA+64 |
970 | je 1f | |
971 | la %r12,__LC_SAVE_AREA+32 | |
972 | 1: mvc 0(32,%r12),SP_R12(%r15) | |
973 | lmg %r0,%r11,SP_R0(%r15) | |
1da177e4 | 974 | lg %r15,SP_R15(%r15) |
6377981f | 975 | 2: la %r12,__LC_RETURN_PSW |
1da177e4 | 976 | br %r14 |
6a2df3a8 | 977 | cleanup_sysc_restore_insn: |
411788ea | 978 | .quad sysc_done - 4 |
c742b31c | 979 | .quad sysc_done - 16 |
1da177e4 | 980 | |
6a2df3a8 | 981 | cleanup_io_tif: |
176b1803 | 982 | mvc __LC_RETURN_PSW(8),0(%r12) |
6a2df3a8 | 983 | mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_tif) |
176b1803 MS |
984 | la %r12,__LC_RETURN_PSW |
985 | br %r14 | |
986 | ||
6a2df3a8 MS |
987 | cleanup_io_restore: |
988 | clc 8(8,%r12),BASED(cleanup_io_restore_insn) | |
6377981f | 989 | je 1f |
6a2df3a8 | 990 | clc 8(8,%r12),BASED(cleanup_io_restore_insn+8) |
c742b31c | 991 | jhe 0f |
6377981f | 992 | mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER |
c742b31c | 993 | 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15) |
ae6aa2ea | 994 | mvc __LC_SAVE_AREA+64(32),SP_R12(%r15) |
6377981f | 995 | lmg %r0,%r11,SP_R0(%r15) |
ae6aa2ea | 996 | lg %r15,SP_R15(%r15) |
6377981f | 997 | 1: la %r12,__LC_RETURN_PSW |
ae6aa2ea | 998 | br %r14 |
6a2df3a8 | 999 | cleanup_io_restore_insn: |
411788ea | 1000 | .quad io_done - 4 |
c742b31c | 1001 | .quad io_done - 16 |
ae6aa2ea | 1002 | |
1da177e4 LT |
1003 | /* |
1004 | * Integer constants | |
1005 | */ | |
25d83cbf | 1006 | .align 4 |
1da177e4 | 1007 | .Lconst: |
25d83cbf HC |
1008 | .Lnr_syscalls: .long NR_syscalls |
1009 | .L0x0130: .short 0x130 | |
1010 | .L0x0140: .short 0x140 | |
1011 | .L0x0150: .short 0x150 | |
1012 | .L0x0160: .short 0x160 | |
1013 | .L0x0170: .short 0x170 | |
1da177e4 | 1014 | .Lcritical_start: |
25d83cbf | 1015 | .quad __critical_start |
1da177e4 | 1016 | .Lcritical_end: |
25d83cbf | 1017 | .quad __critical_end |
1da177e4 | 1018 | |
25d83cbf | 1019 | .section .rodata, "a" |
1da177e4 | 1020 | #define SYSCALL(esa,esame,emu) .long esame |
9bf1226b | 1021 | .globl sys_call_table |
1da177e4 LT |
1022 | sys_call_table: |
1023 | #include "syscalls.S" | |
1024 | #undef SYSCALL | |
1025 | ||
347a8dc3 | 1026 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
1027 | |
1028 | #define SYSCALL(esa,esame,emu) .long emu | |
1da177e4 LT |
1029 | sys_call_table_emu: |
1030 | #include "syscalls.S" | |
1031 | #undef SYSCALL | |
1032 | #endif |